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83c0accc5f
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Update EFLAGS masks
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2023-11-09 16:12:24 +01:00 |
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362eefc2b3
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Fixes in AMD64 version of KepInitializeThreadContext() to get rid of PageFault exception
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2023-11-07 15:34:49 +01:00 |
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91ce0f9947
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Compensate missing return address, which is a 4-byte on i686 and an 8-byte on amd64
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2023-11-05 20:07:13 +01:00 |
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f05a262da2
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Cleanup XTDK and XTOSKRNL headers
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2023-10-29 09:58:47 +01:00 |
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798e4c1d22
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Cleanup MM subsystem headers
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2023-10-29 00:52:05 +02:00 |
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600c86949b
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Cleanup RTL subsystem headers
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2023-10-29 00:14:01 +02:00 |
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d920cae481
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Fix build by defining more routines used by XTLDR
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2023-10-28 23:41:52 +02:00 |
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ad15c55a39
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Cleanup AR subsystem headers
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2023-10-28 23:35:34 +02:00 |
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358b20f1a1
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Reorder routines
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2023-04-04 22:35:06 +02:00 |
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10ccf67e8e
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Add missing forward declarations
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2023-03-14 22:50:32 +01:00 |
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5677719038
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Initialize thread context for AMD64
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2023-03-14 17:37:20 +01:00 |
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fd8eec1d86
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Add EFLAGS and THREAD_ENVIRONMENT_BLOCK for amd64
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2023-03-05 19:03:34 +01:00 |
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c5a9253ea8
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Implement ArLoadLocalDescriptorTable() routine
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2023-03-02 23:04:36 +01:00 |
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870a6680b0
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Add thread information block
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2023-03-01 00:14:06 +01:00 |
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ef23acc3bc
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Add Deferred Procedure Call (DPC) and processor power state related structures
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2023-02-27 19:58:47 +01:00 |
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e41de62dab
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Implement ArYieldProcessor() routine
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2023-02-27 17:28:20 +01:00 |
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c8428241dd
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Add missing headers containing forward references of MM routines
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2023-02-20 22:22:32 +01:00 |
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b1c2b209e3
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Implement RtlGetStackLimits() routine
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2023-02-15 20:12:58 +01:00 |
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2e790bd9b2
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Add pages related macros and definitions
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2023-02-13 23:01:20 +01:00 |
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e94cb2d3a7
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Processor identification structures
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2023-02-10 17:14:12 +01:00 |
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e645cf664c
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Set process and thread information in processor control block
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2023-02-09 17:30:24 +01:00 |
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9132c47cd9
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Initial process and thread related structures
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2023-02-08 23:40:58 +01:00 |
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c6cadbd655
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Initialize MXCSR register
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2023-02-05 00:30:12 +01:00 |
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5eaf7d63a3
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Initialize Page Attribute Table
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2023-02-05 00:14:34 +01:00 |
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55cdae7c83
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Initialize AMD64 processor registers
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2023-02-04 23:40:03 +01:00 |
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269214ed34
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Another improvements to GDT
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2023-02-03 18:00:37 +01:00 |
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19f34d4b17
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Cleanup the code
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2023-02-02 19:42:57 +01:00 |
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715f875c4f
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Set alignment and packing properly
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2023-02-02 17:01:18 +01:00 |
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73fc7607cd
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There is no need to specify alignment of the structure in the forward reference
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2023-02-02 15:37:57 +01:00 |
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21fbe6febe
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Add IDT related definitions
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2023-02-01 20:14:10 +01:00 |
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a761d3125a
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Architecture specific initialization prior to processor structures initialization
ci/woodpecker/push/build Pipeline was successful
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2023-01-30 20:34:05 +01:00 |
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6f068513cd
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Initial processor block initialization
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2023-01-30 19:07:05 +01:00 |
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ebe6792f2b
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Add MSR (Model Specific Registers) values
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2023-01-30 17:59:00 +01:00 |
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7bf4a9ab8d
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Initialize boot CPU structures inside kernel on AMD64
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2023-01-29 00:45:17 +01:00 |
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27e2fdf4f2
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Introduce architecture library as new kernel subsystem and move selected routines into new subsystem
ci/woodpecker/push/build Pipeline was successful
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2023-01-28 10:34:55 +01:00 |
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e94e50b5d9
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Implement HlLoadInterruptDescriptorTable() intrinsics for loading IDT
ci/woodpecker/push/build Pipeline was successful
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2023-01-26 20:08:57 +01:00 |
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3ad3149f80
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Add descriptor structure definition
ci/woodpecker/push/build Pipeline was successful
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2023-01-25 17:42:35 +01:00 |
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bfc9db8b6d
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Unify KGDTENTRY and KIDTENTRY between architectures as much as possible
ci/woodpecker/push/build Pipeline was successful
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2023-01-25 17:35:03 +01:00 |
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a366de618f
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AMD64 Interrupt request levels definitions
ci/woodpecker/push/build Pipeline was successful
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2023-01-25 17:08:42 +01:00 |
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8f348c3954
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Add GDT and Segments related definitions for AMD64
ci/woodpecker/push/build Pipeline was successful
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2023-01-25 17:05:15 +01:00 |
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707dc37868
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Fix type of Source parameter in HlLoadSegment() routine
ci/woodpecker/push/build Pipeline was successful
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2023-01-24 23:08:48 +01:00 |
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35aa514f95
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Implement HlLoadSegment() intrinsics routine
ci/woodpecker/push/build Pipeline was successful
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2023-01-24 19:27:18 +01:00 |
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d3d8d144a0
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Implement HlLoadGlobalDescriptorTable() intrinsic
ci/woodpecker/push/build Pipeline was successful
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2023-01-23 20:13:51 +01:00 |
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c81b858757
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Implement HlReadGSQuadWord() intrinsic
ci/woodpecker/push/build Pipeline was successful
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2023-01-23 19:59:54 +01:00 |
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f20ab3e52e
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Implement HlLoadTaskRegister() for loading TSS segment selector into task register
ci/woodpecker/push/build Pipeline was successful
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2023-01-23 15:26:35 +01:00 |
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fb60625abc
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Add more intrinsic routines
ci/woodpecker/push/build Pipeline was successful
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2023-01-13 22:32:45 +01:00 |
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025e05013d
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Partially revert last changes
ci/woodpecker/push/build Pipeline was successful
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2023-01-10 22:51:38 +01:00 |
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bac7af8a33
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Cleanup data types
ci/woodpecker/push/build Pipeline was successful
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2023-01-09 23:07:21 +01:00 |
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ca1d7ddfe8
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Basic context, frames and exceptions definitions
ci/woodpecker/push/build Pipeline was successful
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2023-01-07 23:36:50 +01:00 |
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f74ba62f24
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Add GDT, IDT and TSS related structures
ci/woodpecker/push/build Pipeline was successful
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2023-01-07 13:33:16 +01:00 |
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