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229 changed files with 2301 additions and 20975 deletions

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@@ -55,9 +55,6 @@ add_definitions(-D__XTOS__)
add_definitions(-DXTOS_SOURCE_DIR="${EXECTOS_SOURCE_DIR}") add_definitions(-DXTOS_SOURCE_DIR="${EXECTOS_SOURCE_DIR}")
add_definitions(-DXTOS_BINARY_DIR="${EXECTOS_BINARY_DIR}") add_definitions(-DXTOS_BINARY_DIR="${EXECTOS_BINARY_DIR}")
# Add assembler flags
add_compiler_asmflags(-D__XTOS_ASSEMBLER__)
# Compute __FILE__ definition # Compute __FILE__ definition
file(RELATIVE_PATH _PATH_PREFIX ${EXECTOS_BINARY_DIR} ${EXECTOS_SOURCE_DIR}) file(RELATIVE_PATH _PATH_PREFIX ${EXECTOS_BINARY_DIR} ${EXECTOS_SOURCE_DIR})
add_compiler_flags(-D__RELFILE__="&__FILE__[__FILE__[0] == '.' ? sizeof \\\"${_PATH_PREFIX}\\\" - 1 : sizeof XTOS_SOURCE_DIR]") add_compiler_flags(-D__RELFILE__="&__FILE__[__FILE__[0] == '.' ? sizeof \\\"${_PATH_PREFIX}\\\" - 1 : sizeof XTOS_SOURCE_DIR]")

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@@ -53,9 +53,8 @@ implement any environment subsystem to support applications that are strictly wr
* NT drivers compatibility layer * NT drivers compatibility layer
# Requirements # Requirements
ExectOS is currently in a very early stage of development, so its specific requirements are not fully defined yet. ExectOS is in very early development stage, thus its requirements have been not specified yet. However according to its
However, based on the current design, it requires modern EFI hardware. You cannot boot ExectOS on a legacy BIOS design, it requires a modern EFI enabled hardware. It is not possible currently to boot ExectOS on a legacy BIOS.
right now, but there are plans to add BIOS support in the future.
# Source structure # Source structure
| Directory | Description | | Directory | Description |

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@@ -1,8 +1,6 @@
# XT Boot Sector # XT Boot Sector
PROJECT(BOOTSECT) PROJECT(BOOTSECT)
add_definitions("-DARCH_ESP_SOURCE=\\\"${ARCH}/cpu.S\\\"")
# Compile boot sectors # Compile boot sectors
compile_bootsector(mbrboot ${BOOTSECT_SOURCE_DIR}/mbrboot.S 0x7C00 Start) compile_bootsector(mbrboot ${BOOTSECT_SOURCE_DIR}/mbrboot.S 0x7C00 Start)
compile_bootsector(espboot ${BOOTSECT_SOURCE_DIR}/espboot.S 0x7C00 Start) compile_bootsector(espboot ${BOOTSECT_SOURCE_DIR}/espboot.S 0x7C00 Start)

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@@ -1,144 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: boot/bootsect/amd64/cpu.S
* DESCRIPTION: Low-level support for CPU initialization
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
BuildPageMap:
/* Generate page map for first 1GB of memory */
pushaw
pushw %es
cld
movw $(0x1000 / 16), %ax
movw %ax, %es
xorw %di, %di
movl $(0x2000 | 0x07), %eax
stosl
xorl %eax, %eax
movw $1021, %cx
rep stosl
movw $(0x2000 / 16), %ax
movw %ax, %es
xorw %di, %di
movl $(0x3000 | 0x07), %eax
stosl
xorl %eax, %eax
movw $1021, %cx
rep stosl
movw $(0x3000 / 16), %ax
movw %ax, %es
xorw %di, %di
movw $512, %cx
movl $0x00000083, %eax
.BuildPageMapLoop:
/* Identity map 512 pages of 2MB */
movl %eax, %es:(%di)
addl $2097152, %eax
addw $0x08, %di
loop .BuildPageMapLoop
popw %es
popaw
ret
InitializeCpu:
/* Check if CPU supports CPUID, long mode and PAE */
pushal
pushfl
popl %eax
movl %eax, %ebx
xorl $0x00200000, %eax
pushl %eax
popfl
pushfl
popl %eax
cmpl %ebx, %eax
je CpuUnsupported
movl $0x01, %eax
cpuid
testl $0x40, %edx
jz CpuUnsupported
movl $0x80000000, %eax
cpuid
cmpl $0x80000000, %eax
jbe CpuUnsupported
movl $0x80000001, %eax
cpuid
testl $0x20000000, %edx
jz CpuUnsupported
popal
call LoadGdt
ret
LoadGdt:
/* Load Global Descriptor Table */
lgdt .GdtPointer
ret
RunStage2:
/* Switch to long mode and pass control to Stage 2 */
call BuildPageMap
call ParseExecutableHeader
xorl %edx, %edx
pushl %edx
pushl %eax
cli
xorw %ax, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %fs
movw %ax, %gs
movw %ax, %ss
movl %cr4, %eax
orl $0x00A0, %eax
movl %eax, %cr4
movl $0x00001000, %eax
movl %eax, %cr3
movl $0xC0000080, %ecx
rdmsr
orl $0x00000100, %eax
wrmsr
movl %cr0, %eax
orl $0x80000001, %eax
movl %eax, %cr0
ljmp $0x10, $.Stage2LongMode
.code64
.Stage2LongMode:
/* Set segments and stack, then jump to Stage 2 */
movw $0x18, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
xorw %ax, %ax
movw %ax, %fs
movw %ax, %gs
popq %rax
xorq %rbx, %rbx
xorq %rcx, %rcx
xorq %rdx, %rdx
xorq %rsi, %rsi
xorq %rdi, %rdi
xorq %rbp, %rbp
jmp *%rax
.code16
.GdtDescriptor:
/* Global Descriptor Table */
.quad 0x0000000000000000
.quad 0x0000000000000000
.quad 0x00AF9A000000FFFF
.quad 0x00CF92000000FFFF
.quad 0x00009E000000FFFF
.quad 0x000092000000FFFF
.quad 0x00CF9B000000FFFF
.GdtPointer:
/* Pointer to Global Descriptor Table */
.word .GdtPointer - .GdtDescriptor - 1
.long .GdtDescriptor
.Stage2FileName:
/* Name of Stage 2 executable file */
.ascii "BOOTX64 EFI"

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@@ -121,15 +121,15 @@ VerifyBiosParameterBlock:
ja FsError ja FsError
ReadExtraCode: ReadExtraCode:
/* Read second VBR sector with extra boot code (3 sectors starting from sector 2) */ /* Read second VBR sector with extra boot code */
movl HiddenSectors - Start(%bp), %eax movl HiddenSectors - Start(%bp), %eax
addl $0x02, %eax addl $0x02, %eax
movw $0x03, %cx movw $0x01, %cx
xorw %bx, %bx xorw %bx, %bx
movw %bx, %es movw %bx, %es
movw $0x7E00, %bx movw $0x7E00, %bx
call ReadSectors call ReadSectors
jmp StartExtraCode jmp StartSectors
ReadSectors: ReadSectors:
/* Check for extended BIOS functions and use it only if available */ /* Check for extended BIOS functions and use it only if available */
@@ -139,23 +139,19 @@ ReadSectors:
movw $0x55AA, %bx movw $0x55AA, %bx
movb DriveNumber - Start(%bp), %dl movb DriveNumber - Start(%bp), %dl
int $0x13 int $0x13
jc .ReadCHS jc ReadCHS
cmpw $0xAA55, %bx cmpw $0xAA55, %bx
jne .ReadCHS jne ReadCHS
testb $0x01, %cl testb $0x01, %cl
jz .ReadCHS jz ReadCHS
/* Verify drive size and determine whether to use CHS or LBA */ /* Verify drive size and determine whether to use CHS or LBA */
cmpl %edi, %eax cmpl %edi, %eax
jnb .ReadLBA jnb ReadLBA
.ReadCHS: ReadCHS:
/* Read sectors using CHS */ /* Read sectors using CHS */
popal popal
.CHSLoop:
/* Read sector by sector using CHS */
pushw %cx
pushal pushal
xorl %edx, %edx xorl %edx, %edx
movzwl SectorsPerTrack - Start(%bp), %ecx movzwl SectorsPerTrack - Start(%bp), %ecx
@@ -173,18 +169,17 @@ ReadSectors:
orb %ah, %cl orb %ah, %cl
movw $0x0201, %ax movw $0x0201, %ax
int $0x13 int $0x13
popal
popw %cx
jc DiskError jc DiskError
popal
incl %eax incl %eax
movw %es, %dx movw %es, %dx
addw $0x20, %dx addw $0x20, %dx
movw %dx, %es movw %dx, %es
loop .CHSLoop loop ReadCHS
popw %es popw %es
ret ret
.ReadLBA: ReadLBA:
/* Prepare DAP packet and read sectors using LBA */ /* Prepare DAP packet and read sectors using LBA */
popal popal
pushw %cx pushw %cx
@@ -213,19 +208,19 @@ ReadSectors:
movw %dx, %es movw %dx, %es
popw %bx popw %bx
subw %si, %cx subw %si, %cx
jnz .ReadLBA jnz ReadLBA
popw %es popw %es
ret ret
DiskError: DiskError:
/* Display disk error message and reboot */ /* Display disk error message and reboot */
movw $.MsgDiskError, %si movw $msgDiskError, %si
call Print call Print
jmp Reboot jmp Reboot
FsError: FsError:
/* Display FS error message and reboot */ /* Display FS error message and reboot */
movw $.MsgFsError, %si movw $msgFsError, %si
call Print call Print
jmp Reboot jmp Reboot
@@ -233,297 +228,48 @@ Print:
/* Simple routine to print messages */ /* Simple routine to print messages */
lodsb lodsb
orb %al, %al orb %al, %al
jz .DonePrint jz DonePrint
movb $0x0E, %ah movb $0x0E, %ah
movw $0x07, %bx movw $0x07, %bx
int $0x10 int $0x10
jmp Print jmp Print
.DonePrint: DonePrint:
retw retw
Reboot: Reboot:
/* Display a message, wait for a key press and reboot */ /* Display a message, wait for a key press and reboot */
movw $.MsgAnyKey, %si movw $msgAnyKey, %si
call Print call Print
xorw %ax, %ax xorw %ax, %ax
int $0x16 int $0x16
int $0x19 int $0x19
.MsgAnyKey: msgAnyKey:
.ascii "Press any key to restart...\r\n\0" .ascii "Press any key to restart\r\n"
.MsgDiskError: msgDiskError:
.ascii "Disk error!\r\n\0" .ascii "Disk error\r\n"
.MsgFsError: msgFsError:
.ascii "File system error!\r\n\0" .ascii "File system error\r\n"
/* Fill the rest of the VBR with zeros and add VBR signature at the end */ /* Fill the rest of the VBR with zeros and add VBR signature at the end */
.fill (510 - (. - Start)), 1, 0 .fill (510 - (. - Start)), 1, 0
.word 0xAA55 .word 0xAA55
StartExtraCode: StartSectors:
/* Load XTLDR file from disk */ /* Print message */
call LoadStage2 movw $msgUnavailable, %si
/* Enable A20 gate */
call EnableA20
/* Call architecture specific initialization code */
call InitializeCpu
/* Jump to Stage2 */
call RunStage2
Clear8042:
/* Clear 8042 PS/2 buffer */
nop
nop
nop
nop
inb $0x64, %al
cmpb $0xff, %al
je .Clear8042_Done
testb $0x02, %al
jnz Clear8042
.Clear8042_Done:
ret
EnableA20:
/* Enable A20 gate */
pushaw
call Clear8042
movb $0xD1, %al
outb %al, $0x64
call Clear8042
movb $0xDF, %al
outb %al, $0x60
call Clear8042
movb $0xFF, %al
outb %al, $0x64
call Clear8042
popaw
ret
FindFatEntry:
/* Find a file or directory in the FAT table */
pushw %bx
pushw %cx
pushw %dx
pushw %si
pushw %di
.FindFatCluster:
/* Find FAT32 cluster holding the entry */
cmp $0x0FFFFFF8, %eax
jae .FindEntryFail
pushl %eax
movw $0x0200, %bx
movw %bx, %es
call ReadCluster
popl %eax
movb SectorsPerCluster - Start(%bp), %cl
shlw $0x04, %cx
xorw %di, %di
.FindEntryLoop:
/* Find the entry */
movb %es:(%di), %al
cmpb $0x00, %al
je .FindEntryFail
cmpb $0xE5, %al
je .FindSkipEntry
movb %es:0x0B(%di), %ah
cmpb $0x0F, %ah
je .FindSkipEntry
pushw %di
pushw %si
pushw %cx
movw $0x0B, %cx
repe cmpsb
popw %cx
popw %si
popw %di
jnz .FindSkipEntry
movw %es:0x1A(%di), %ax
movw %es:0x14(%di), %dx
shll $0x10, %edx
orl %edx, %eax
clc
jmp .FindEntryDone
.FindSkipEntry:
/* Skip to the next entry */
addw $0x20, %di
decw %cx
jnz .FindEntryLoop
call GetFatEntry
jmp .FindFatCluster
.FindEntryFail:
/* Error, file/directory not found */
stc
.FindEntryDone:
/* Clean up the stack */
popw %di
popw %si
popw %dx
popw %cx
popw %bx
ret
GetFatEntry:
/* Get FAT32 sector and offset from FAT table */
shll $0x02, %eax
movl %eax, %ecx
xorl %edx, %edx
movzwl BytesPerSector - Start(%bp), %ebx
pushl %ebx
divl %ebx
movzwl ReservedSectors - Start(%bp), %ebx
addl %ebx, %eax
movl HiddenSectors - Start(%bp), %ebx
addl %ebx, %eax
popl %ebx
decl %ebx
andl %ebx, %ecx
movzwl ExtendedFlags - Start(%bp), %ebx
andw $0x0F, %bx
jz LoadFatSector
cmpb FatCopies - Start(%bp), %bl
jae FsError
pushl %eax
movl BigSectorsPerFat - Start(%bp), %eax
mull %ebx
popl %edx
addl %edx, %eax
LoadFatSector:
/* Load FAT32 sector from disk */
pushl %ecx
movw $0x9000, %bx
movw %bx, %es
cmpl %esi, %eax
je .LoadFatSectorDone
movl %eax, %esi
xorw %bx, %bx
movw $0x01, %cx
call ReadSectors
.LoadFatSectorDone:
/* Clean up the stack */
popl %ecx
movl %es:(%ecx), %eax
andl $0x0FFFFFFF, %eax
ret
LoadStage2:
/* Load Stage2 executable, first find file in the path */
movl $0xFFFFFFFF, %esi
pushl %esi
movl 0x7C2C, %eax
movw $.EfiDirName, %si
call FindFatEntry
jc Stage2NotLoaded
movw $.BootDirName, %si
call FindFatEntry
jc Stage2NotLoaded
movw $.Stage2FileName, %si
call FindFatEntry
jc Stage2NotLoaded
popl %esi
/* Load XTLDR file from disk */
cmpl $0x02, %eax
jb FileNotFound
cmpl $0x0FFFFFF8, %eax
jae FileNotFound
movw $(0xF800 / 16), %bx
movw %bx, %es
.LoadStage2Loop:
/* Load file data from disk */
pushl %eax
xorw %bx, %bx
pushw %es
call ReadCluster
popw %es
xorw %bx, %bx
movb SectorsPerCluster - Start(%bp), %bl
shlw $0x05, %bx
movw %es, %ax
addw %bx, %ax
movw %ax, %es
popl %eax
pushw %es
call GetFatEntry
popw %es
cmpl $0x0FFFFFF8, %eax
jb .LoadStage2Loop
ret
ParseExecutableHeader:
/* Parse Stage2 PE/COFF executable header */
pushw %es
movw $(0xF800 / 16), %ax
movw %ax, %es
movl %es:60, %eax
addl $(4 + 20), %eax
movl %es:16(%eax), %eax
addl $0xF800, %eax
popw %es
ret
ReadCluster:
/* Read FAT32 cluster from disk */
decl %eax
decl %eax
xorl %edx, %edx
movzbl SectorsPerCluster - Start(%bp), %ebx
mull %ebx
pushl %eax
xorl %edx, %edx
movzbl FatCopies - Start(%bp), %eax
mull BigSectorsPerFat - Start(%bp)
movzwl ReservedSectors - Start(%bp), %ebx
addl %ebx, %eax
addl HiddenSectors - Start(%bp), %eax
popl %ebx
addl %ebx, %eax
xorw %bx, %bx
movzbw SectorsPerCluster - Start(%bp), %cx
call ReadSectors
ret
/* Include architecture specific code */
.include ARCH_ESP_SOURCE
CpuUnsupported:
/* Display CPU unsupported message and reboot */
popal
movw $.MsgCpuUnsupported, %si
call Print call Print
jmp Reboot
FileNotFound: /* Wait for key press and reboot */
/* Display XTLDR not found message and reboot */ xorw %ax, %ax
movw $.MsgXtLdrNotFound, %si int $0x16
call Print int $0x19
jmp Reboot
Stage2NotLoaded: msgUnavailable:
/* Clean up the stack and display XTLDR not found message and reboot */ .ascii "XTLDR requires EFI-based system!\r\nPress any key to restart\r\n"
popl %esi
jmp FileNotFound
.BootDirName: /* Fill the rest of the extra VBR with zeros */
/* Boot directory name */ .fill (1024 - (. - Start)), 1, 0
.ascii "BOOT "
.EfiDirName:
/* EFI directory name */
.ascii "EFI "
.MsgCpuUnsupported:
.ascii "CPU not supported!\r\n\0"
.MsgXtLdrNotFound:
.ascii "XTLDR Stage2 not found!\r\n\0"
/* Fill the rest of the extra VBR with zeros and add signature */
.fill (2043 - (. - Start)), 1, 0
.ascii "XTLDR"

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@@ -1,124 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: boot/bootsect/i686/cpu.S
* DESCRIPTION: Low-level support for CPU initialization
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
BuildPageMap:
/* Generate page map for first 16MB of memory */
pushaw
pushw %es
cld
movw $(0x1000 >> 0x04), %ax
movw %ax, %es
xorw %di, %di
movl $(0x2000 | 0x03), %eax
stosl
movl $(0x3000 | 0x03), %eax
stosl
movl $(0x4000 | 0x03), %eax
stosl
movl $(0x5000 | 0x03), %eax
stosl
xorl %eax, %eax
movw $(1024 - 4), %cx
rep stosl
movl $0x00000003, %eax
movl $4, %edx
movw $(0x2000 >> 0x04), %bx
.BuildPageMapLoop:
/* Identity map 1024 pages of 4KB */
movw %bx, %es
xorw %di, %di
pushl %edx
movw $1024, %cx
.FillPageMapTable:
/* Fill the page table */
movl %eax, %es:(%di)
addl $4096, %eax
addw $0x04, %di
loop .FillPageMapTable
popl %edx
addw $(0x1000 >> 0x04), %bx
decl %edx
jnz .BuildPageMapLoop
popw %es
popaw
ret
InitializeCpu:
/* Check if CPU supports CPUID */
pushal
pushfl
popl %eax
movl %eax, %ebx
xorl $0x00200000, %eax
pushl %eax
popfl
pushfl
popl %eax
cmpl %ebx, %eax
je CpuUnsupported
popal
call LoadGdt
ret
LoadGdt:
/* Load Global Descriptor Table */
lgdt .GdtPointer
ret
RunStage2:
/* Switch to protected mode and pass control to Stage 2 */
call BuildPageMap
call ParseExecutableHeader
pushl %eax
cli
movl %cr0, %eax
orl $0x01, %eax
movl %eax, %cr0
ljmp $0x08, $.Stage2ProtectedMode
.code32
.Stage2ProtectedMode:
/* Set segments and stack, then jump to Stage 2 */
movw $0x10, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
xorw %ax, %ax
movw %ax, %fs
movw %ax, %gs
popl %eax
xorl %ebx, %ebx
xorl %ecx, %ecx
xorl %edx, %edx
xorl %esi, %esi
xorl %edi, %edi
xorl %ebp, %ebp
movl $0x1000, %ebx
movl %ebx, %cr3
movl %cr0, %ebx
orl $0x80000000, %ebx
movl %ebx, %cr0
jmp *%eax
.code16
.GdtDescriptor:
/* Global Descriptor Table */
.quad 0x0000000000000000
.quad 0x00CF9A000000FFFF
.quad 0x00CF92000000FFFF
.quad 0x00009E000000FFFF
.quad 0x000092000000FFFF
.GdtPointer:
/* Pointer to Global Descriptor Table */
.word .GdtPointer - .GdtDescriptor - 1
.long .GdtDescriptor
.Stage2FileName:
/* Name of Stage 2 executable file */
.ascii "BOOTIA32EFI"

View File

@@ -4,7 +4,6 @@
* FILE: boot/bootsect/amd64/mbrboot.S * FILE: boot/bootsect/amd64/mbrboot.S
* DESCRIPTION: XT Boot Loader MBR boot code * DESCRIPTION: XT Boot Loader MBR boot code
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org> * DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <aiken@codingworkshop.eu.org>
*/ */
.text .text
@@ -42,7 +41,7 @@ RealStart:
movw %ax, %ss movw %ax, %ss
/* Print welcome message */ /* Print welcome message */
leaw .MsgXtosBoot, %si leaw msgXtosBoot, %si
call Print call Print
/* Get BIOS boot drive and partition table offset */ /* Get BIOS boot drive and partition table offset */
@@ -91,19 +90,19 @@ PartitionFound:
InvalidSignature: InvalidSignature:
/* Invalid signature error */ /* Invalid signature error */
leaw .MsgInvalidSignature, %si leaw msgInvalidSignature, %si
call Print call Print
jmp HaltSystem jmp HaltSystem
PartitionNotFound: PartitionNotFound:
/* Active partition not found error */ /* Active partition not found error */
leaw .MsgPartitionNotFound, %si leaw msgPartitionNotFound, %si
call Print call Print
jmp HaltSystem jmp HaltSystem
VbrReadFail: VbrReadFail:
/* VBR read failed error */ /* VBR read failed error */
leaw .MsgVbrReadFail, %si leaw msgVbrReadFail, %si
call Print call Print
jmp HaltSystem jmp HaltSystem
@@ -137,16 +136,16 @@ DonePrint:
/* Storage for the LBA start */ /* Storage for the LBA start */
.long 0 .long 0
.MsgInvalidSignature: msgInvalidSignature:
.asciz "Invalid partition signature!" .asciz "Invalid partition signature!"
.MsgPartitionNotFound: msgPartitionNotFound:
.asciz "Bootable partition not found!" .asciz "Bootable partition not found!"
.MsgVbrReadFail: msgVbrReadFail:
.asciz "VBR read failed!" .asciz "VBR read failed!"
.MsgXtosBoot: msgXtosBoot:
.asciz "Starting XTOS boot loader...\r\n" .asciz "Starting XTOS boot loader...\r\n"
/* Fill the rest of the MBR with zeros and add MBR signature at the end */ /* Fill the rest of the MBR with zeros and add MBR signature at the end */

View File

@@ -16,7 +16,6 @@ list(APPEND LIBXTLDR_SOURCE
# Specify list of source code files # Specify list of source code files
list(APPEND XTLDR_SOURCE list(APPEND XTLDR_SOURCE
${XTLDR_SOURCE_DIR}/arch/${ARCH}/memory.cc ${XTLDR_SOURCE_DIR}/arch/${ARCH}/memory.cc
${XTLDR_SOURCE_DIR}/biosutil.cc
${XTLDR_SOURCE_DIR}/bootutil.cc ${XTLDR_SOURCE_DIR}/bootutil.cc
${XTLDR_SOURCE_DIR}/config.cc ${XTLDR_SOURCE_DIR}/config.cc
${XTLDR_SOURCE_DIR}/console.cc ${XTLDR_SOURCE_DIR}/console.cc
@@ -39,9 +38,6 @@ add_executable(xtldr ${XTLDR_SOURCE})
# Add linker libraries # Add linker libraries
target_link_libraries(xtldr libxtos) target_link_libraries(xtldr libxtos)
# Add linker options
target_link_options(xtldr PRIVATE /ALIGN:512)
# Set proper binary name and install target # Set proper binary name and install target
if(ARCH STREQUAL "i686") if(ARCH STREQUAL "i686")
set(BINARY_NAME "bootia32") set(BINARY_NAME "bootia32")
@@ -53,6 +49,5 @@ set_install_target(xtldr efi/boot)
# Set loader entrypoint and subsystem # Set loader entrypoint and subsystem
set_entrypoint(xtldr "BlStartXtLoader") set_entrypoint(xtldr "BlStartXtLoader")
set_imagebase(xtldr ${BASEADDRESS_XTLDR})
set_linker_map(xtldr TRUE) set_linker_map(xtldr TRUE)
set_subsystem(xtldr efi_application) set_subsystem(xtldr efi_application)

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@@ -28,12 +28,13 @@ EFI_STATUS
Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap, Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONG_PTR SelfMapAddress) IN ULONG_PTR SelfMapAddress)
{ {
PLIST_ENTRY ModulesList, ModulesListEntry; PLIST_ENTRY ListEntry, ModulesList, ModulesListEntry;
PXTBL_MEMORY_MAPPING Mapping;
PXTBL_MODULE_INFO ModuleInfo; PXTBL_MODULE_INFO ModuleInfo;
EFI_PHYSICAL_ADDRESS Address; EFI_PHYSICAL_ADDRESS Address;
PVOID LoaderBase;
ULONGLONG LoaderSize; ULONGLONG LoaderSize;
EFI_STATUS Status; EFI_STATUS Status;
PVOID LoaderBase;
/* Allocate pages for the Page Map */ /* Allocate pages for the Page Map */
Status = AllocatePages(AllocateAnyPages, 1, &Address); Status = AllocatePages(AllocateAnyPages, 1, &Address);
@@ -43,14 +44,6 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return Status; return Status;
} }
/* Add new memory mapping for the page map itself */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
return Status;
}
/* Assign and zero-fill memory used by page mappings */ /* Assign and zero-fill memory used by page mappings */
PageMap->PtePointer = (PVOID)(UINT_PTR)Address; PageMap->PtePointer = (PVOID)(UINT_PTR)Address;
RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE); RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE);
@@ -64,7 +57,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
} }
/* Map the trampoline code area */ /* Map the trampoline code area */
Status = MapVirtualMemory(PageMap, MM_TRAMPOLINE_ADDRESS, MM_TRAMPOLINE_ADDRESS, Status = MapVirtualMemory(PageMap, (PVOID)MM_TRAMPOLINE_ADDRESS,(PVOID)MM_TRAMPOLINE_ADDRESS,
1, LoaderFirmwareTemporary); 1, LoaderFirmwareTemporary);
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
{ {
@@ -81,7 +74,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
ModuleInfo = CONTAIN_RECORD(ModulesListEntry, XTBL_MODULE_INFO, Flink); ModuleInfo = CONTAIN_RECORD(ModulesListEntry, XTBL_MODULE_INFO, Flink);
/* Map module code */ /* Map module code */
Status = MapVirtualMemory(PageMap, (ULONGLONG)ModuleInfo->ModuleBase, (ULONGLONG)ModuleInfo->ModuleBase, Status = MapVirtualMemory(PageMap, ModuleInfo->ModuleBase, ModuleInfo->ModuleBase,
EFI_SIZE_TO_PAGES(ModuleInfo->ModuleSize), LoaderFirmwareTemporary); EFI_SIZE_TO_PAGES(ModuleInfo->ModuleSize), LoaderFirmwareTemporary);
/* Check if mapping succeeded */ /* Check if mapping succeeded */
@@ -102,7 +95,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
if(LoaderBase && LoaderSize) if(LoaderBase && LoaderSize)
{ {
/* Map boot loader code as well */ /* Map boot loader code as well */
Status = MapVirtualMemory(PageMap, (ULONGLONG)LoaderBase, (ULONGLONG)LoaderBase, Status = MapVirtualMemory(PageMap, LoaderBase, LoaderBase,
EFI_SIZE_TO_PAGES(LoaderSize), LoaderFirmwareTemporary); EFI_SIZE_TO_PAGES(LoaderSize), LoaderFirmwareTemporary);
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
{ {
@@ -116,28 +109,6 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return STATUS_EFI_PROTOCOL_ERROR; return STATUS_EFI_PROTOCOL_ERROR;
} }
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Iterates through the memory map and physically maps all virtual addresses to page tables.
*
* @param PageMap
* Supplies a pointer to the page mapping structure.
*
* @return This routine returns a status code.
*
* @since XT 1.0
*/
XTCDECL
EFI_STATUS
Memory::CommitPageMap(IN PXTBL_PAGE_MAPPING PageMap)
{
PXTBL_MEMORY_MAPPING Mapping;
PLIST_ENTRY ListEntry;
EFI_STATUS Status;
/* Iterate through and map all the mappings*/ /* Iterate through and map all the mappings*/
Debug::Print(L"Mapping and dumping EFI memory:\n"); Debug::Print(L"Mapping and dumping EFI memory:\n");
ListEntry = PageMap->MemoryMap.Flink; ListEntry = PageMap->MemoryMap.Flink;
@@ -222,7 +193,7 @@ Memory::GetNextPageTable(IN PXTBL_PAGE_MAPPING PageMap,
} }
/* Add new memory mapping */ /* Add new memory mapping */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData); Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)(UINT_PTR)Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
{ {
/* Memory mapping failure */ /* Memory mapping failure */
@@ -268,9 +239,9 @@ Memory::GetNextPageTable(IN PXTBL_PAGE_MAPPING PageMap,
XTCDECL XTCDECL
EFI_STATUS EFI_STATUS
Memory::MapPage(IN PXTBL_PAGE_MAPPING PageMap, Memory::MapPage(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONGLONG VirtualAddress, IN ULONG_PTR VirtualAddress,
IN ULONGLONG PhysicalAddress, IN ULONG_PTR PhysicalAddress,
IN ULONGLONG NumberOfPages) IN ULONG NumberOfPages)
{ {
PVOID Pml1, Pml2, Pml3, Pml4, Pml5; PVOID Pml1, Pml2, Pml3, Pml4, Pml5;
SIZE_T Pml1Entry, Pml2Entry, Pml3Entry, Pml4Entry, Pml5Entry; SIZE_T Pml1Entry, Pml2Entry, Pml3Entry, Pml4Entry, Pml5Entry;

View File

@@ -25,12 +25,13 @@ EFI_STATUS
Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap, Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONG_PTR SelfMapAddress) IN ULONG_PTR SelfMapAddress)
{ {
PLIST_ENTRY ListEntry, ModulesList, ModulesListEntry;
EFI_PHYSICAL_ADDRESS Address, DirectoryAddress; EFI_PHYSICAL_ADDRESS Address, DirectoryAddress;
PLIST_ENTRY ModulesList, ModulesListEntry;
PXTBL_MODULE_INFO ModuleInfo; PXTBL_MODULE_INFO ModuleInfo;
PXTBL_MEMORY_MAPPING Mapping;
PVOID LoaderBase;
ULONGLONG LoaderSize; ULONGLONG LoaderSize;
EFI_STATUS Status; EFI_STATUS Status;
PVOID LoaderBase;
ULONG Index; ULONG Index;
/* Check the page map level to determine which paging structure to create */ /* Check the page map level to determine which paging structure to create */
@@ -44,14 +45,6 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return Status; return Status;
} }
/* Add new memory mapping for the page map itself */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
return Status;
}
/* Assign the allocated page to the page map and zero it out */ /* Assign the allocated page to the page map and zero it out */
PageMap->PtePointer = (PVOID)(UINT_PTR)Address; PageMap->PtePointer = (PVOID)(UINT_PTR)Address;
RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE); RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE);
@@ -64,14 +57,6 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return Status; return Status;
} }
/* Add new memory mapping for the Page Directories (PDs) */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, DirectoryAddress, 4, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
return Status;
}
/* Zero-fill the allocated memory for the Page Directories */ /* Zero-fill the allocated memory for the Page Directories */
RTL::Memory::ZeroMemory((PVOID)DirectoryAddress, EFI_PAGE_SIZE * 4); RTL::Memory::ZeroMemory((PVOID)DirectoryAddress, EFI_PAGE_SIZE * 4);
@@ -94,14 +79,6 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return Status; return Status;
} }
/* Add new memory mapping for the page map itself */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
return Status;
}
/* Assign the allocated page to the page map and zero it out */ /* Assign the allocated page to the page map and zero it out */
PageMap->PtePointer = (PVOID)(UINT_PTR)Address; PageMap->PtePointer = (PVOID)(UINT_PTR)Address;
RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE); RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE);
@@ -116,7 +93,8 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
} }
/* Map the trampoline code area */ /* Map the trampoline code area */
Status = MapVirtualMemory(PageMap, MM_TRAMPOLINE_ADDRESS, MM_TRAMPOLINE_ADDRESS, 1, LoaderFirmwareTemporary); Status = MapVirtualMemory(PageMap, (PVOID)MM_TRAMPOLINE_ADDRESS,(PVOID)MM_TRAMPOLINE_ADDRESS,
1, LoaderFirmwareTemporary);
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
{ {
/* Mapping trampoline code failed */ /* Mapping trampoline code failed */
@@ -132,7 +110,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
ModuleInfo = CONTAIN_RECORD(ModulesListEntry, XTBL_MODULE_INFO, Flink); ModuleInfo = CONTAIN_RECORD(ModulesListEntry, XTBL_MODULE_INFO, Flink);
/* Map module code */ /* Map module code */
Status = MapVirtualMemory(PageMap, (ULONGLONG)ModuleInfo->ModuleBase, (ULONGLONG)ModuleInfo->ModuleBase, Status = MapVirtualMemory(PageMap, ModuleInfo->ModuleBase, ModuleInfo->ModuleBase,
EFI_SIZE_TO_PAGES(ModuleInfo->ModuleSize), LoaderFirmwareTemporary); EFI_SIZE_TO_PAGES(ModuleInfo->ModuleSize), LoaderFirmwareTemporary);
/* Check if mapping succeeded */ /* Check if mapping succeeded */
@@ -153,7 +131,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
if(LoaderBase && LoaderSize) if(LoaderBase && LoaderSize)
{ {
/* Map boot loader code as well */ /* Map boot loader code as well */
Status = MapVirtualMemory(PageMap, (ULONGLONG)LoaderBase, (ULONGLONG)LoaderBase, Status = MapVirtualMemory(PageMap, LoaderBase, LoaderBase,
EFI_SIZE_TO_PAGES(LoaderSize), LoaderFirmwareTemporary); EFI_SIZE_TO_PAGES(LoaderSize), LoaderFirmwareTemporary);
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
{ {
@@ -167,28 +145,6 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return STATUS_EFI_PROTOCOL_ERROR; return STATUS_EFI_PROTOCOL_ERROR;
} }
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Iterates through the memory map and physically maps all virtual addresses to page tables.
*
* @param PageMap
* Supplies a pointer to the page mapping structure.
*
* @return This routine returns a status code.
*
* @since XT 1.0
*/
XTCDECL
EFI_STATUS
Memory::CommitPageMap(IN PXTBL_PAGE_MAPPING PageMap)
{
PXTBL_MEMORY_MAPPING Mapping;
PLIST_ENTRY ListEntry;
EFI_STATUS Status;
/* Iterate through and map all the mappings*/ /* Iterate through and map all the mappings*/
Debug::Print(L"Mapping and dumping EFI memory:\n"); Debug::Print(L"Mapping and dumping EFI memory:\n");
ListEntry = PageMap->MemoryMap.Flink; ListEntry = PageMap->MemoryMap.Flink;
@@ -201,9 +157,8 @@ Memory::CommitPageMap(IN PXTBL_PAGE_MAPPING PageMap)
if(Mapping->VirtualAddress) if(Mapping->VirtualAddress)
{ {
/* Dump memory mapping */ /* Dump memory mapping */
Debug::Print(L" Type=%02lu, PhysicalBase=0x%.8llX, VirtualBase=0x%.8llX, Pages=%llu\n", Debug::Print(L" Type=%02lu, PhysicalBase=%.8P, VirtualBase=%.8P, Pages=%llu\n", Mapping->MemoryType,
Mapping->MemoryType, Mapping->PhysicalAddress, Mapping->PhysicalAddress, Mapping->VirtualAddress, Mapping->NumberOfPages);
Mapping->VirtualAddress, Mapping->NumberOfPages);
/* Map memory */ /* Map memory */
Status = MapPage(PageMap, (UINT_PTR)Mapping->VirtualAddress, Status = MapPage(PageMap, (UINT_PTR)Mapping->VirtualAddress,
@@ -297,7 +252,7 @@ Memory::GetNextPageTable(IN PXTBL_PAGE_MAPPING PageMap,
} }
/* Add new memory mapping */ /* Add new memory mapping */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData); Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)(UINT_PTR)Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
{ {
/* Memory mapping failure */ /* Memory mapping failure */
@@ -358,11 +313,11 @@ Memory::GetNextPageTable(IN PXTBL_PAGE_MAPPING PageMap,
XTCDECL XTCDECL
EFI_STATUS EFI_STATUS
Memory::MapPage(IN PXTBL_PAGE_MAPPING PageMap, Memory::MapPage(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONGLONG VirtualAddress, IN ULONG_PTR VirtualAddress,
IN ULONGLONG PhysicalAddress, IN ULONG_PTR PhysicalAddress,
IN ULONGLONG NumberOfPages) IN ULONG NumberOfPages)
{ {
ULONGLONG PageFrameNumber; SIZE_T PageFrameNumber;
PVOID Pml1, Pml2, Pml3; PVOID Pml1, Pml2, Pml3;
SIZE_T Pml1Entry, Pml2Entry, Pml3Entry; SIZE_T Pml1Entry, Pml2Entry, Pml3Entry;
PHARDWARE_LEGACY_PTE LegacyPmlTable; PHARDWARE_LEGACY_PTE LegacyPmlTable;

View File

@@ -1,190 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtldr/biosutil.cc
* DESCRIPTION: Legacy BIOS support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtldr.hh>
/**
* Clears the entire screen and moves the cursor to the top-left corner.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
BiosUtils::ClearScreen()
{
VOLATILE PUSHORT VgaBuffer = (PUSHORT)0xB8000;
USHORT Blank;
UINT Index;
/* Set blank character */
Blank = (0x0F << 8) | L' ';
/* Fill the entire screen with blank characters */
for(Index = 0; Index < VgaWidth * VgaHeight; Index++)
{
VgaBuffer[Index] = Blank;
}
/* Reset cursor position to the top-left corner */
CursorX = 0;
CursorY = 0;
/* Update the hardware cursor position */
UpdateCursor();
}
/**
* Formats the input string and prints it out to the screen.
*
* @param Format
* The formatted string that is to be written to the output.
*
* @param ...
* Depending on the format string, this routine might expect a sequence of additional arguments.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
BiosUtils::Print(IN PCWSTR Format,
IN ...)
{
RTL_PRINT_CONTEXT PrintContext;
VA_LIST Arguments;
/* Initialise the print contexts */
PrintContext.WriteWideCharacter = PutChar;
/* Initialise the va_list */
VA_START(Arguments, Format);
/* Format and print the string to the stdout */
RTL::WideString::FormatWideString(&PrintContext, (PWCHAR)Format, Arguments);
/* Clean up the va_list */
VA_END(Arguments);
}
/**
* Writes a single wide character to the screen using legacy BIOS VGA text mode.
*
* @param Character
* The wide character to be printed.
*
* @return This routine returns a status code.
*
* @since XT 1.0
*/
XTCDECL
XTSTATUS
BiosUtils::PutChar(IN WCHAR Character)
{
VOLATILE PUSHORT VgaBuffer = (PUSHORT)0xB8000;
USHORT VgaCharacter;
/* Handle special characters */
if(Character == L'\n')
{
/* Move to the next line */
CursorX = 0;
CursorY++;
}
else if(Character == L'\r')
{
/* Move to the beginning of the current line */
CursorX = 0;
}
else
{
/* Print character and move cursor to the right */
VgaCharacter = (0x0F << 8) | (Character & 0xFF);
VgaBuffer[CursorY * VgaWidth + CursorX] = VgaCharacter;
CursorX++;
}
/* Handle moving to the next line if cursor is at the end of the line */
if(CursorX >= VgaWidth)
{
CursorX = 0;
CursorY++;
}
/* Handle scrolling if cursor is at the end of the screen */
if(CursorY >= VgaHeight)
{
ScrollScreen();
CursorY = VgaHeight - 1;
}
/* Update the hardware cursor position */
UpdateCursor();
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Scrolls the entire screen content up by one line and clears the last line.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
BiosUtils::ScrollScreen()
{
VOLATILE PUSHORT VgaBuffer = (PUSHORT)0xB8000;
USHORT Blank;
UINT Index;
/* Set blank character */
Blank = (0x0F << 8) | L' ';
/* Move every line up by one */
for(Index = 0; Index < (VgaHeight - 1) * VgaWidth; Index++)
{
VgaBuffer[Index] = VgaBuffer[Index + VgaWidth];
}
/* Clear the last line */
for(Index = (VgaHeight - 1) * VgaWidth; Index < VgaHeight * VgaWidth; Index++)
{
VgaBuffer[Index] = Blank;
}
}
/**
* Updates the hardware cursor position on the screen.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
BiosUtils::UpdateCursor()
{
USHORT Position;
/* Calculate cursor position */
Position = CursorY * VgaWidth + CursorX;
/* Send command to set the high byte of the cursor position */
HL::IoPort::WritePort8(0x3D4, 0x0E);
HL::IoPort::WritePort8(0x3D5, (UCHAR)((Position >> 8) & 0xFF));
/* Send command to set the low byte of the cursor position */
HL::IoPort::WritePort8(0x3D4, 0x0F);
HL::IoPort::WritePort8(0x3D5, (UCHAR)(Position & 0xFF));
}

View File

@@ -221,15 +221,10 @@ Console::QueryMode(OUT PUINT_PTR ResX,
* @since XT 1.0 * @since XT 1.0
*/ */
XTCDECL XTCDECL
EFI_STATUS VOID
Console::ReadKeyStroke(OUT PEFI_INPUT_KEY Key) Console::ReadKeyStroke(OUT PEFI_INPUT_KEY Key)
{ {
/* Clear the key structure to prevent ghost keystrokes */ XtLoader::GetEfiSystemTable()->ConIn->ReadKeyStroke(XtLoader::GetEfiSystemTable()->ConIn, Key);
Key->ScanCode = 0;
Key->UnicodeChar = 0;
/* Read the keystroke from the EFI input console */
return XtLoader::GetEfiSystemTable()->ConIn->ReadKeyStroke(XtLoader::GetEfiSystemTable()->ConIn, Key);
} }
/** /**

View File

@@ -10,18 +10,6 @@
#include <xtldr.hh> #include <xtldr.hh>
/* Legacy BIOS cursor X position */
USHORT BiosUtils::CursorX = 0;
/* Legacy BIOS cursor Y position */
USHORT BiosUtils::CursorY = 0;
/* Legacy BIOS screen height */
CONST USHORT BiosUtils::VgaHeight = 25;
/* Legacy BIOS screen width */
CONST USHORT BiosUtils::VgaWidth = 80;
/* XT Boot Loader menu list */ /* XT Boot Loader menu list */
PLIST_ENTRY Configuration::BootMenuList = NULLPTR; PLIST_ENTRY Configuration::BootMenuList = NULLPTR;
@@ -56,21 +44,6 @@ XTBL_LOADER_PROTOCOL Protocol::LoaderProtocol;
/* XT Boot Loader loaded modules list */ /* XT Boot Loader loaded modules list */
LIST_ENTRY Protocol::LoadedModules; LIST_ENTRY Protocol::LoadedModules;
/* XT Boot Loader shell exit flag */
BOOLEAN Shell::ExitRequest;
/* XT Boot Loader shell history buffer */
WCHAR Shell::History[XTBL_SH_HISTORY_ENTRIES][XTBL_SH_MAX_LINE_LENGTH];
/* XT Boot Loader shell history count */
ULONG Shell::HistoryCount = 0;
/* XT Boot Loader shell history index */
ULONG Shell::HistoryIndex = 0;
/* XT Boot Loader shell commands list */
LIST_ENTRY Shell::ShellCommands;
/* List of available block devices */ /* List of available block devices */
LIST_ENTRY Volume::EfiBlockDevices; LIST_ENTRY Volume::EfiBlockDevices;

View File

@@ -15,25 +15,6 @@
#include <libxtos.hh> #include <libxtos.hh>
class BiosUtils
{
private:
STATIC USHORT CursorX;
STATIC USHORT CursorY;
STATIC CONST USHORT VgaHeight;
STATIC CONST USHORT VgaWidth;
public:
STATIC XTCDECL VOID ClearScreen();
STATIC XTCDECL VOID Print(IN PCWSTR Format,
IN ...);
STATIC XTCDECL XTSTATUS PutChar(IN WCHAR Character);
private:
STATIC XTCDECL VOID ScrollScreen();
STATIC XTCDECL VOID UpdateCursor();
};
class BootUtils class BootUtils
{ {
public: public:
@@ -93,7 +74,7 @@ class Console
STATIC XTCDECL XTSTATUS PutChar(IN WCHAR Character); STATIC XTCDECL XTSTATUS PutChar(IN WCHAR Character);
STATIC XTCDECL VOID QueryMode(OUT PUINT_PTR ResX, STATIC XTCDECL VOID QueryMode(OUT PUINT_PTR ResX,
OUT PUINT_PTR ResY); OUT PUINT_PTR ResY);
STATIC XTCDECL EFI_STATUS ReadKeyStroke(OUT PEFI_INPUT_KEY Key); STATIC XTCDECL VOID ReadKeyStroke(OUT PEFI_INPUT_KEY Key);
STATIC XTCDECL VOID ResetInputBuffer(); STATIC XTCDECL VOID ResetInputBuffer();
STATIC XTCDECL VOID SetAttributes(IN ULONGLONG Attributes); STATIC XTCDECL VOID SetAttributes(IN ULONGLONG Attributes);
STATIC XTCDECL VOID SetCursorPosition(IN ULONGLONG PosX, STATIC XTCDECL VOID SetCursorPosition(IN ULONGLONG PosX,
@@ -165,7 +146,6 @@ class Memory
OUT PVOID *Memory); OUT PVOID *Memory);
STATIC XTCDECL EFI_STATUS BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap, STATIC XTCDECL EFI_STATUS BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONG_PTR SelfMapAddress); IN ULONG_PTR SelfMapAddress);
STATIC XTCDECL EFI_STATUS CommitPageMap(IN PXTBL_PAGE_MAPPING PageMap);
STATIC XTCDECL EFI_STATUS FreePages(IN ULONGLONG NumberOfPages, STATIC XTCDECL EFI_STATUS FreePages(IN ULONGLONG NumberOfPages,
IN EFI_PHYSICAL_ADDRESS Memory); IN EFI_PHYSICAL_ADDRESS Memory);
STATIC XTCDECL EFI_STATUS FreePool(IN PVOID Memory); STATIC XTCDECL EFI_STATUS FreePool(IN PVOID Memory);
@@ -178,16 +158,15 @@ class Memory
IN SHORT PageMapLevel, IN SHORT PageMapLevel,
IN PAGE_SIZE PageSize); IN PAGE_SIZE PageSize);
STATIC XTCDECL EFI_STATUS MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap, STATIC XTCDECL EFI_STATUS MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
IN OUT PVOID *BaseAddress, IN OUT PVOID *MemoryMapAddress,
IN BOOLEAN IdentityMapping,
IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine); IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine);
STATIC XTCDECL EFI_STATUS MapPage(IN PXTBL_PAGE_MAPPING PageMap, STATIC XTCDECL EFI_STATUS MapPage(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONGLONG VirtualAddress, IN ULONG_PTR VirtualAddress,
IN ULONGLONG PhysicalAddress, IN ULONG_PTR PhysicalAddress,
IN ULONGLONG NumberOfPages); IN ULONG NumberOfPages);
STATIC XTCDECL EFI_STATUS MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap, STATIC XTCDECL EFI_STATUS MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
IN ULONGLONG VirtualAddress, IN PVOID VirtualAddress,
IN ULONGLONG PhysicalAddress, IN PVOID PhysicalAddress,
IN ULONGLONG NumberOfPages, IN ULONGLONG NumberOfPages,
IN LOADER_MEMORY_TYPE MemoryType); IN LOADER_MEMORY_TYPE MemoryType);
STATIC XTCDECL PVOID PhysicalAddressToVirtual(IN PVOID PhysicalAddress, STATIC XTCDECL PVOID PhysicalAddressToVirtual(IN PVOID PhysicalAddress,
@@ -253,47 +232,11 @@ class Protocol
class Shell class Shell
{ {
private:
STATIC BOOLEAN ExitRequest;
STATIC WCHAR History[XTBL_SH_HISTORY_ENTRIES][XTBL_SH_MAX_LINE_LENGTH];
STATIC ULONG HistoryCount;
STATIC ULONG HistoryIndex;
STATIC LIST_ENTRY ShellCommands;
public: public:
STATIC XTCDECL EFI_STATUS RegisterCommand(IN PCWSTR Command,
IN PCWSTR Description,
IN PBL_SHELL_COMMAND Handler);
STATIC XTCDECL VOID StartLoaderShell(); STATIC XTCDECL VOID StartLoaderShell();
private: private:
STATIC XTCDECL VOID CommandExit(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID CommandHelp(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID CommandInsmod(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID CommandLsmod(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID CommandPoweroff(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID CommandReboot(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID CommandVersion(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID ExecuteCommand(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL EFI_STATUS ParseCommand(IN PWCHAR CommandLine,
OUT PULONG Argc,
OUT PWCHAR **Argv);
STATIC XTCDECL VOID PrintPrompt(); STATIC XTCDECL VOID PrintPrompt();
STATIC XTCDECL VOID PrintPromptLine(IN PWCHAR Buffer,
IN ULONG BufferLength,
IN ULONG CursorPosition,
IN ULONG PreviousBufferLength);
STATIC XTCDECL VOID ReadCommand(OUT PWCHAR Buffer,
IN ULONG BufferSize);
STATIC XTCDECL VOID RegisterBuiltinCommands();
}; };
class TextUi class TextUi

View File

@@ -314,12 +314,9 @@ Memory::InitializePageMap(OUT PXTBL_PAGE_MAPPING PageMap,
* @param PageMap * @param PageMap
* Supplies a pointer to the page mapping structure. * Supplies a pointer to the page mapping structure.
* *
* @param BaseAddress * @param MemoryMapAddress
* Supplies a virtual address, where EFI memory will be mapped. * Supplies a virtual address, where EFI memory will be mapped.
* *
* @param IdentityMapping
* Specifies whether EFI non-free memory should be mapped by identity or sequential mapping.
*
* @param GetMemoryTypeRoutine * @param GetMemoryTypeRoutine
* Supplies a pointer to the routine which will be used to match EFI memory type to the OS memory type. * Supplies a pointer to the routine which will be used to match EFI memory type to the OS memory type.
* *
@@ -330,20 +327,19 @@ Memory::InitializePageMap(OUT PXTBL_PAGE_MAPPING PageMap,
XTCDECL XTCDECL
EFI_STATUS EFI_STATUS
Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap, Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
IN OUT PVOID *BaseAddress, IN OUT PVOID *MemoryMapAddress,
IN BOOLEAN IdentityMapping,
IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine) IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine)
{ {
ULONGLONG MaxAddress, VirtualAddress;
PEFI_MEMORY_DESCRIPTOR Descriptor; PEFI_MEMORY_DESCRIPTOR Descriptor;
LOADER_MEMORY_TYPE MemoryType; LOADER_MEMORY_TYPE MemoryType;
PEFI_MEMORY_MAP MemoryMap; PEFI_MEMORY_MAP MemoryMap;
SIZE_T DescriptorCount; SIZE_T DescriptorCount;
PUCHAR VirtualAddress;
EFI_STATUS Status; EFI_STATUS Status;
SIZE_T Index; SIZE_T Index;
/* Set virtual address as specified in argument */ /* Set virtual address as specified in argument */
VirtualAddress = (ULONGLONG)*BaseAddress; VirtualAddress = (PUCHAR)*MemoryMapAddress;
/* Check if custom memory type routine is specified */ /* Check if custom memory type routine is specified */
if(GetMemoryTypeRoutine == NULLPTR) if(GetMemoryTypeRoutine == NULLPTR)
@@ -371,37 +367,8 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
/* Iterate through all descriptors from the memory map */ /* Iterate through all descriptors from the memory map */
for(Index = 0; Index < DescriptorCount; Index++) for(Index = 0; Index < DescriptorCount; Index++)
{ {
/* Check page map level */ /* Make sure descriptor does not start beyond lowest physical page */
if(PageMap->PageMapLevel == 2) if(Descriptor->PhysicalStart <= MAXUINT_PTR)
{
/* Limit physical address to 4GB in legacy mode */
MaxAddress = 0xFFFFFFFF;
}
else if(PageMap->PageMapLevel == 3)
{
/* Limit physical address to 64GB in PAE mode */
MaxAddress = 0xFFFFFFFFFULL;
}
/* Check page map level */
if(PageMap->PageMapLevel == 2 || PageMap->PageMapLevel == 3)
{
/* Check if physical address starts beyond limit */
if(Descriptor->PhysicalStart >= MaxAddress)
{
/* Go to the next descriptor */
Descriptor = (PEFI_MEMORY_DESCRIPTOR)((PUCHAR)Descriptor + MemoryMap->DescriptorSize);
continue;
}
/* Check if memory descriptor exceeds the lowest physical page */
if(Descriptor->PhysicalStart + (Descriptor->NumberOfPages << EFI_PAGE_SHIFT) > MaxAddress)
{
/* Truncate memory descriptor to the lowest supported physical page */
Descriptor->NumberOfPages = (MaxAddress - Descriptor->PhysicalStart) >> EFI_PAGE_SHIFT;
}
}
{ {
/* Skip EFI reserved memory */ /* Skip EFI reserved memory */
if(Descriptor->Type == EfiReservedMemoryType) if(Descriptor->Type == EfiReservedMemoryType)
@@ -411,6 +378,25 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
continue; continue;
} }
/* Check if preparing page map level 2 (non-PAE i686) */
if(PageMap->PageMapLevel == 2)
{
/* Check if physical address starts beyond 4GB */
if(Descriptor->PhysicalStart > 0xFFFFFFFF)
{
/* Go to the next descriptor */
Descriptor = (PEFI_MEMORY_DESCRIPTOR)((PUCHAR)Descriptor + MemoryMap->DescriptorSize);
continue;
}
/* Check if memory descriptor exceeds the lowest physical page */
if(Descriptor->PhysicalStart + (Descriptor->NumberOfPages << EFI_PAGE_SHIFT) > MAXULONG)
{
/* Truncate memory descriptor to the 4GB */
Descriptor->NumberOfPages = (((ULONGLONG)MAXULONG + 1) - Descriptor->PhysicalStart) >> EFI_PAGE_SHIFT;
}
}
/* Convert EFI memory type into XTLDR memory type */ /* Convert EFI memory type into XTLDR memory type */
MemoryType = GetMemoryTypeRoutine((EFI_MEMORY_TYPE)Descriptor->Type); MemoryType = GetMemoryTypeRoutine((EFI_MEMORY_TYPE)Descriptor->Type);
@@ -418,32 +404,22 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
if(MemoryType == LoaderFirmwareTemporary) if(MemoryType == LoaderFirmwareTemporary)
{ {
/* Map EFI firmware code */ /* Map EFI firmware code */
Status = MapVirtualMemory(PageMap, Descriptor->PhysicalStart, Status = MapVirtualMemory(PageMap, (PVOID)Descriptor->PhysicalStart,
Descriptor->PhysicalStart, Descriptor->NumberOfPages, MemoryType); (PVOID)Descriptor->PhysicalStart, Descriptor->NumberOfPages, MemoryType);
} }
else if(MemoryType != LoaderFree) else if(MemoryType != LoaderFree)
{ {
/* Check mapping strategy */ /* Add any non-free memory mapping */
if(IdentityMapping) Status = MapVirtualMemory(PageMap, VirtualAddress, (PVOID)Descriptor->PhysicalStart,
{
/* Add any non-free memory using identity mapping */
Status = MapVirtualMemory(PageMap, Descriptor->PhysicalStart + KSEG0_BASE, Descriptor->PhysicalStart,
Descriptor->NumberOfPages, MemoryType);
}
else
{
/* Add any non-free memory using sequential mapping */
Status = MapVirtualMemory(PageMap, VirtualAddress, Descriptor->PhysicalStart,
Descriptor->NumberOfPages, MemoryType); Descriptor->NumberOfPages, MemoryType);
/* Update virtual address */ /* Calculate next valid virtual address */
VirtualAddress = VirtualAddress + (Descriptor->NumberOfPages * MM_PAGE_SIZE); VirtualAddress += Descriptor->NumberOfPages * EFI_PAGE_SIZE;
}
} }
else else
{ {
/* Map all other memory as loader free */ /* Map all other memory as loader free */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Descriptor->PhysicalStart, Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)Descriptor->PhysicalStart,
Descriptor->NumberOfPages, LoaderFree); Descriptor->NumberOfPages, LoaderFree);
} }
@@ -460,7 +436,7 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
} }
/* Always map first page */ /* Always map first page */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, 0, 1, LoaderFirmwarePermanent); Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)0, 1, LoaderFirmwarePermanent);
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
{ {
/* Mapping failed */ /* Mapping failed */
@@ -468,7 +444,7 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
} }
/* Map BIOS ROM and VRAM */ /* Map BIOS ROM and VRAM */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, 0xA0000, 0x60, LoaderFirmwarePermanent); Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)0xA0000, 0x60, LoaderFirmwarePermanent);
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
{ {
/* Mapping failed */ /* Mapping failed */
@@ -476,7 +452,7 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
} }
/* Store next valid virtual address and return success */ /* Store next valid virtual address and return success */
*BaseAddress = (PVOID)VirtualAddress; *MemoryMapAddress = VirtualAddress;
return STATUS_EFI_SUCCESS; return STATUS_EFI_SUCCESS;
} }
@@ -505,13 +481,13 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
XTCDECL XTCDECL
EFI_STATUS EFI_STATUS
Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap, Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
IN ULONGLONG VirtualAddress, IN PVOID VirtualAddress,
IN ULONGLONG PhysicalAddress, IN PVOID PhysicalAddress,
IN ULONGLONG NumberOfPages, IN ULONGLONG NumberOfPages,
IN LOADER_MEMORY_TYPE MemoryType) IN LOADER_MEMORY_TYPE MemoryType)
{ {
PXTBL_MEMORY_MAPPING Mapping1, Mapping2, Mapping3; PXTBL_MEMORY_MAPPING Mapping1, Mapping2, Mapping3;
ULONGLONG PhysicalAddressEnd, PhysicalAddress2End; PVOID PhysicalAddressEnd, PhysicalAddress2End;
PLIST_ENTRY ListEntry, MappingListEntry; PLIST_ENTRY ListEntry, MappingListEntry;
SIZE_T NumberOfMappedPages; SIZE_T NumberOfMappedPages;
EFI_STATUS Status; EFI_STATUS Status;
@@ -531,7 +507,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
Mapping1->MemoryType = MemoryType; Mapping1->MemoryType = MemoryType;
/* Calculate the end of the physical address */ /* Calculate the end of the physical address */
PhysicalAddressEnd = PhysicalAddress + (NumberOfPages * EFI_PAGE_SIZE) - 1; PhysicalAddressEnd = (PVOID)((ULONG_PTR)PhysicalAddress + (NumberOfPages * EFI_PAGE_SIZE) - 1);
/* Iterate through all the mappings already set to insert new mapping at the correct place */ /* Iterate through all the mappings already set to insert new mapping at the correct place */
ListEntry = PageMap->MemoryMap.Flink; ListEntry = PageMap->MemoryMap.Flink;
@@ -539,7 +515,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
{ {
/* Take a mapping from the list and calculate its end of physical address */ /* Take a mapping from the list and calculate its end of physical address */
Mapping2 = CONTAIN_RECORD(ListEntry, XTBL_MEMORY_MAPPING, ListEntry); Mapping2 = CONTAIN_RECORD(ListEntry, XTBL_MEMORY_MAPPING, ListEntry);
PhysicalAddress2End = Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1; PhysicalAddress2End = (PVOID)((ULONG_PTR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1);
/* Check if new mapping is a subset of an existing mapping */ /* Check if new mapping is a subset of an existing mapping */
if(Mapping1->PhysicalAddress >= Mapping2->PhysicalAddress && PhysicalAddressEnd <= PhysicalAddress2End) if(Mapping1->PhysicalAddress >= Mapping2->PhysicalAddress && PhysicalAddressEnd <= PhysicalAddress2End)
@@ -547,8 +523,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
/* Make sure it's memory type is the same */ /* Make sure it's memory type is the same */
if(Mapping1->MemoryType == Mapping2->MemoryType) if(Mapping1->MemoryType == Mapping2->MemoryType)
{ {
/* Free the unused mapping structure and return success */ /* It is already mapped */
FreePool(Mapping1);
return STATUS_EFI_SUCCESS; return STATUS_EFI_SUCCESS;
} }
} }
@@ -564,7 +539,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
} }
/* Calculate number of pages for this mapping */ /* Calculate number of pages for this mapping */
NumberOfMappedPages = (PhysicalAddress2End - PhysicalAddressEnd) / EFI_PAGE_SIZE; NumberOfMappedPages = ((PUCHAR)PhysicalAddress2End - (PUCHAR)PhysicalAddressEnd) / EFI_PAGE_SIZE;
if(NumberOfMappedPages > 0) if(NumberOfMappedPages > 0)
{ {
/* Pages associated to the mapping, allocate memory for it */ /* Pages associated to the mapping, allocate memory for it */
@@ -575,21 +550,18 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
return Status; return Status;
} }
/* Set mapping fields */ /* Set mapping fields and insert it on the top */
Mapping3->PhysicalAddress = PhysicalAddressEnd + 1; Mapping3->PhysicalAddress = (PUCHAR)PhysicalAddressEnd + 1;
Mapping3->VirtualAddress = (ULONGLONG)NULLPTR; Mapping3->VirtualAddress = NULLPTR;
Mapping3->NumberOfPages = NumberOfMappedPages; Mapping3->NumberOfPages = NumberOfMappedPages;
Mapping3->MemoryType = Mapping2->MemoryType; Mapping3->MemoryType = Mapping2->MemoryType;
/* Insert new mapping in front of the list and increase page map size */
RTL::LinkedList::InsertHeadList(&Mapping2->ListEntry, &Mapping3->ListEntry); RTL::LinkedList::InsertHeadList(&Mapping2->ListEntry, &Mapping3->ListEntry);
PageMap->MapSize++;
} }
/* Calculate number of pages and the end of the physical address */ /* Calculate number of pages and the end of the physical address */
Mapping2->NumberOfPages = ((PUCHAR)PhysicalAddressEnd + 1 - Mapping2->NumberOfPages = ((PUCHAR)PhysicalAddressEnd + 1 -
(PUCHAR)Mapping2->PhysicalAddress) / EFI_PAGE_SIZE; (PUCHAR)Mapping2->PhysicalAddress) / EFI_PAGE_SIZE;
PhysicalAddress2End = Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1; PhysicalAddress2End = (PVOID)((ULONG_PTR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1);
} }
/* Check if they overlap */ /* Check if they overlap */
@@ -614,21 +586,18 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
return Status; return Status;
} }
/* Set mapping fields */ /* Set mapping fields and insert it on the top */
Mapping3->PhysicalAddress = Mapping1->PhysicalAddress; Mapping3->PhysicalAddress = Mapping1->PhysicalAddress;
Mapping3->VirtualAddress = (ULONGLONG)NULLPTR; Mapping3->VirtualAddress = NULLPTR;
Mapping3->NumberOfPages = NumberOfMappedPages; Mapping3->NumberOfPages = NumberOfMappedPages;
Mapping3->MemoryType = Mapping2->MemoryType; Mapping3->MemoryType = Mapping2->MemoryType;
/* Insert new mapping in front of the list and increase page map size */
RTL::LinkedList::InsertHeadList(&Mapping2->ListEntry, &Mapping3->ListEntry); RTL::LinkedList::InsertHeadList(&Mapping2->ListEntry, &Mapping3->ListEntry);
PageMap->MapSize++;
} }
/* Calculate number of pages and the end of the physical address */ /* Calculate number of pages and the end of the physical address */
Mapping2->NumberOfPages = ((PUCHAR)Mapping1->PhysicalAddress - Mapping2->NumberOfPages = ((PUCHAR)Mapping1->PhysicalAddress -
(PUCHAR)Mapping2->PhysicalAddress) / EFI_PAGE_SIZE; (PUCHAR)Mapping2->PhysicalAddress) / EFI_PAGE_SIZE;
PhysicalAddress2End = Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1; PhysicalAddress2End = (PVOID)((ULONG_PTR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1);
} }
/* Check if mapping is really needed */ /* Check if mapping is really needed */
@@ -650,19 +619,15 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
Status = FreePool(Mapping2); Status = FreePool(Mapping2);
ListEntry = MappingListEntry; ListEntry = MappingListEntry;
/* Decrease page map size and go to the next mapping */ /* Go to the next mapping */
PageMap->MapSize--;
continue; continue;
} }
/* Determine physical address order */ /* Determine physical address order */
if(Mapping2->PhysicalAddress > Mapping1->PhysicalAddress) if(Mapping2->PhysicalAddress > Mapping1->PhysicalAddress)
{ {
/* Insert new mapping in front of the list and increase page map size */ /* Insert new mapping in front */
RTL::LinkedList::InsertHeadList(Mapping2->ListEntry.Blink, &Mapping1->ListEntry); RTL::LinkedList::InsertHeadList(Mapping2->ListEntry.Blink, &Mapping1->ListEntry);
PageMap->MapSize++;
/* Return success */
return STATUS_EFI_SUCCESS; return STATUS_EFI_SUCCESS;
} }
@@ -670,7 +635,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
ListEntry = ListEntry->Flink; ListEntry = ListEntry->Flink;
} }
/* Insert new mapping to the tail of the list and increase page map size */ /* Insert new mapping to the list and increase page map size */
RTL::LinkedList::InsertTailList(&PageMap->MemoryMap, &Mapping1->ListEntry); RTL::LinkedList::InsertTailList(&PageMap->MemoryMap, &Mapping1->ListEntry);
PageMap->MapSize++; PageMap->MapSize++;

View File

@@ -729,11 +729,11 @@ PeCoff::RelocateLoadedImage(IN PPECOFF_IMAGE_CONTEXT Image)
} }
else else
{ {
/* Check if loaded 32-bit PE32 image should be relocated */
/* Set relocation data directory and image base address */ /* Set relocation data directory and image base address */
DataDirectory = &Image->PeHeader->OptionalHeader32.DataDirectory[PECOFF_IMAGE_DIRECTORY_ENTRY_BASERELOC]; DataDirectory = &Image->PeHeader->OptionalHeader32.DataDirectory[PECOFF_IMAGE_DIRECTORY_ENTRY_BASERELOC];
ImageBase = Image->PeHeader->OptionalHeader32.ImageBase; ImageBase = Image->PeHeader->OptionalHeader32.ImageBase;
/* Check if loaded 32-bit PE32 image should be relocated */
if(Image->PeHeader->OptionalHeader32.NumberOfRvaAndSizes <= PECOFF_IMAGE_DIRECTORY_ENTRY_BASERELOC || if(Image->PeHeader->OptionalHeader32.NumberOfRvaAndSizes <= PECOFF_IMAGE_DIRECTORY_ENTRY_BASERELOC ||
DataDirectory->VirtualAddress == 0 || DataDirectory->Size < sizeof(PECOFF_IMAGE_BASE_RELOCATION)) DataDirectory->VirtualAddress == 0 || DataDirectory->Size < sizeof(PECOFF_IMAGE_BASE_RELOCATION))
{ {

View File

@@ -10,49 +10,6 @@
#include <xtos.hh> #include <xtos.hh>
XTCDECL
EFI_STATUS
Xtos::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap)
{
EFI_STATUS Status;
/* Build page map */
Status = XtLdrProtocol->Memory.BuildPageMap(PageMap, (PageMap->PageMapLevel > 4) ? MM_P5E_LA57_BASE : MM_PXE_BASE);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to build page map */
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Map memory for hardware layer */
Status = MapHardwareMemoryPool(PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to map memory for hardware layer */
XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware leyer (Status code: %zX)\n", Status);
return Status;
}
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Determines the appropriate EFI memory mapping strategy for the AMD64 architecture.
*
* @return This routine returns TRUE, what results in an identity mapping.
*
* @since XT 1.0
*/
XTCDECL
BOOLEAN
Xtos::DetermineMappingStrategy()
{
/* Use an identity mapping strategy */
return TRUE;
}
/** /**
* Determines the appropriate paging level (PML) for the AMD64 architecture. * Determines the appropriate paging level (PML) for the AMD64 architecture.
* *
@@ -119,6 +76,24 @@ Xtos::EnablePaging(IN PXTBL_PAGE_MAPPING PageMap)
ULONG_PTR TrampolineSize; ULONG_PTR TrampolineSize;
PVOID TrampolineCode; PVOID TrampolineCode;
/* Build page map */
Status = XtLdrProtocol->Memory.BuildPageMap(PageMap, (PageMap->PageMapLevel > 4) ? MM_P5E_LA57_BASE : MM_PXE_BASE);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to build page map */
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Map memory for hardware layer */
Status = MapHardwareMemoryPool(PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to map memory for hardware layer */
XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware leyer (Status code: %zX)\n", Status);
return Status;
}
/* Check the configured page map level to set the LA57 state accordingly */ /* Check the configured page map level to set the LA57 state accordingly */
if(PageMap->PageMapLevel == 5) if(PageMap->PageMapLevel == 5)
{ {
@@ -198,7 +173,6 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
PHARDWARE_PTE P5eBase, PdeBase, PpeBase, PxeBase; PHARDWARE_PTE P5eBase, PdeBase, PpeBase, PxeBase;
EFI_PHYSICAL_ADDRESS Address; EFI_PHYSICAL_ADDRESS Address;
EFI_STATUS Status; EFI_STATUS Status;
ULONG Index;
if(PageMap->PageMapLevel == 5) if(PageMap->PageMapLevel == 5)
{ {
@@ -216,9 +190,6 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
return Status; return Status;
} }
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Zero fill memory used by P5E */ /* Zero fill memory used by P5E */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE); XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
@@ -253,9 +224,6 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
return Status; return Status;
} }
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Zero fill memory used by PXE */ /* Zero fill memory used by PXE */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE); XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
@@ -284,9 +252,6 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
return Status; return Status;
} }
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Zero fill memory used by PPE */ /* Zero fill memory used by PPE */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE); XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
@@ -305,7 +270,7 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
} }
/* Loop through 2 PDE entries */ /* Loop through 2 PDE entries */
for(Index = 0 ; Index < 2 ; Index++) for(UINT Index = 0 ; Index < 2 ; Index++)
{ {
/* Check if PDE entry already exists */ /* Check if PDE entry already exists */
if(!PdeBase[((MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF) + Index].Valid) if(!PdeBase[((MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF) + Index].Valid)
@@ -318,9 +283,6 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
return Status; return Status;
} }
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Zero fill memory used by PDE */ /* Zero fill memory used by PDE */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE); XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);

View File

@@ -9,62 +9,6 @@
#include <xtos.hh> #include <xtos.hh>
XTCDECL
EFI_STATUS
Xtos::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap)
{
ULONG_PTR SelfMapAddress;
EFI_STATUS Status;
/* Initialize self map address */
if(PageMap->PageMapLevel == 3)
{
/* For PML3 (PAE) use PTE base address */
SelfMapAddress = MM_PTE_BASE;
}
else
{
/* For PML2 (PAE disabled) use legacy PDE base address */
SelfMapAddress = MM_PDE_LEGACY_BASE;
}
/* Build page map */
Status = XtLdrProtocol->Memory.BuildPageMap(PageMap, SelfMapAddress);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to build page map */
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Map memory for hardware layer */
Status = MapHardwareMemoryPool(PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to map memory for hardware layer */
XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware layer (Status code: %zX)\n", Status);
return Status;
}
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Determines the appropriate EFI memory mapping strategy for the i686 architecture.
*
* @return This routine returns FALSE, what results in a sequential mapping.
*
* @since XT 1.0
*/
XTCDECL
BOOLEAN
Xtos::DetermineMappingStrategy()
{
/* Use a sequential mapping strategy */
return FALSE;
}
/** /**
* Determines the appropriate paging level (PML) for the i686 architecture. * Determines the appropriate paging level (PML) for the i686 architecture.
* *
@@ -116,6 +60,24 @@ Xtos::EnablePaging(IN PXTBL_PAGE_MAPPING PageMap)
{ {
EFI_STATUS Status; EFI_STATUS Status;
/* Build page map */
Status = XtLdrProtocol->Memory.BuildPageMap(PageMap, MM_PTE_BASE);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to build page map */
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Map memory for hardware layer */
Status = MapHardwareMemoryPool(PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to map memory for hardware layer */
XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware layer (Status code: %zX)\n", Status);
return Status;
}
/* Exit EFI Boot Services */ /* Exit EFI Boot Services */
XtLdrProtocol->Debug.Print(L"Exiting EFI boot services\n"); XtLdrProtocol->Debug.Print(L"Exiting EFI boot services\n");
Status = XtLdrProtocol->Utils.ExitBootServices(); Status = XtLdrProtocol->Utils.ExitBootServices();
@@ -183,9 +145,6 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
/* Zero fill allocated memory */ /* Zero fill allocated memory */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE); XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Check if PAE is enabled (3-level paging) */ /* Check if PAE is enabled (3-level paging) */
if(PageMap->PageMapLevel == 3) if(PageMap->PageMapLevel == 3)
{ {

View File

@@ -38,9 +38,7 @@ class Xtos
IN PVOID PhysicalAddress, IN PVOID PhysicalAddress,
IN UINT NumberOfPages, IN UINT NumberOfPages,
IN LOADER_MEMORY_TYPE MemoryType); IN LOADER_MEMORY_TYPE MemoryType);
STATIC XTCDECL EFI_STATUS BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap);
STATIC XTCDECL LOADER_MEMORY_TYPE ConvertEfiMemoryType(IN EFI_MEMORY_TYPE EfiMemoryType); STATIC XTCDECL LOADER_MEMORY_TYPE ConvertEfiMemoryType(IN EFI_MEMORY_TYPE EfiMemoryType);
STATIC XTCDECL BOOLEAN DetermineMappingStrategy();
STATIC XTCDECL ULONG DeterminePagingLevel(IN CONST PWCHAR Parameters); STATIC XTCDECL ULONG DeterminePagingLevel(IN CONST PWCHAR Parameters);
STATIC XTCDECL EFI_STATUS EnablePaging(IN PXTBL_PAGE_MAPPING PageMap); STATIC XTCDECL EFI_STATUS EnablePaging(IN PXTBL_PAGE_MAPPING PageMap);
STATIC XTCDECL VOID GetDisplayInformation(OUT PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource, STATIC XTCDECL VOID GetDisplayInformation(OUT PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource,
@@ -48,13 +46,10 @@ class Xtos
IN PULONG_PTR FrameBufferSize, IN PULONG_PTR FrameBufferSize,
IN PXTBL_FRAMEBUFFER_MODE_INFORMATION FrameBufferModeInfo); IN PXTBL_FRAMEBUFFER_MODE_INFORMATION FrameBufferModeInfo);
STATIC XTCDECL EFI_STATUS GetMemoryDescriptorList(IN PXTBL_PAGE_MAPPING PageMap, STATIC XTCDECL EFI_STATUS GetMemoryDescriptorList(IN PXTBL_PAGE_MAPPING PageMap,
IN EFI_PHYSICAL_ADDRESS PhysicalBase, IN PVOID *VirtualAddress,
IN PVOID VirtualBase,
OUT PLIST_ENTRY MemoryDescriptorList); OUT PLIST_ENTRY MemoryDescriptorList);
STATIC XTCDECL EFI_STATUS GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap, STATIC XTCDECL EFI_STATUS GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
IN EFI_PHYSICAL_ADDRESS PhysicalBase, IN PVOID *VirtualAddress,
IN PVOID VirtualBase,
IN PVOID FrameBufferVirtualBase,
OUT PLIST_ENTRY SystemResourcesList); OUT PLIST_ENTRY SystemResourcesList);
STATIC XTCDECL EFI_STATUS GetVirtualAddress(IN PLIST_ENTRY MemoryMappings, STATIC XTCDECL EFI_STATUS GetVirtualAddress(IN PLIST_ENTRY MemoryMappings,
IN PVOID PhysicalAddress, IN PVOID PhysicalAddress,

View File

@@ -191,52 +191,56 @@ Xtos::GetDisplayInformation(OUT PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource
XTCDECL XTCDECL
EFI_STATUS EFI_STATUS
Xtos::GetMemoryDescriptorList(IN PXTBL_PAGE_MAPPING PageMap, Xtos::GetMemoryDescriptorList(IN PXTBL_PAGE_MAPPING PageMap,
IN EFI_PHYSICAL_ADDRESS PhysicalBase, IN PVOID *VirtualAddress,
IN PVOID VirtualBase,
OUT PLIST_ENTRY MemoryDescriptorList) OUT PLIST_ENTRY MemoryDescriptorList)
{ {
PLOADER_MEMORY_DESCRIPTOR Descriptor; EFI_PHYSICAL_ADDRESS Address;
PXTBL_MEMORY_MAPPING MemoryMapping; EFI_STATUS Status;
ULONGLONG Pages;
Pages = (ULONGLONG)EFI_SIZE_TO_PAGES((PageMap->MapSize + 1) * sizeof(LOADER_MEMORY_DESCRIPTOR));
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, Pages, &Address);
if(Status != STATUS_EFI_SUCCESS)
{
return Status;
}
Status = XtLdrProtocol->Memory.MapVirtualMemory(PageMap, *VirtualAddress, (PVOID)Address, Pages, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
XtLdrProtocol->Memory.FreePages(Address, Pages);
return Status;
}
PVOID PhysicalBase = (PVOID)Address;
PLIST_ENTRY ListEntry; PLIST_ENTRY ListEntry;
/* Initialize the descriptor pointer to the start of the allocated physical buffer */
Descriptor = (PLOADER_MEMORY_DESCRIPTOR)PhysicalBase;
/* Get the first entry from the internal boot loader memory map */
ListEntry = PageMap->MemoryMap.Flink; ListEntry = PageMap->MemoryMap.Flink;
/* Iterate through the internal memory map and populate the loader descriptor list */
while(ListEntry != &PageMap->MemoryMap) while(ListEntry != &PageMap->MemoryMap)
{ {
/* Retrieve the internal memory mapping record from the current list entry */ PXTBL_MEMORY_MAPPING MemoryMapping = CONTAIN_RECORD(ListEntry, XTBL_MEMORY_MAPPING, ListEntry);
MemoryMapping = CONTAIN_RECORD(ListEntry, XTBL_MEMORY_MAPPING, ListEntry); PLOADER_MEMORY_DESCRIPTOR MemoryDescriptor = (PLOADER_MEMORY_DESCRIPTOR)Address;
/* Transfer memory type and address information to the kernel descriptor */ MemoryDescriptor->MemoryType = MemoryMapping->MemoryType;
Descriptor->MemoryType = MemoryMapping->MemoryType; MemoryDescriptor->BasePage = (UINT_PTR)MemoryMapping->PhysicalAddress / EFI_PAGE_SIZE;
Descriptor->BasePage = (UINT_PTR)(MemoryMapping->PhysicalAddress / EFI_PAGE_SIZE); MemoryDescriptor->PageCount = MemoryMapping->NumberOfPages;
Descriptor->PageCount = (ULONG)MemoryMapping->NumberOfPages;
/* Link the entry */ XtLdrProtocol->LinkedList.InsertTail(MemoryDescriptorList, &MemoryDescriptor->ListEntry);
XtLdrProtocol->LinkedList.InsertTail(MemoryDescriptorList, &Descriptor->ListEntry);
/* Move to the next slot in the allocated buffer */ Address = Address + sizeof(LOADER_MEMORY_DESCRIPTOR);
Descriptor++;
ListEntry = ListEntry->Flink; ListEntry = ListEntry->Flink;
} }
/* Convert all physical link pointers in the list to their corresponding virtual addresses */ XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, MemoryDescriptorList, PhysicalBase, *VirtualAddress);
XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, MemoryDescriptorList, (PVOID)PhysicalBase, VirtualBase);
/* Return success */
return STATUS_EFI_SUCCESS; return STATUS_EFI_SUCCESS;
} }
XTCDECL XTCDECL
EFI_STATUS EFI_STATUS
Xtos::GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap, Xtos::GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
IN EFI_PHYSICAL_ADDRESS PhysicalBase, IN PVOID *VirtualAddress,
IN PVOID VirtualBase,
IN PVOID FrameBufferVirtualBase,
OUT PLIST_ENTRY SystemResourcesList) OUT PLIST_ENTRY SystemResourcesList)
{ {
XTSTATUS Status; XTSTATUS Status;
@@ -247,18 +251,39 @@ Xtos::GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
PXTBL_FRAMEBUFFER_PROTOCOL FrameBufProtocol; PXTBL_FRAMEBUFFER_PROTOCOL FrameBufProtocol;
XTBL_FRAMEBUFFER_MODE_INFORMATION FbModeInfo; XTBL_FRAMEBUFFER_MODE_INFORMATION FbModeInfo;
EFI_PHYSICAL_ADDRESS FbAddress; EFI_PHYSICAL_ADDRESS FbAddress;
EFI_PHYSICAL_ADDRESS OriginalPhysicalBase;
ULONG_PTR FbSize; ULONG_PTR FbSize;
UINT FrameBufferPages;
PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource; PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource;
PSYSTEM_RESOURCE_ACPI AcpiResource; PSYSTEM_RESOURCE_ACPI AcpiResource;
ULONGLONG Pages;
EFI_PHYSICAL_ADDRESS Address;
PVOID PhysicalBase, VirtualBase;
/* Save original physical base */ Pages = (ULONGLONG)EFI_SIZE_TO_PAGES(sizeof(SYSTEM_RESOURCE_ACPI) + sizeof(SYSTEM_RESOURCE_FRAMEBUFFER));
OriginalPhysicalBase = PhysicalBase;
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, Pages, &Address);
if(Status != STATUS_EFI_SUCCESS)
{
return Status;
}
Status = XtLdrProtocol->Memory.MapVirtualMemory(PageMap, *VirtualAddress, (PVOID)Address, Pages, LoaderFirmwarePermanent);
if(Status != STATUS_EFI_SUCCESS)
{
XtLdrProtocol->Memory.FreePages(Address, Pages);
return Status;
}
PhysicalBase = (PVOID)Address;
VirtualBase = *VirtualAddress;
/* Calculate next valid virtual address */
*VirtualAddress = (PUINT8)*VirtualAddress + (Pages * EFI_PAGE_SIZE);
AcpiResource = (PSYSTEM_RESOURCE_ACPI)Address;
AcpiResource = (PSYSTEM_RESOURCE_ACPI)PhysicalBase;
XtLdrProtocol->Memory.ZeroMemory(AcpiResource, sizeof(SYSTEM_RESOURCE_ACPI)); XtLdrProtocol->Memory.ZeroMemory(AcpiResource, sizeof(SYSTEM_RESOURCE_ACPI));
/* Load ACPI protocol */ /* Load FrameBuffer protocol */
Status = XtLdrProtocol->Protocol.Open(&ProtocolHandle, (PVOID*)&AcpiProtocol, &AcpiGuid); Status = XtLdrProtocol->Protocol.Open(&ProtocolHandle, (PVOID*)&AcpiProtocol, &AcpiGuid);
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
{ {
@@ -277,11 +302,13 @@ Xtos::GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
XtLdrProtocol->LinkedList.InsertTail(SystemResourcesList, &AcpiResource->Header.ListEntry); XtLdrProtocol->LinkedList.InsertTail(SystemResourcesList, &AcpiResource->Header.ListEntry);
/* Close ACPI protocol */ /* Close FrameBuffer protocol */
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &AcpiGuid); XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid);
Address = Address + sizeof(SYSTEM_RESOURCE_ACPI);
FrameBufferResource = (PSYSTEM_RESOURCE_FRAMEBUFFER)Address;
PhysicalBase = PhysicalBase + sizeof(SYSTEM_RESOURCE_ACPI);
FrameBufferResource = (PSYSTEM_RESOURCE_FRAMEBUFFER)PhysicalBase;
XtLdrProtocol->Memory.ZeroMemory(FrameBufferResource, sizeof(SYSTEM_RESOURCE_FRAMEBUFFER)); XtLdrProtocol->Memory.ZeroMemory(FrameBufferResource, sizeof(SYSTEM_RESOURCE_FRAMEBUFFER));
/* Load FrameBuffer protocol */ /* Load FrameBuffer protocol */
@@ -302,16 +329,26 @@ Xtos::GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
return Status; return Status;
} }
/* Assign the pre-mapped virtual address to the resource block */ /* Calculate pages needed to map framebuffer */
FrameBufferResource->Header.VirtualAddress = FrameBufferVirtualBase; FrameBufferPages = EFI_SIZE_TO_PAGES(FbSize);
/* Rewrite framebuffer address by using virtual address */
FrameBufferResource->Header.VirtualAddress = *VirtualAddress;
/* Map frame buffer memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, FrameBufferResource->Header.VirtualAddress,
FrameBufferResource->Header.PhysicalAddress,
FrameBufferPages, LoaderFirmwarePermanent);
/* Close FrameBuffer protocol */
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid); XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid);
*VirtualAddress = (PUINT8)*VirtualAddress + (FrameBufferPages * EFI_PAGE_SIZE);
XtLdrProtocol->LinkedList.InsertTail(SystemResourcesList, &FrameBufferResource->Header.ListEntry); XtLdrProtocol->LinkedList.InsertTail(SystemResourcesList, &FrameBufferResource->Header.ListEntry);
/* Convert list pointers to virtual */ XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, SystemResourcesList, PhysicalBase, VirtualBase);
XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, SystemResourcesList, (PVOID)OriginalPhysicalBase, VirtualBase);
/* Return success */
return STATUS_EFI_SUCCESS; return STATUS_EFI_SUCCESS;
} }
@@ -352,7 +389,7 @@ Xtos::InitializeApicBase(IN PXTBL_PAGE_MAPPING PageMap)
} }
/* Map APIC base address */ /* Map APIC base address */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, APIC_BASE, (ULONGLONG)ApicBaseAddress, 1, LoaderFirmwarePermanent); XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (PVOID)APIC_BASE, ApicBaseAddress, 1, LoaderFirmwarePermanent);
return STATUS_EFI_SUCCESS; return STATUS_EFI_SUCCESS;
} }
@@ -372,100 +409,34 @@ Xtos::InitializeApicBase(IN PXTBL_PAGE_MAPPING PageMap)
XTCDECL XTCDECL
EFI_STATUS EFI_STATUS
Xtos::InitializeLoaderBlock(IN PXTBL_PAGE_MAPPING PageMap, Xtos::InitializeLoaderBlock(IN PXTBL_PAGE_MAPPING PageMap,
IN OUT PVOID *VirtualAddress, IN PVOID *VirtualAddress,
IN PXTBL_BOOT_PARAMETERS Parameters) IN PXTBL_BOOT_PARAMETERS Parameters)
{ {
EFI_PHYSICAL_ADDRESS FbPhysicalAddress, PhysicalBlock, PhysicalDescriptor, PhysicalResources;
PVOID FbVirtualAddress, VirtualBlock, VirtualResources, VirtualDescriptor;
UINT BlockPages, DescriptorPages, FbPages, ParametersSize, ResourcesPages;
XTBL_FRAMEBUFFER_MODE_INFORMATION FbModeInfo;
PXTBL_FRAMEBUFFER_PROTOCOL FrameBufProtocol;
PKERNEL_INITIALIZATION_BLOCK LoaderBlock; PKERNEL_INITIALIZATION_BLOCK LoaderBlock;
EFI_HANDLE ProtocolHandle; EFI_PHYSICAL_ADDRESS Address;
EFI_STATUS Status; EFI_STATUS Status;
ULONG_PTR FbSize; UINT BlockPages;
UINT ParametersSize;
EFI_GUID FrameBufGuid = XT_FRAMEBUFFER_PROTOCOL_GUID;
/* Initialize Framebuffer information */
FbPhysicalAddress = 0;
FbSize = 0;
FbVirtualAddress = NULLPTR;
FbPages = 0;
/* Calculate size of parameters */ /* Calculate size of parameters */
ParametersSize = (XtLdrProtocol->WideString.Length(Parameters->Parameters, 0) + 1) * sizeof(WCHAR); ParametersSize = (XtLdrProtocol->WideString.Length(Parameters->Parameters, 0) + 1) * sizeof(WCHAR);
/* Calculate number of pages needed for initialization block */ /* Calculate number of pages needed for initialization block */
BlockPages = EFI_SIZE_TO_PAGES(sizeof(KERNEL_INITIALIZATION_BLOCK) + ParametersSize); BlockPages = EFI_SIZE_TO_PAGES(sizeof(KERNEL_INITIALIZATION_BLOCK) + ParametersSize);
ResourcesPages = EFI_SIZE_TO_PAGES(sizeof(SYSTEM_RESOURCE_ACPI) + sizeof(SYSTEM_RESOURCE_FRAMEBUFFER));
/* Query Framebuffer size for allocation */ /* Allocate memory for kernel initialization block */
if(XtLdrProtocol->Protocol.Open(&ProtocolHandle, (PVOID*)&FrameBufProtocol, &FrameBufGuid) == STATUS_EFI_SUCCESS) Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, BlockPages, &Address);
{
/* Get FrameBuffer information */
FrameBufProtocol->GetDisplayInformation(&FbPhysicalAddress, &FbSize, &FbModeInfo);
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid);
}
FbPages = EFI_SIZE_TO_PAGES(FbSize);
/* Precommit page map to allocate memory */
XtLdrProtocol->Memory.CommitPageMap(PageMap);
/* Calculate number of pages needed for memory descriptor list */
DescriptorPages = EFI_SIZE_TO_PAGES(PageMap->MapSize * sizeof(LOADER_MEMORY_DESCRIPTOR) * 2);
/* Allocate memory for the kernel initialization block and boot parameters */
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, BlockPages, &PhysicalBlock);
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
{ {
/* Memory allocation failure, return status code */ /* Memory allocation failure */
return Status; return Status;
} }
/* Allocate memory for the system resources data structures */ /* Initialize and zero-fill kernel initialization block */
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, ResourcesPages, &PhysicalResources); LoaderBlock = (PKERNEL_INITIALIZATION_BLOCK)(UINT_PTR)Address;
if(Status != STATUS_EFI_SUCCESS) XtLdrProtocol->Memory.ZeroMemory(LoaderBlock, sizeof(KERNEL_INITIALIZATION_BLOCK) + ParametersSize);
{
/* Memory allocation failure, return status code */
return Status;
}
/* Allocate memory for the memory descriptor list */
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, DescriptorPages, &PhysicalDescriptor);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory allocation failure, return status code */
return Status;
}
/* Map the Kernel Initialization Block into virtual memory and advance the virtual address pointer */
VirtualBlock = *VirtualAddress;
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)VirtualBlock, PhysicalBlock, BlockPages, LoaderSystemBlock);
*VirtualAddress = (PUINT8)*VirtualAddress + (BlockPages * EFI_PAGE_SIZE);
/* Map the system resources physical memory into virtual address space and update the allocation pointer */
VirtualResources = *VirtualAddress;
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)VirtualResources, PhysicalResources, ResourcesPages, LoaderFirmwarePermanent);
*VirtualAddress = (PUINT8)*VirtualAddress + (ResourcesPages * EFI_PAGE_SIZE);
/* Check if a framebuffer was detected and requires memory mapping */
if(FbPages > 0)
{
/* Map the framebuffer physical memory range into virtual address space */
FbVirtualAddress = *VirtualAddress;
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)FbVirtualAddress, FbPhysicalAddress, FbPages, LoaderFirmwarePermanent);
*VirtualAddress = (PUINT8)*VirtualAddress + (FbPages * EFI_PAGE_SIZE);
}
/* Map the allocated physical memory for memory descriptors into the virtual address space */
VirtualDescriptor = *VirtualAddress;
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)VirtualDescriptor, PhysicalDescriptor, DescriptorPages, LoaderMemoryData);
*VirtualAddress = (PUINT8)*VirtualAddress + (DescriptorPages * EFI_PAGE_SIZE);
/* Set basic loader block properties */ /* Set basic loader block properties */
XtLdrProtocol->Memory.ZeroMemory((PVOID)PhysicalBlock, sizeof(KERNEL_INITIALIZATION_BLOCK) + ParametersSize);
LoaderBlock = (PKERNEL_INITIALIZATION_BLOCK)PhysicalBlock;
LoaderBlock->BlockSize = sizeof(KERNEL_INITIALIZATION_BLOCK); LoaderBlock->BlockSize = sizeof(KERNEL_INITIALIZATION_BLOCK);
LoaderBlock->BlockVersion = INITIALIZATION_BLOCK_VERSION; LoaderBlock->BlockVersion = INITIALIZATION_BLOCK_VERSION;
LoaderBlock->ProtocolVersion = BOOT_PROTOCOL_VERSION; LoaderBlock->ProtocolVersion = BOOT_PROTOCOL_VERSION;
@@ -479,33 +450,24 @@ Xtos::InitializeLoaderBlock(IN PXTBL_PAGE_MAPPING PageMap,
LoaderBlock->FirmwareInformation.EfiFirmware.EfiRuntimeServices = NULLPTR; LoaderBlock->FirmwareInformation.EfiFirmware.EfiRuntimeServices = NULLPTR;
/* Copy parameters to kernel initialization block */ /* Copy parameters to kernel initialization block */
LoaderBlock->KernelParameters = (PWCHAR)((UINT_PTR)VirtualBlock + sizeof(KERNEL_INITIALIZATION_BLOCK)); LoaderBlock->KernelParameters = (PWCHAR)((UINT_PTR)*VirtualAddress + sizeof(KERNEL_INITIALIZATION_BLOCK));
XtLdrProtocol->Memory.CopyMemory((PVOID)((UINT_PTR)LoaderBlock + sizeof(KERNEL_INITIALIZATION_BLOCK)), XtLdrProtocol->Memory.CopyMemory((PVOID)((UINT_PTR)LoaderBlock + sizeof(KERNEL_INITIALIZATION_BLOCK)),
Parameters->Parameters, ParametersSize); Parameters->Parameters,
ParametersSize);
/* Commit mappings */ /* Map kernel initialization block */
XtLdrProtocol->Memory.CommitPageMap(PageMap); XtLdrProtocol->Memory.MapVirtualMemory(PageMap, *VirtualAddress, (PVOID)LoaderBlock,
BlockPages, LoaderSystemBlock);
/* Calculate next valid virtual address */
*VirtualAddress = (PUINT8)*VirtualAddress + (BlockPages * EFI_PAGE_SIZE);
/* Initialize system resources list */
XtLdrProtocol->LinkedList.InitializeHead(&LoaderBlock->SystemResourcesListHead); XtLdrProtocol->LinkedList.InitializeHead(&LoaderBlock->SystemResourcesListHead);
Status = GetSystemResourcesList(PageMap, PhysicalResources, VirtualResources, FbVirtualAddress, &LoaderBlock->SystemResourcesListHead); GetSystemResourcesList(PageMap, VirtualAddress, &LoaderBlock->SystemResourcesListHead);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to initialize system resources list, return status code */
return Status;
}
/* Initialize memory descriptor list */ /* Initialize memory descriptor list */
XtLdrProtocol->LinkedList.InitializeHead(&LoaderBlock->MemoryDescriptorListHead); XtLdrProtocol->LinkedList.InitializeHead(&LoaderBlock->MemoryDescriptorListHead);
Status = GetMemoryDescriptorList(PageMap, PhysicalDescriptor, VirtualDescriptor, &LoaderBlock->MemoryDescriptorListHead); GetMemoryDescriptorList(PageMap, VirtualAddress, &LoaderBlock->MemoryDescriptorListHead);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to initialize memory descriptor list, return status code */
return Status;
}
/* Set boot image size */
LoaderBlock->BootImageSize = (PFN_NUMBER)(((ULONGLONG)*VirtualAddress - KSEG0_BASE) / EFI_PAGE_SIZE);
/* Return success */ /* Return success */
return STATUS_EFI_SUCCESS; return STATUS_EFI_SUCCESS;
@@ -645,12 +607,11 @@ Xtos::RunBootSequence(IN PEFI_FILE_HANDLE BootDir,
PXTBL_FRAMEBUFFER_PROTOCOL FrameBufProtocol; PXTBL_FRAMEBUFFER_PROTOCOL FrameBufProtocol;
PPECOFF_IMAGE_CONTEXT ImageContext = NULLPTR; PPECOFF_IMAGE_CONTEXT ImageContext = NULLPTR;
PEFI_LOADED_IMAGE_PROTOCOL ImageProtocol; PEFI_LOADED_IMAGE_PROTOCOL ImageProtocol;
PVOID VirtualAddress; PVOID VirtualAddress, VirtualMemoryArea;
PXT_ENTRY_POINT KernelEntryPoint; PXT_ENTRY_POINT KernelEntryPoint;
EFI_HANDLE ProtocolHandle; EFI_HANDLE ProtocolHandle;
EFI_STATUS Status; EFI_STATUS Status;
XTBL_PAGE_MAPPING PageMap; XTBL_PAGE_MAPPING PageMap;
BOOLEAN IdentityMapping;
/* Initialize XTOS startup sequence */ /* Initialize XTOS startup sequence */
XtLdrProtocol->Debug.Print(L"Initializing XTOS startup sequence\n"); XtLdrProtocol->Debug.Print(L"Initializing XTOS startup sequence\n");
@@ -667,30 +628,19 @@ Xtos::RunBootSequence(IN PEFI_FILE_HANDLE BootDir,
/* Close FrameBuffer protocol */ /* Close FrameBuffer protocol */
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid); XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid);
/* Determine whether to use a sequential or an identity mapping strategy */
IdentityMapping = DetermineMappingStrategy();
/* Set base virtual memory area for the kernel mappings */ /* Set base virtual memory area for the kernel mappings */
VirtualAddress = (PVOID)(KSEG0_BASE); VirtualMemoryArea = (PVOID)KSEG0_BASE;
VirtualAddress = (PVOID)(KSEG0_BASE + KSEG0_KERNEL_BASE);
/* Initialize virtual memory mappings */ /* Initialize virtual memory mappings */
XtLdrProtocol->Memory.InitializePageMap(&PageMap, DeterminePagingLevel(Parameters->Parameters), Size4K); XtLdrProtocol->Memory.InitializePageMap(&PageMap, DeterminePagingLevel(Parameters->Parameters), Size4K);
/* Map all EFI memory regions */ Status = XtLdrProtocol->Memory.MapEfiMemory(&PageMap, &VirtualMemoryArea, NULLPTR);
Status = XtLdrProtocol->Memory.MapEfiMemory(&PageMap, &VirtualAddress, IdentityMapping, NULLPTR);
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
{ {
/* Mapping failed */
return Status; return Status;
} }
/* Check mapping strategy */
if(IdentityMapping)
{
/* Adjust virtual address to skip the identity-mapped physical range */
VirtualAddress = (PVOID)((ULONGLONG)VirtualAddress + 0x800000000);
}
/* Load the kernel */ /* Load the kernel */
Status = LoadModule(BootDir, Parameters->KernelFile, VirtualAddress, LoaderSystemCode, &ImageContext); Status = LoadModule(BootDir, Parameters->KernelFile, VirtualAddress, LoaderSystemCode, &ImageContext);
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
@@ -700,8 +650,8 @@ Xtos::RunBootSequence(IN PEFI_FILE_HANDLE BootDir,
} }
/* Add kernel image memory mapping */ /* Add kernel image memory mapping */
Status = XtLdrProtocol->Memory.MapVirtualMemory(&PageMap, (ULONGLONG)ImageContext->VirtualAddress, Status = XtLdrProtocol->Memory.MapVirtualMemory(&PageMap, ImageContext->VirtualAddress,
(ULONGLONG)ImageContext->PhysicalAddress, ImageContext->ImagePages, ImageContext->PhysicalAddress, ImageContext->ImagePages,
LoaderSystemCode); LoaderSystemCode);
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
{ {
@@ -720,14 +670,6 @@ Xtos::RunBootSequence(IN PEFI_FILE_HANDLE BootDir,
return Status; return Status;
} }
/* Build page map */
Status = BuildPageMap(&PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Store virtual address of kernel initialization block for future kernel call */ /* Store virtual address of kernel initialization block for future kernel call */
KernelParameters = (PKERNEL_INITIALIZATION_BLOCK)VirtualAddress; KernelParameters = (PKERNEL_INITIALIZATION_BLOCK)VirtualAddress;

View File

@@ -302,7 +302,6 @@ Protocol::LoadModule(IN PWCHAR ModuleName)
PXTBL_MODULE_DEPS ModuleDependency; PXTBL_MODULE_DEPS ModuleDependency;
PXTBL_MODULE_INFO ModuleInfo; PXTBL_MODULE_INFO ModuleInfo;
WCHAR ModuleFileName[24]; WCHAR ModuleFileName[24];
ULONG ModuleNameLength;
USHORT SectionIndex; USHORT SectionIndex;
PWCHAR SectionData; PWCHAR SectionData;
SIZE_T ModuleSize; SIZE_T ModuleSize;
@@ -329,11 +328,8 @@ Protocol::LoadModule(IN PWCHAR ModuleName)
/* Print debug message */ /* Print debug message */
Debug::Print(L"Loading module '%S' ...\n", ModuleName); Debug::Print(L"Loading module '%S' ...\n", ModuleName);
/* Calculate module name length */
ModuleNameLength = RTL::WideString::WideStringLength(ModuleName, 0) + 1;
/* Set module path */ /* Set module path */
RTL::Memory::CopyMemory(ModuleFileName, ModuleName, ModuleNameLength * sizeof(WCHAR)); RTL::Memory::CopyMemory(ModuleFileName, ModuleName, (RTL::WideString::WideStringLength(ModuleName, 0) + 1) * sizeof(WCHAR));
RTL::WideString::ConcatenateWideString(ModuleFileName, (PWCHAR)L".EFI", 0); RTL::WideString::ConcatenateWideString(ModuleFileName, (PWCHAR)L".EFI", 0);
/* Open EFI volume */ /* Open EFI volume */
@@ -442,8 +438,7 @@ Protocol::LoadModule(IN PWCHAR ModuleName)
if(Status != STATUS_EFI_SUCCESS) if(Status != STATUS_EFI_SUCCESS)
{ {
/* Failed to load module, print error message and return status code */ /* Failed to load module, print error message and return status code */
Debug::Print(L"Failed to load dependency module '%S' (Status Code: 0x%zX)\n", Debug::Print(L"Failed to load dependency module '%S' (Status Code: 0x%zX)\n", ModuleDependency->ModuleName, Status);
ModuleDependency->ModuleName, Status);
return STATUS_EFI_UNSUPPORTED; return STATUS_EFI_UNSUPPORTED;
} }
@@ -506,19 +501,8 @@ Protocol::LoadModule(IN PWCHAR ModuleName)
XtLoader::GetEfiSystemTable()->BootServices->CloseProtocol(LoadedImage, &LIPGuid, LoadedImage, NULLPTR); XtLoader::GetEfiSystemTable()->BootServices->CloseProtocol(LoadedImage, &LIPGuid, LoadedImage, NULLPTR);
} }
/* Allocate memory for module name */
Status = Memory::AllocatePool(ModuleNameLength * sizeof(WCHAR), (PVOID *)&ModuleInfo->ModuleName);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to allocate memory for module name, return error */
Debug::Print(L"ERROR: Failed to allocate memory (Status Code: 0x%zX)\n", Status);
return Status;
}
/* Copy module name */
RTL::Memory::CopyMemory(ModuleInfo->ModuleName, ModuleName, ModuleNameLength * sizeof(WCHAR));
/* Save additional module information, not found in '.modinfo' section */ /* Save additional module information, not found in '.modinfo' section */
ModuleInfo->ModuleName = ModuleName;
ModuleInfo->ModuleBase = LoadedImage->ImageBase; ModuleInfo->ModuleBase = LoadedImage->ImageBase;
ModuleInfo->ModuleSize = LoadedImage->ImageSize; ModuleInfo->ModuleSize = LoadedImage->ImageSize;
ModuleInfo->Revision = LoadedImage->Revision; ModuleInfo->Revision = LoadedImage->Revision;
@@ -1070,7 +1054,6 @@ Protocol::InstallXtLoaderProtocol()
LoaderProtocol.Memory.AllocatePages = Memory::AllocatePages; LoaderProtocol.Memory.AllocatePages = Memory::AllocatePages;
LoaderProtocol.Memory.AllocatePool = Memory::AllocatePool; LoaderProtocol.Memory.AllocatePool = Memory::AllocatePool;
LoaderProtocol.Memory.BuildPageMap = Memory::BuildPageMap; LoaderProtocol.Memory.BuildPageMap = Memory::BuildPageMap;
LoaderProtocol.Memory.CommitPageMap = Memory::CommitPageMap;
LoaderProtocol.Memory.CompareMemory = RTL::Memory::CompareMemory; LoaderProtocol.Memory.CompareMemory = RTL::Memory::CompareMemory;
LoaderProtocol.Memory.CopyMemory = RTL::Memory::CopyMemory; LoaderProtocol.Memory.CopyMemory = RTL::Memory::CopyMemory;
LoaderProtocol.Memory.FreePages = Memory::FreePages; LoaderProtocol.Memory.FreePages = Memory::FreePages;
@@ -1093,7 +1076,6 @@ Protocol::InstallXtLoaderProtocol()
LoaderProtocol.Protocol.LocateHandles = LocateProtocolHandles; LoaderProtocol.Protocol.LocateHandles = LocateProtocolHandles;
LoaderProtocol.Protocol.Open = OpenProtocol; LoaderProtocol.Protocol.Open = OpenProtocol;
LoaderProtocol.Protocol.OpenHandle = OpenProtocolHandle; LoaderProtocol.Protocol.OpenHandle = OpenProtocolHandle;
LoaderProtocol.Shell.RegisterCommand = Shell::RegisterCommand;
LoaderProtocol.String.Compare = RTL::String::CompareString; LoaderProtocol.String.Compare = RTL::String::CompareString;
LoaderProtocol.String.Length = RTL::String::StringLength; LoaderProtocol.String.Length = RTL::String::StringLength;
LoaderProtocol.String.ToWideString = RTL::String::StringToWideString; LoaderProtocol.String.ToWideString = RTL::String::StringToWideString;

View File

@@ -4,21 +4,13 @@
* FILE: xtldr/shell.cc * FILE: xtldr/shell.cc
* DESCRIPTION: XT Boot Loader shell * DESCRIPTION: XT Boot Loader shell
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org> * DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <harraiken91@gmail.com>
*/ */
#include <xtldr.hh> #include <xtldr.hh>
/** /**
* Implements the built-in `exit` command. Sets the exit flag to signal the main * Starts XTLDR shell.
* shell loop to terminate and return control to the boot menu.
*
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
* *
* @return This routine does not return any value. * @return This routine does not return any value.
* *
@@ -26,410 +18,14 @@
*/ */
XTCDECL XTCDECL
VOID VOID
Shell::CommandExit(IN ULONG Argc, Shell::StartLoaderShell()
IN PWCHAR *Argv)
{ {
/* Signal the main shell loop to stop and return to the boot menu */ /* Initialize console */
ExitRequest = TRUE; Console::InitializeConsole();
}
/** /* Print prompt */
* Implements the built-in `help` command. Prints a list of available commands alongside their descriptions. PrintPrompt();
* for(;;);
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::CommandHelp(IN ULONG Argc,
IN PWCHAR *Argv)
{
PXTBL_SHELL_COMMAND CommandEntry;
PLIST_ENTRY ListEntry;
/* Print a header line */
Console::Print(L"Available commands:\n\n");
/* Walk the registered commands list */
ListEntry = ShellCommands.Flink;
while(ListEntry != &ShellCommands)
{
/* Retrieve the current command entry */
CommandEntry = CONTAIN_RECORD(ListEntry, XTBL_SHELL_COMMAND, Flink);
/* Print the command name in a highlighted color */
Console::SetAttributes(EFI_TEXT_BGCOLOR_BLACK | EFI_TEXT_FGCOLOR_WHITE);
Console::Print(L" %-12S", CommandEntry->Command);
/* Print the description in the default color */
Console::SetAttributes(EFI_TEXT_BGCOLOR_BLACK | EFI_TEXT_FGCOLOR_LIGHTGRAY);
Console::Print(L" %S\n", CommandEntry->Description);
/* Advance to the next entry */
ListEntry = ListEntry->Flink;
}
}
/**
* Implements the built-in `insmod` command. Loads an XTLDR module by its name.
*
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::CommandInsmod(IN ULONG Argc,
IN PWCHAR *Argv)
{
EFI_STATUS Status;
/* Check if the module name was provided */
if(Argc != 2)
{
/* Print usage message and return */
Console::Print(L"Usage: insmod <module_name>\n");
return;
}
/* Load the module */
Status = Protocol::LoadModule(Argv[1]);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to load module, print error message */
Console::Print(L"ERROR: Failed to load module '%S' (Status: 0x%llx).\n", Argv[1], Status);
}
}
/**
* Implements the built-in `lsmod` command. Lists all loaded XTLDR modules.
*
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::CommandLsmod(IN ULONG Argc,
IN PWCHAR *Argv)
{
PXTBL_MODULE_INFO ModuleInfo;
PLIST_ENTRY ModulesList;
PLIST_ENTRY ListEntry;
/* Print header */
Console::Print(L"Module Name Version Base Address Size\n");
Console::Print(L"----------------------------------------------------------------------\n");
/* Get modules list */
ModulesList = Protocol::GetModulesList();
if(ModulesList == NULLPTR)
{
/* No modules loaded */
return;
}
/* Iterate over all loaded modules */
ListEntry = ModulesList->Flink;
while(ListEntry != ModulesList)
{
/* Retrieve the module information */
ModuleInfo = CONTAIN_RECORD(ListEntry, XTBL_MODULE_INFO, Flink);
/* Print module information */
Console::Print(L"%-16S %-16S 0x%016llx %llu\n",
ModuleInfo->ModuleName, ModuleInfo->Version,
(ULONGLONG)ModuleInfo->ModuleBase, ModuleInfo->ModuleSize);
/* Advance to the next entry */
ListEntry = ListEntry->Flink;
}
}
/**
* Implements the built-in `poweroff` command. Shuts down the machine.
*
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::CommandPoweroff(IN ULONG Argc,
IN PWCHAR *Argv)
{
/* Attempt to power off the machine */
Console::Print(L"Powering off...\n");
EfiUtils::ShutdownSystem();
/* The poweroff call failed, print error message */
Console::Print(L"ERROR: Failed to power off the machine\n");
}
/**
* Implements the built-in `reboot` command. Performs a normal system restart via the EFI runtime services.
* When the '/EFI' parameter is supplied, the routine instead schedules a reboot into the UEFI firmware setup interface.
*
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::CommandReboot(IN ULONG Argc,
IN PWCHAR *Argv)
{
/* Check if the /EFI flag was specified */
if(Argc > 1 && RTL::WideString::CompareWideStringInsensitive(Argv[1], L"/EFI", 0) == 0)
{
/* Attempt to reboot into firmware setup */
Console::Print(L"Rebooting into UEFI firmware setup...\n");
EfiUtils::EnterFirmwareSetup();
/* The firmware does not support this feature, print error message */
Console::Print(L"ERROR: Reboot into firmware setup interface not supported.\n");
}
else
{
/* Perform a standard system reboot */
Console::Print(L"Rebooting...\n");
EfiUtils::RebootSystem();
/* The reboot call failed, print error message */
Console::Print(L"ERROR: Failed to reboot the machine\n");
}
}
/**
* Implements the built-in `ver` command. Prints the bootloader identification string.
*
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::CommandVersion(IN ULONG Argc,
IN PWCHAR *Argv)
{
/* Check if debugging enabled */
if(DEBUG)
{
/* Print debug version of XTLDR version string */
Console::Print(L"XTLDR Boot Loader v%d.%d (%s-%s)\n",
XTLDR_VERSION_MAJOR, XTLDR_VERSION_MINOR, XTOS_VERSION_DATE, XTOS_VERSION_HASH);
}
else
{
/* Print standard XTLDR version string */
Console::Print(L"XTLDR Boot Loader v%d.%d\n", XTLDR_VERSION_MAJOR, XTLDR_VERSION_MINOR);
}
}
/**
* Looks up the given command name in the registered shell commands list and invokes the corresponding handler.
*
* @param Argc
* Supplies the number of arguments in the argument vector, including the command name itself.
*
* @param Argv
* Supplies a pointer to the argument vector. First argument is the command name.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::ExecuteCommand(IN ULONG Argc,
IN PWCHAR *Argv)
{
PXTBL_SHELL_COMMAND CommandEntry;
PLIST_ENTRY ListEntry;
/* Walk through the list of registered shell commands */
ListEntry = ShellCommands.Flink;
while(ListEntry != &ShellCommands)
{
/* Retrieve the shell command entry from the list node */
CommandEntry = CONTAIN_RECORD(ListEntry, XTBL_SHELL_COMMAND, Flink);
/* Perform a case-insensitive comparison against the command name */
if(RTL::WideString::CompareWideStringInsensitive(CommandEntry->Command, Argv[0], 0) == 0)
{
/* Command matches, invoke its handler and return */
CommandEntry->Handler(Argc, Argv);
return;
}
/* Advance to the next registered command */
ListEntry = ListEntry->Flink;
}
/* No matching command was found, print error message */
Console::Print(L"ERROR: '%S' is not recognized as a valid command.\n", Argv[0]);
}
/**
* Splits the supplied raw command line string into an argument count and an argument vector suitable
* for command dispatch. The input string is tokenized by whitespace.
*
* @param CommandLine
* Supplies a mutable wide-character string containing the raw command line.
*
* @param Argc
* Receives the number of arguments found in the command line.
*
* @param Argv
* Receives a pointer to an allocated array of wide-character string pointers, one for each argument.
*
* @return This routine returns a status code.
*
* @since XT 1.0
*/
XTCDECL
EFI_STATUS
Shell::ParseCommand(IN PWCHAR CommandLine,
OUT PULONG Argc,
OUT PWCHAR **Argv)
{
PWCHAR *ArgumentVector, TempLine;
ULONG ArgumentCount;
EFI_STATUS Status;
/* Initialize argument count */
ArgumentCount = 0;
/* Count the tokens to determine the size of the argument vector */
TempLine = CommandLine;
while(*TempLine != L'\0')
{
/* Skip leading spaces */
while(*TempLine == L' ')
{
/* Move to the next character */
TempLine++;
}
/* Check if the end of the string was reached */
if(*TempLine == L'\0')
{
/* End of the string, break the loop */
break;
}
/* One more argument found */
ArgumentCount++;
/* Skip the characters of the token */
while(*TempLine != L'\0' && *TempLine != L' ')
{
/* Move to the next character */
TempLine++;
}
}
/* Check if the command line was empty */
if(ArgumentCount == 0)
{
/* Set argument count and vector to zero and NULL */
*Argc = 0;
*Argv = NULLPTR;
/* Return success */
return STATUS_EFI_SUCCESS;
}
/* Allocate memory for the argument vector */
Status = Memory::AllocatePool(ArgumentCount * sizeof(PWCHAR), (PVOID *)&ArgumentVector);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory allocation failure, return status code */
return Status;
}
/* Reset argument count and temp line */
ArgumentCount = 0;
TempLine = CommandLine;
/* Walk through the command line */
while(*TempLine != L'\0')
{
/* Skip leading whitespace */
while(*TempLine == L' ')
{
/* Move to the next character */
TempLine++;
}
/* Check if the end of the string was reached */
if(*TempLine == L'\0')
{
/* End of string reached, break the loop */
break;
}
/* Record token */
ArgumentVector[ArgumentCount] = TempLine;
ArgumentCount++;
/* Advance past the token characters */
while(*TempLine != L'\0' && *TempLine != L' ')
{
/* Move to the next character */
TempLine++;
}
/* Check if token was NULL-terminated */
if(*TempLine != L'\0')
{
/* NULL-terminate the token and move to the next character */
*TempLine = L'\0';
TempLine++;
}
}
/* Return results to the caller */
*Argc = ArgumentCount;
*Argv = ArgumentVector;
return STATUS_EFI_SUCCESS;
} }
/** /**
@@ -446,486 +42,9 @@ Shell::PrintPrompt()
/* Set prompt color */ /* Set prompt color */
Console::SetAttributes(EFI_TEXT_BGCOLOR_BLACK | EFI_TEXT_FGCOLOR_YELLOW); Console::SetAttributes(EFI_TEXT_BGCOLOR_BLACK | EFI_TEXT_FGCOLOR_YELLOW);
/* Print prompt at the start of the line */ /* Print prompt */
Console::Print(L"\rXTLDR> "); Console::Print(L"XTLDR> ");
/* Reset standard shell colors */ /* Reset standard shell colors */
Console::SetAttributes(EFI_TEXT_BGCOLOR_BLACK | EFI_TEXT_FGCOLOR_LIGHTGRAY); Console::SetAttributes(EFI_TEXT_BGCOLOR_BLACK | EFI_TEXT_FGCOLOR_LIGHTGRAY);
} }
/**
* Prints the whole prompt line, including the current command line and the cursor position.
*
* @param Buffer
* Supplies a pointer to the buffer containing the command line.
*
* @param BufferLength
* Supplies the buffer text length.
*
* @param CursorPosition
* Supplies the current cursor position.
*
* @param PreviousBufferLength
* Supplies the previous buffer text length to clear artifacts.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::PrintPromptLine(IN PWCHAR Buffer,
IN ULONG BufferLength,
IN ULONG CursorPosition,
IN ULONG PreviousBufferLength)
{
INT32 TargetX, TargetY;
WCHAR SavedChar;
ULONG Index;
/* Print the prompt */
PrintPrompt();
/* Temporarily truncate the string to capture cursor position */
SavedChar = Buffer[CursorPosition];
Buffer[CursorPosition] = L'\0';
/* Print up to the cursor position */
Console::Print(L"%S", Buffer);
/* Capture target cursor coordinates from the EFI text mode structure */
TargetX = XtLoader::GetEfiSystemTable()->ConOut->Mode->CursorColumn;
TargetY = XtLoader::GetEfiSystemTable()->ConOut->Mode->CursorRow;
/* Restore the character and print the remainder of the buffer */
Buffer[CursorPosition] = SavedChar;
Console::Print(L"%S", Buffer + CursorPosition);
/* Check if the previous buffer was longer than the current one */
if(PreviousBufferLength > BufferLength)
{
/* Clear artifacts from the previous longer line */
for(Index = 0; Index < (PreviousBufferLength - BufferLength); Index++)
{
/* Print a white space */
Console::Print(L" ");
}
}
/* Move the cursor back to the correct target position */
Console::SetCursorPosition(TargetX, TargetY);
}
/**
* Reads a complete line of input from the shell console into the supplied buffer.
*
* @param Buffer
* Supplies a pointer to a wide-character buffer that receives the entered command line.
*
* @param BufferSize
* Supplies the capacity of the buffer, in wide characters.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::ReadCommand(OUT PWCHAR Buffer,
IN ULONG BufferSize)
{
ULONG BufferLength, CursorPosition, OldBufferLength;
UINT_PTR EventIndex;
EFI_INPUT_KEY Key;
/* Start with an empty buffer */
CursorPosition = 0;
BufferLength = 0;
Buffer[0] = L'\0';
/* Reset history index */
HistoryIndex = HistoryCount;
/* Read characters until the user submits the command line */
while(TRUE)
{
/* Wait until a key event is available */
EfiUtils::WaitForEfiEvent(1, &(XtLoader::GetEfiSystemTable()->ConIn->WaitForKey), &EventIndex);
/* Read the keystroke from the input device */
Console::ReadKeyStroke(&Key);
/* Capture the previous line length to wipe possible artifacts */
OldBufferLength = BufferLength;
/* Check the keystroke */
if(Key.UnicodeChar == 0x0D)
{
/* ENTER key pressed, terminate the buffer and move to a new line */
Buffer[BufferLength] = L'\0';
Console::Print(L"\n");
/* Check if the buffer is not empty */
if(BufferLength > 0)
{
/* Check if the history is not full */
if(HistoryCount < XTBL_SH_HISTORY_ENTRIES)
{
/* Store command in history and increment history count */
RTL::Memory::CopyMemory(History[HistoryCount], Buffer, (BufferLength + 1) * sizeof(WCHAR));
HistoryCount++;
}
else
{
/* Shift history entries to fit new command */
RTL::Memory::MoveMemory(History[0],
History[1],
(XTBL_SH_HISTORY_ENTRIES - 1) * XTBL_SH_MAX_LINE_LENGTH * sizeof(WCHAR));
RTL::Memory::CopyMemory(History[XTBL_SH_HISTORY_ENTRIES - 1],
Buffer,
(BufferLength + 1) * sizeof(WCHAR));
}
}
/* Return the command line to the caller */
return;
}
else if(Key.ScanCode == 0x01)
{
/* UP key pressed, go back in history */
if(HistoryIndex > 0)
{
/* Decrement history index */
HistoryIndex--;
/* Copy history entry to buffer and update cursor position */
BufferLength = RTL::WideString::WideStringLength(History[HistoryIndex], XTBL_SH_MAX_LINE_LENGTH - 1);
RTL::Memory::CopyMemory(Buffer, History[HistoryIndex], (BufferLength + 1) * sizeof(WCHAR));
CursorPosition = BufferLength;
/* Reprint the prompt line */
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.ScanCode == 0x02)
{
/* DOWN key pressed, go forward in history */
if(HistoryIndex < HistoryCount)
{
/* Increment history index */
HistoryIndex++;
/* Check if we are at the end of history */
if(HistoryIndex == HistoryCount)
{
/* End of history, show empty prompt */
Buffer[0] = L'\0';
BufferLength = 0;
CursorPosition = 0;
}
else
{
/* Copy history entry to buffer and update cursor position */
BufferLength = RTL::WideString::WideStringLength(History[HistoryIndex],
XTBL_SH_MAX_LINE_LENGTH - 1);
RTL::Memory::CopyMemory(Buffer, History[HistoryIndex], (BufferLength + 1) * sizeof(WCHAR));
CursorPosition = BufferLength;
}
/* Reprint the prompt line */
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.ScanCode == 0x03)
{
/* RIGHT key pressed, move cursor right */
if(CursorPosition < BufferLength)
{
/* Increment cursor position */
CursorPosition++;
/* Reprint the prompt line */
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.ScanCode == 0x04)
{
/* LEFT key pressed, move cursor left */
if(CursorPosition > 0)
{
/* Decrement cursor position */
CursorPosition--;
/* Reprint the prompt line */
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.ScanCode == 0x05)
{
/* HOME key pressed, move cursor to beginning */
if (CursorPosition > 0)
{
/* Set cursor position to beginning of the line and reprint the prompt line */
CursorPosition = 0;
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.ScanCode == 0x06)
{
/* END key pressed, move cursor to end */
if (CursorPosition < BufferLength)
{
/* Set cursor position to end of the line and reprint the prompt line */
CursorPosition = BufferLength;
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.ScanCode == 0x17)
{
/* ESC key pressed, discard the current input, move to a new line and reprint the prompt */
Buffer[0] = L'\0';
Console::Print(L"\n");
PrintPrompt();
/* Reset cursor position, buffer length and history index */
CursorPosition = 0;
BufferLength = 0;
HistoryIndex = HistoryCount;
/* Continue reading the command line */
continue;
}
else if(Key.ScanCode == 0x08)
{
/* DELETE key pressed, remove character at cursor */
if(CursorPosition < BufferLength)
{
/* Move memory to remove the character at cursor */
RTL::Memory::MoveMemory(Buffer + CursorPosition,
Buffer + CursorPosition + 1,
(BufferLength - CursorPosition) * sizeof(WCHAR));
/* Decrement buffer length and reprint the prompt line */
BufferLength--;
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.UnicodeChar == 0x08)
{
/* BACKSPACE key pressed, delete character before cursor */
if(CursorPosition > 0)
{
/* Move memory to remove the character before cursor */
RTL::Memory::MoveMemory(Buffer + CursorPosition - 1,
Buffer + CursorPosition,
(BufferLength - CursorPosition + 1) * sizeof(WCHAR));
/* Decrement cursor position and buffer length */
CursorPosition--;
BufferLength--;
/* Reprint the prompt line */
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue reading the command line */
continue;
}
else if(Key.UnicodeChar == 0)
{
/* Ignore non-printable characters */
continue;
}
/* Make sure there is room in the buffer (reserve one slot for NULL terminator) */
if(BufferLength < BufferSize - 1)
{
/* Insert character in the middle or end of the buffer */
RTL::Memory::MoveMemory(Buffer + CursorPosition + 1,
Buffer + CursorPosition,
(BufferLength - CursorPosition + 1) * sizeof(WCHAR));
Buffer[CursorPosition] = Key.UnicodeChar;
/* Increment cursor position and buffer length */
CursorPosition++;
BufferLength++;
/* Reprint the prompt line */
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
}
}
/**
* Registers a new command in the XTLDR shell.
*
* @param Command
* Supplies the command keyword that the user types at the shell prompt.
*
* @param Description
* Supplies a short help string displayed by the 'help' command.
*
* @param Handler
* Supplies a pointer to the function that implements the command.
*
* @return This routine returns a status code.
*
* @since XT 1.0
*/
XTCDECL
EFI_STATUS
Shell::RegisterCommand(IN PCWSTR Command,
IN PCWSTR Description,
IN PBL_SHELL_COMMAND Handler)
{
PXTBL_SHELL_COMMAND CommandEntry;
PLIST_ENTRY ListEntry;
EFI_STATUS Status;
/* Verify that a command with this name has not already been registered */
ListEntry = ShellCommands.Flink;
while(ListEntry != &ShellCommands)
{
/* Retrieve the existing shell command entry */
CommandEntry = CONTAIN_RECORD(ListEntry, XTBL_SHELL_COMMAND, Flink);
/* Compare command names case-insensitively */
if(RTL::WideString::CompareWideStringInsensitive(CommandEntry->Command, Command, 0) == 0)
{
/* Duplicate command name, return error */
return STATUS_EFI_INVALID_PARAMETER;
}
/* Advance to the next entry */
ListEntry = ListEntry->Flink;
}
/* Allocate memory for the new command entry */
Status = Memory::AllocatePool(sizeof(XTBL_SHELL_COMMAND), (PVOID *)&CommandEntry);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory allocation failure, return error */
return STATUS_EFI_OUT_OF_RESOURCES;
}
/* Populate the new command entry */
CommandEntry->Command = (PWCHAR)Command;
CommandEntry->Description = (PWCHAR)Description;
CommandEntry->Handler = Handler;
/* Append the command to the global shell commands list */
RTL::LinkedList::InsertTailList(&ShellCommands, &CommandEntry->Flink);
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Registers all built-in shell commands that are provided by the XTLDR.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::RegisterBuiltinCommands()
{
/* Register all built-in shell commands */
RegisterCommand(L"exit", L"Exits the shell and returns to the boot menu", CommandExit);
RegisterCommand(L"help", L"Displays a list of all available shell commands", CommandHelp);
RegisterCommand(L"insmod", L"Loads a specific XTLDR module", CommandInsmod);
RegisterCommand(L"lsmod", L"Displays a list of loaded modules", CommandLsmod);
RegisterCommand(L"poweroff", L"Shuts down the machine", CommandPoweroff);
RegisterCommand(L"reboot", L"Reboots the machine (/EFI to enter firmware setup)", CommandReboot);
RegisterCommand(L"ver", L"Displays the boot loader version information", CommandVersion);
}
/**
* Initializes the command list, registers the built-in commands and enters an interactive XTLDR shell loop.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::StartLoaderShell()
{
WCHAR CommandLine[XTBL_SH_MAX_LINE_LENGTH];
PWCHAR *ArgumentVector;
ULONG ArgumentCount;
EFI_STATUS Status;
/* Initialize console */
Console::InitializeConsole();
/* Initialize the shell commands list */
RTL::LinkedList::InitializeListHead(&ShellCommands);
/* Register all built-in commands */
RegisterBuiltinCommands();
/* Clear the shell exit request flag */
ExitRequest = FALSE;
/* Main XTLDR shell loop */
while(!ExitRequest)
{
/* Display the shell prompt */
PrintPrompt();
/* Read a command line */
ReadCommand(CommandLine, XTBL_SH_MAX_LINE_LENGTH);
/* Parse the command line into a list of arguments */
Status = ParseCommand(CommandLine, &ArgumentCount, &ArgumentVector);
if(Status != STATUS_EFI_SUCCESS)
{
/* Parsing failed, print error and continue */
Console::Print(L"ERROR: Failed to parse command line (Status: 0x%llx).\n\n", Status);
continue;
}
/* Check if command line is empty */
if(ArgumentCount == 0)
{
/* Skip empty command line */
continue;
}
/* Check if command line starts with a comment symbol (#) */
if(ArgumentVector[0][0] != L'#')
{
/* Dispatch the command */
ExecuteCommand(ArgumentCount, ArgumentVector);
}
/* Free the argument vector */
Memory::FreePool(ArgumentVector);
/* Print a trailing blank line for visual separation */
Console::Print(L"\n");
}
}

View File

@@ -717,9 +717,9 @@ TextUi::DisplayEditMenu(IN PXTBL_BOOTMENU_ITEM MenuEntry)
RedrawEntries = TRUE; RedrawEntries = TRUE;
} }
} }
else if(Key.ScanCode == 0x14) else if(Key.UnicodeChar == 0x02)
{ {
/* F10 key pressed, boot the OS */ /* CTRL-B key pressed, boot the OS */
Console::SetAttributes(Handle.DialogColor | Handle.TextColor); Console::SetAttributes(Handle.DialogColor | Handle.TextColor);
Console::ClearLine(Handle.PosY + Handle.Height + 4); Console::ClearLine(Handle.PosY + Handle.Height + 4);
Console::SetCursorPosition(4, Handle.PosY + Handle.Height + 4); Console::SetCursorPosition(4, Handle.PosY + Handle.Height + 4);
@@ -1673,7 +1673,7 @@ TextUi::DrawEditMenu(OUT PXTBL_DIALOG_HANDLE Handle)
Console::SetCursorPosition(0, Handle->PosY + Handle->Height); Console::SetCursorPosition(0, Handle->PosY + Handle->Height);
Console::SetAttributes(EFI_TEXT_BGCOLOR_BLACK | EFI_TEXT_FGCOLOR_LIGHTGRAY); Console::SetAttributes(EFI_TEXT_BGCOLOR_BLACK | EFI_TEXT_FGCOLOR_LIGHTGRAY);
Console::Print(L" Use cursors to change the selection. Press ENTER key to edit the chosen\n" Console::Print(L" Use cursors to change the selection. Press ENTER key to edit the chosen\n"
L" option, ESC to return to the main boot menu or F10 to boot.\n"); L" option, ESC to return to the main boot menu or CTRL-B to boot.\n");
} }
/** /**

View File

@@ -236,15 +236,6 @@ BlStartXtLoader(IN EFI_HANDLE ImageHandle,
PWCHAR Modules; PWCHAR Modules;
EFI_STATUS Status; EFI_STATUS Status;
/* Check if system is EFI-based and provided parameters are valid */
if(ImageHandle == NULLPTR || SystemTable == NULLPTR)
{
/* Invalid parameters, print error message using BIOS calls and hang */
BiosUtils::ClearScreen();
BiosUtils::Print(L"XTLDR requires EFI-based system!");
for(;;);
}
/* Initialize XTLDR and */ /* Initialize XTLDR and */
XtLoader::InitializeBootLoader(ImageHandle, SystemTable); XtLoader::InitializeBootLoader(ImageHandle, SystemTable);

View File

@@ -4,41 +4,48 @@
# DESCRIPTION: Project configuration script for preparing the build environment # DESCRIPTION: Project configuration script for preparing the build environment
# DEVELOPERS: Aiken Harris <harraiken91@gmail.com> # DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
# Check XTchain # Check XTchain
if (-not $env:XTCVER) { if (-not $env:XTCVER) {
Write-Error "XTChain not detected or corrupted!" Write-Host "XTChain not detected or corrupted!"
exit 1 exit 1
} }
# Set target architecture defaulting to amd64 # Set target architecture
$ARCH = if ($env:TARGET) { $env:TARGET } else { "amd64" } if ($env:TARGET) {
$ARCH = $env:TARGET
# Set target build type defaulting to Debug } else {
$env:BUILD_TYPE = if ($env:BUILD_TYPE -in @("Debug", "Release")) { $env:BUILD_TYPE } else { "Debug" } $ARCH = "amd64"
# Set variables
$EXECTOS_SOURCE_DIR = $PSScriptRoot
$EXECTOS_BINARY_DIR = Join-Path $EXECTOS_SOURCE_DIR "build-$ARCH-$($env:BUILD_TYPE.ToLower())"
# Create build directory
if (-not (Test-Path $EXECTOS_BINARY_DIR)) {
Write-Host "Creating build directory: $EXECTOS_BINARY_DIR"
New-Item -ItemType Directory -Path $EXECTOS_BINARY_DIR -Force | Out-Null
} }
Set-Location $EXECTOS_BINARY_DIR # Set target build type
if (-not $env:BUILD_TYPE) {
$env:BUILD_TYPE = "DEBUG"
}
# Set variables
$EXECTOS_SOURCE_DIR = (Get-Location).Path
$EXECTOS_BINARY_DIR = "build-$($ARCH)-$($env:BUILD_TYPE.ToLower())"
# Create directories if needed
if ($EXECTOS_SOURCE_DIR -eq (Get-Location).Path) {
Write-Host "Creating directories in $EXECTOS_BINARY_DIR"
New-Item -ItemType Directory -Path $EXECTOS_BINARY_DIR -Force | Out-Null
Set-Location -Path $EXECTOS_BINARY_DIR
}
# Delete old cache # Delete old cache
Remove-Item "CMakeCache.txt", "host-tools/CMakeCache.txt" -ErrorAction SilentlyContinue Remove-Item -Path "CMakeCache.txt" -ErrorAction SilentlyContinue
Remove-Item -Path "host-tools/CMakeCache.txt" -ErrorAction SilentlyContinue
# Configure project using CMake # Configure project using CMake
& cmake -G Ninja "-DARCH:STRING=$ARCH" "-DBUILD_TYPE:STRING=$($env:BUILD_TYPE)" $EXECTOS_SOURCE_DIR & cmake -G Ninja -DARCH:STRING=$($ARCH) -DBUILD_TYPE:STRING=$($env:BUILD_TYPE) $EXECTOS_SOURCE_DIR
# Check if configuration succeeded # Check if configuration succeeded
if ($LASTEXITCODE -ne 0) { if ($LASTEXITCODE -ne 0) {
Write-Error "Configure script failed." Write-Host "Configure script failed."
exit 1 exit 1
} else {
"$($ARCH)" | Out-File -Encoding ASCII -NoNewline build.arch
Write-Host "Configure script completed. Enter '$EXECTOS_BINARY_DIR' directory and execute 'xbuild' to build ExectOS."
} }
$ARCH | Out-File -Encoding ASCII -NoNewline "build.arch"
Write-Host "Configure completed. Run 'xbuild' to build ExectOS."

View File

@@ -1,3 +1 @@
add_subdirectory("xtadk")
set_sdk_target("xtdk/" "include") set_sdk_target("xtdk/" "include")

View File

@@ -1,3 +1,2 @@
# Set base addresses for all modules # Set base addresses for all modules
set(BASEADDRESS_XTLDR 0x000000000000F800)
set(BASEADDRESS_XTOSKRNL 0x0000000140000000) set(BASEADDRESS_XTOSKRNL 0x0000000140000000)

View File

@@ -1,3 +1,2 @@
# Set base addresses for all modules # Set base addresses for all modules
set(BASEADDRESS_XTLDR 0x0000F800)
set(BASEADDRESS_XTOSKRNL 0x00400000) set(BASEADDRESS_XTOSKRNL 0x00400000)

View File

@@ -23,56 +23,48 @@ endif()
find_program(QEMU_EMULATOR ${QEMU_COMMAND}) find_program(QEMU_EMULATOR ${QEMU_COMMAND})
if(QEMU_EMULATOR) if(QEMU_EMULATOR)
if(CMAKE_HOST_LINUX)
# This target starts up a QEMU+OVMF virtual machine using KVM accelerator # This target starts up a QEMU+OVMF virtual machine using KVM accelerator
add_custom_target(testefikvm add_custom_target(testefikvm
DEPENDS install DEPENDS install
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-EFI-KVM" -machine type=q35,kernel_irqchip=on,accel=kvm,mem-merge=off,vmport=off -enable-kvm -cpu host,-hypervisor,+topoext COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-EFI-KVM" -machine type=q35,kernel_irqchip=on,accel="kvm:whpx",mem-merge=off,vmport=off -enable-kvm -cpu host,-hypervisor,+topoext
-smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none -smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-bios ${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_${ARCH}.fd -drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_code_${ARCH}.fd,if=pflash,format=raw,unit=0,readonly=on
-drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_vars_${ARCH}.fd,if=pflash,format=raw,unit=1
-hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries -hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
-boot menu=on -d int -M smm=off -no-reboot -no-shutdown -serial stdio -boot menu=on -d int -M smm=off -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL) VERBATIM USES_TERMINAL)
elseif(CMAKE_HOST_WIN32)
# This target starts up a QEMU+OVMF virtual machine using WHPX accelerator
add_custom_target(testefiwhpx
DEPENDS install
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-EFI-WHPX" -machine type=q35,kernel_irqchip=off,accel=whpx,mem-merge=off,vmport=off
-m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-bios ${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_${ARCH}.fd
-hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
-boot menu=on -d int -M smm=off -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
endif()
# This target starts up a QEMU+OVMF virtual machine using TCG accelerator # This target starts up a QEMU+OVMF virtual machine using TCG accelerator
add_custom_target(testefitcg add_custom_target(testefitcg
DEPENDS install DEPENDS install
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-EFI-TCG" -machine type=q35,accel=tcg -cpu max,-hypervisor COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-EFI-TCG" -machine type=q35,accel=tcg -cpu max,-hypervisor
-smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none -smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-bios ${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_${ARCH}.fd -drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_code_${ARCH}.fd,if=pflash,format=raw,unit=0,readonly=on
-drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_vars_${ARCH}.fd,if=pflash,format=raw,unit=1
-hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries -hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
-boot menu=on -d int -no-reboot -no-shutdown -serial stdio -boot menu=on -d int -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL) VERBATIM USES_TERMINAL)
if(CMAKE_HOST_LINUX) if(WIN32)
# This target starts up a QEMU+OVMF virtual machine using WHPX accelerator on Windows
add_custom_target(testkvm
DEPENDS install
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-WHPX" -machine accel=whpx,kernel-irqchip=off
-bios ${EXECTOS_SOURCE_DIR}/sdk/firmware/OVMF-pure-efi.fd
-hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
-no-reboot -no-shutdown -serial stdio
COMMENT "Using WHPX acceleration on Windows"
VERBATIM USES_TERMINAL)
else()
# This target starts up a QEMU+SEABIOS virtual machine using KVM accelerator # This target starts up a QEMU+SEABIOS virtual machine using KVM accelerator
add_custom_target(testkvm add_custom_target(testkvm
DEPENDS diskimg DEPENDS diskimg
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-BIOS-KVM" -machine type=q35,kernel_irqchip=on,accel=kvm,mem-merge=off,vmport=off -enable-kvm -cpu host,-hypervisor,+topoext COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-BIOS-KVM" -machine type=q35,kernel_irqchip=on,accel="kvm:whpx",mem-merge=off,vmport=off -enable-kvm -cpu host,-hypervisor,+topoext
-smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none -smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-hda ${EXECTOS_BINARY_DIR}/output/disk.img -hda ${EXECTOS_BINARY_DIR}/output/disk.img
-boot menu=on -d int -no-reboot -no-shutdown -serial stdio -boot menu=on -d int -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL) VERBATIM USES_TERMINAL)
elseif(CMAKE_HOST_WIN32)
# This target starts up a QEMU+SEABIOS virtual machine using WHPX accelerator
add_custom_target(testwhpx
DEPENDS diskimg
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-BIOS-WHPX" -machine type=q35,kernel_irqchip=off,accel=whpx,mem-merge=off,vmport=off
-m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-hda ${EXECTOS_BINARY_DIR}/output/disk.img
-boot menu=on -d int -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
endif() endif()
# This target starts up a QEMU+SEABIOS virtual machine using TCG accelerator # This target starts up a QEMU+SEABIOS virtual machine using TCG accelerator

View File

@@ -59,102 +59,16 @@ function(add_module_linker_flags MODULE FLAGS)
set_module_property(${MODULE} LINK_FLAGS ${FLAGS}) set_module_property(${MODULE} LINK_FLAGS ${FLAGS})
endfunction() endfunction()
# This function compiles XT Assembly Development Kit
function(generate_xtadk TARGET_NAME SOURCE_FILES)
# Define the absolute destination path for the generated header file
set(HEADER_OUTPUT "${EXECTOS_BINARY_DIR}/sdk/includes/${TARGET_NAME}.h")
get_filename_component(HEADER_OUTPUT_DIRECTORY "${HEADER_OUTPUT}" DIRECTORY)
# Tokenize global CXX flags into a list to ensure correct argument expansion
separate_arguments(COMPILER_FLAGS NATIVE_COMMAND "${CMAKE_CXX_FLAGS}")
# Resolve and tokenize build-configuration specific flags
string(TOUPPER "${CMAKE_BUILD_TYPE}" BUILD_TYPE)
if(BUILD_TYPE)
separate_arguments(BUILD_TYPE_SPECIFIC_FLAGS NATIVE_COMMAND "${CMAKE_CXX_FLAGS_${BUILD_TYPE}}")
endif()
# Retrieve compiler definitions, include paths, and options
get_directory_property(COMPILE_DEFINITIONS COMPILE_DEFINITIONS)
get_directory_property(INCLUDE_DIRECTORIES INCLUDE_DIRECTORIES)
get_directory_property(COMPILE_OPTIONS COMPILE_OPTIONS)
# Initialize the final compiler argument list
set(COMPILER_ARGUMENTS "")
list(APPEND COMPILER_ARGUMENTS ${COMPILER_FLAGS} ${BUILD_TYPE_SPECIFIC_FLAGS})
# Transform definitions into MSVC-style
foreach(DEFINITION ${COMPILE_DEFINITIONS})
list(APPEND COMPILER_ARGUMENTS "/D${DEFINITION}")
endforeach()
# Transform include paths into MSVC-style
foreach(INCLUDE_PATH ${INCLUDE_DIRECTORIES})
list(APPEND COMPILER_ARGUMENTS "/I${INCLUDE_PATH}")
endforeach()
# Append all supplemental compiler options
list(APPEND COMPILER_ARGUMENTS ${COMPILE_OPTIONS})
set(COLLECTED_ASSEMBLY_OUTPUTS "")
# Iterate through each source file to create individual assembly generation rules
foreach(SOURCE_FILE_PATH ${SOURCE_FILES})
# Extract the base filename
get_filename_component(FILENAME_WITHOUT_EXTENSION "${SOURCE_FILE_PATH}" NAME_WE)
# Define the unique output path for the intermediate assembly file
set(CURRENT_ASSEMBLY_OUTPUT "${CMAKE_CURRENT_BINARY_DIR}/${FILENAME_WITHOUT_EXTENSION}.S")
list(APPEND COLLECTED_ASSEMBLY_OUTPUTS "${CURRENT_ASSEMBLY_OUTPUT}")
get_filename_component(CURRENT_ASSEMBLY_DIRECTORY "${CURRENT_ASSEMBLY_OUTPUT}" DIRECTORY)
# Execute the compiler to generate assembly code
add_custom_command(
OUTPUT "${CURRENT_ASSEMBLY_OUTPUT}"
COMMAND ${CMAKE_COMMAND} -E make_directory "${CURRENT_ASSEMBLY_DIRECTORY}"
COMMAND ${CMAKE_CXX_COMPILER}
${COMPILER_ARGUMENTS}
/c /FAs /Fa${CURRENT_ASSEMBLY_OUTPUT}
-- ${SOURCE_FILE_PATH}
DEPENDS "${SOURCE_FILE_PATH}"
COMMENT "Generating XTADK Assembly: ${FILENAME_WITHOUT_EXTENSION}"
VERBATIM
COMMAND_EXPAND_LISTS
)
endforeach()
# Aggregate all generated assembly units into a single consolidated XTADK header
add_custom_command(
OUTPUT "${HEADER_OUTPUT}"
COMMAND ${CMAKE_COMMAND} -E make_directory "${HEADER_OUTPUT_DIRECTORY}"
COMMAND xtadkgen ${COLLECTED_ASSEMBLY_OUTPUTS} -O "${HEADER_OUTPUT}"
DEPENDS ${COLLECTED_ASSEMBLY_OUTPUTS}
COMMENT "Generating XTADK header: ${TARGET_NAME}"
VERBATIM
)
# Establish the generation target and expose the header directory via an interface library
add_custom_target(${TARGET_NAME}_gen DEPENDS "${HEADER_OUTPUT}")
add_library(${TARGET_NAME} INTERFACE)
add_dependencies(${TARGET_NAME} ${TARGET_NAME}_gen)
target_include_directories(${TARGET_NAME} INTERFACE "${EXECTOS_BINARY_DIR}/sdk/includes")
endfunction()
# This function compiles an assembly bootsector file into a flat binary # This function compiles an assembly bootsector file into a flat binary
function(compile_bootsector NAME SOURCE BASEADDR ENTRYPOINT) function(compile_bootsector NAME SOURCE BASEADDR ENTRYPOINT)
set(BINARY_NAME "${NAME}.bin") set(BINARY_NAME "${NAME}.bin")
set(OBJECT_NAME "${NAME}.obj") set(OBJECT_NAME "${NAME}.obj")
get_directory_property(DEFS COMPILE_DEFINITIONS)
foreach(def ${DEFS})
list(APPEND ASM_DEFS "-D${def}")
endforeach()
add_custom_command( add_custom_command(
OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${BINARY_NAME} OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${BINARY_NAME}
COMMAND ${CMAKE_ASM_COMPILER} COMMAND ${CMAKE_ASM_COMPILER}
/nologo /nologo
--target=i386-none-elf --target=i386-none-elf
${ASM_DEFS}
-I${CMAKE_CURRENT_SOURCE_DIR} -I${CMAKE_CURRENT_SOURCE_DIR}
/Fo${CMAKE_CURRENT_BINARY_DIR}/${OBJECT_NAME} /Fo${CMAKE_CURRENT_BINARY_DIR}/${OBJECT_NAME}
-c -- ${SOURCE} -c -- ${SOURCE}

Binary file not shown.

View File

@@ -13,10 +13,6 @@ The ovmf_vars files, store UEFI variables, which are used to store and retrieve
boot options, device settings, and system preferences. The ovmf_vars file contains the persistent variables specific to boot options, device settings, and system preferences. The ovmf_vars file contains the persistent variables specific to
a virtual machine, allowing it to maintain its configuration across multiple boot sessions. a virtual machine, allowing it to maintain its configuration across multiple boot sessions.
## BOCHS ROM BIOS
The rombios.bin file contains the ROM BIOS image for Bochs. This image is distributed under the GNU Lesser General Public
License (LGPL).
## Video BIOS (LGPL'd VGABios) ## Video BIOS (LGPL'd VGABios)
The vgabios.bin file contains the Video Bios for Bochs and QEMU. This VGA Bios is very specific to the emulated VGA card. The vgabios.bin file contains the Video Bios for Bochs and QEMU. This VGA Bios is very specific to the emulated VGA card.
It is NOT meant to drive a physical vga card. It also implements support for VBE version 2.0. It is NOT meant to drive a physical vga card. It also implements support for VBE version 2.0.

Binary file not shown.

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@@ -1,14 +0,0 @@
# XT Assembly Development Kit
PROJECT(XTADK)
# Specify include directories
include_directories(
${EXECTOS_SOURCE_DIR}/sdk/xtdk
${XTADK_SOURCE_DIR}/includes)
# Specify list of XTADK source code files
list(APPEND XTADK_SOURCE
${XTADK_SOURCE_DIR}/${ARCH}/ke.cc)
# Generate assembly header from XTADK sources
generate_xtadk(xtadk "${XTADK_SOURCE}")

View File

@@ -1,83 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtadk/amd64/ke.cc
* DESCRIPTION: ADK generator for AMD64 version of Kernel Library
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtkmapi.h>
#include <adkdefs.h>
/**
* Generates a definitions file for the Kernel Library used by the XTOS kernel assembly code
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCLINK
XTAPI
VOID
GenerateAssemblyDefinitions(VOID)
{
/* Generate KTRAP_FRAME offsets */
ADK_OFFSET(KTRAP_FRAME, Xmm0);
ADK_OFFSET(KTRAP_FRAME, Xmm1);
ADK_OFFSET(KTRAP_FRAME, Xmm2);
ADK_OFFSET(KTRAP_FRAME, Xmm3);
ADK_OFFSET(KTRAP_FRAME, Xmm4);
ADK_OFFSET(KTRAP_FRAME, Xmm5);
ADK_OFFSET(KTRAP_FRAME, Xmm6);
ADK_OFFSET(KTRAP_FRAME, Xmm7);
ADK_OFFSET(KTRAP_FRAME, Xmm8);
ADK_OFFSET(KTRAP_FRAME, Xmm9);
ADK_OFFSET(KTRAP_FRAME, Xmm10);
ADK_OFFSET(KTRAP_FRAME, Xmm11);
ADK_OFFSET(KTRAP_FRAME, Xmm12);
ADK_OFFSET(KTRAP_FRAME, Xmm13);
ADK_OFFSET(KTRAP_FRAME, Xmm14);
ADK_OFFSET(KTRAP_FRAME, Xmm15);
ADK_OFFSET(KTRAP_FRAME, MxCsr);
ADK_OFFSET(KTRAP_FRAME, PreviousMode);
ADK_OFFSET(KTRAP_FRAME, Cr2);
ADK_OFFSET(KTRAP_FRAME, Cr3);
ADK_OFFSET(KTRAP_FRAME, Dr0);
ADK_OFFSET(KTRAP_FRAME, Dr1);
ADK_OFFSET(KTRAP_FRAME, Dr2);
ADK_OFFSET(KTRAP_FRAME, Dr3);
ADK_OFFSET(KTRAP_FRAME, Dr6);
ADK_OFFSET(KTRAP_FRAME, Dr7);
ADK_OFFSET(KTRAP_FRAME, SegDs);
ADK_OFFSET(KTRAP_FRAME, SegEs);
ADK_OFFSET(KTRAP_FRAME, SegFs);
ADK_OFFSET(KTRAP_FRAME, SegGs);
ADK_OFFSET(KTRAP_FRAME, Rax);
ADK_OFFSET(KTRAP_FRAME, Rbx);
ADK_OFFSET(KTRAP_FRAME, Rcx);
ADK_OFFSET(KTRAP_FRAME, Rdx);
ADK_OFFSET(KTRAP_FRAME, R8);
ADK_OFFSET(KTRAP_FRAME, R9);
ADK_OFFSET(KTRAP_FRAME, R10);
ADK_OFFSET(KTRAP_FRAME, R11);
ADK_OFFSET(KTRAP_FRAME, R12);
ADK_OFFSET(KTRAP_FRAME, R13);
ADK_OFFSET(KTRAP_FRAME, R14);
ADK_OFFSET(KTRAP_FRAME, R15);
ADK_OFFSET(KTRAP_FRAME, Rsi);
ADK_OFFSET(KTRAP_FRAME, Rdi);
ADK_OFFSET(KTRAP_FRAME, Rbp);
ADK_OFFSET(KTRAP_FRAME, Vector);
ADK_OFFSET(KTRAP_FRAME, ErrorCode);
ADK_OFFSET(KTRAP_FRAME, ExceptionFrame);
ADK_OFFSET(KTRAP_FRAME, Rip);
ADK_OFFSET(KTRAP_FRAME, SegCs);
ADK_OFFSET(KTRAP_FRAME, Flags);
ADK_OFFSET(KTRAP_FRAME, Rsp);
ADK_OFFSET(KTRAP_FRAME, SegSs);
/* Generate KTRAP_FRAME size and REGISTERS_SIZE */
ADK_SIZE(KTRAP_FRAME);
ADK_SIZE_FROM(REGISTERS_SIZE, KTRAP_FRAME, Rax);
}

View File

@@ -1,57 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtadk/i686/ke.cc
* DESCRIPTION: ADK generator for i686 version of Kernel Library
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtkmapi.h>
#include <adkdefs.h>
/**
* Generates a definitions file for the Kernel Library used by the XTOS kernel assembly code
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCLINK
XTAPI
VOID
GenerateAssemblyDefinitions(VOID)
{
/* Generate KTRAP_FRAME offsets */
ADK_OFFSET(KTRAP_FRAME, PreviousMode);
ADK_OFFSET(KTRAP_FRAME, Cr2);
ADK_OFFSET(KTRAP_FRAME, Cr3);
ADK_OFFSET(KTRAP_FRAME, Dr0);
ADK_OFFSET(KTRAP_FRAME, Dr1);
ADK_OFFSET(KTRAP_FRAME, Dr2);
ADK_OFFSET(KTRAP_FRAME, Dr3);
ADK_OFFSET(KTRAP_FRAME, Dr6);
ADK_OFFSET(KTRAP_FRAME, Dr7);
ADK_OFFSET(KTRAP_FRAME, SegDs);
ADK_OFFSET(KTRAP_FRAME, SegEs);
ADK_OFFSET(KTRAP_FRAME, SegFs);
ADK_OFFSET(KTRAP_FRAME, SegGs);
ADK_OFFSET(KTRAP_FRAME, Eax);
ADK_OFFSET(KTRAP_FRAME, Ebx);
ADK_OFFSET(KTRAP_FRAME, Ecx);
ADK_OFFSET(KTRAP_FRAME, Edx);
ADK_OFFSET(KTRAP_FRAME, Esi);
ADK_OFFSET(KTRAP_FRAME, Edi);
ADK_OFFSET(KTRAP_FRAME, Ebp);
ADK_OFFSET(KTRAP_FRAME, Vector);
ADK_OFFSET(KTRAP_FRAME, ErrorCode);
ADK_OFFSET(KTRAP_FRAME, Eip);
ADK_OFFSET(KTRAP_FRAME, SegCs);
ADK_OFFSET(KTRAP_FRAME, Flags);
ADK_OFFSET(KTRAP_FRAME, Esp);
ADK_OFFSET(KTRAP_FRAME, SegSs);
/* Generate KTRAP_FRAME size and REGISTERS_SIZE */
ADK_SIZE(KTRAP_FRAME);
ADK_SIZE_FROM(REGISTERS_SIZE, KTRAP_FRAME, Eax);
}

View File

@@ -1,19 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtadk/adkdefs.h
* DESCRIPTION: Definitions for XTADK
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTADK_ADKDEFS_H
#define __XTADK_ADKDEFS_H
/* Macros for calculating structure size and offsets for assembler code */
#define ADK_DEFINE(Symbol, Value) __asm__ volatile("\n\t# ==> " #Symbol " %c0" : : "i" ((SIZE_T)(Value)))
#define ADK_OFFSET(Structure, Member) ADK_DEFINE(Structure ## _ ## Member, FIELD_OFFSET(Structure, Member))
#define ADK_SIZE(Structure) ADK_DEFINE(Structure ## _SIZE, sizeof(Structure))
#define ADK_SIZE_FROM(Name, Structure, Member) ADK_DEFINE(Structure ## _ ## Name, sizeof(Structure) - FIELD_OFFSET(Structure, Member))
#endif /* __XTADK_ADKDEFS_H */

View File

@@ -12,7 +12,6 @@
#include <xtdefs.h> #include <xtdefs.h>
#include <xtstruct.h> #include <xtstruct.h>
#include <xttypes.h> #include <xttypes.h>
#include ARCH_HEADER(xtstruct.h)
/* Control Register 0 constants */ /* Control Register 0 constants */
@@ -128,10 +127,6 @@
#define X86_EFLAGS_VIP_MASK 0x00100000 /* Virtual Interrupt Pending */ #define X86_EFLAGS_VIP_MASK 0x00100000 /* Virtual Interrupt Pending */
#define X86_EFLAGS_ID_MASK 0x00200000 /* Identification */ #define X86_EFLAGS_ID_MASK 0x00200000 /* Identification */
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* CPU vendor enumeration list */ /* CPU vendor enumeration list */
typedef enum _CPU_VENDOR typedef enum _CPU_VENDOR
{ {
@@ -140,18 +135,6 @@ typedef enum _CPU_VENDOR
CPU_VENDOR_UNKNOWN = 0xFFFFFFFF CPU_VENDOR_UNKNOWN = 0xFFFFFFFF
} CPU_VENDOR, *PCPU_VENDOR; } CPU_VENDOR, *PCPU_VENDOR;
/* CPUID advanced power management features (0x80000007) enumeration list */
typedef enum _CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT
{
CPUID_FEATURES_EDX_TS = 1 << 0, /* Temperature Sensor */
CPUID_FEATURES_EDX_FIS = 1 << 1, /* Frequency ID Selection */
CPUID_FEATURES_EDX_VIS = 1 << 2, /* Voltage ID Selection */
CPUID_FEATURES_EDX_TTS = 1 << 3, /* ThermaTrip Support */
CPUID_FEATURES_EDX_HTC = 1 << 4, /* Hardware Thermal Throttling */
CPUID_FEATURES_EDX_STC = 1 << 5, /* Software Thermal Throttling */
CPUID_FEATURES_EDX_TSCI = 1 << 8 /* TSC Invariant */
} CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT, *PCPUID_FEATURES_ADVANCED_POWER_MANAGEMENT;
/* CPUID extended features (0x80000001) enumeration list */ /* CPUID extended features (0x80000001) enumeration list */
typedef enum _CPUID_FEATURES_EXTENDED typedef enum _CPUID_FEATURES_EXTENDED
{ {
@@ -193,23 +176,6 @@ typedef enum _CPUID_FEATURES_EXTENDED
CPUID_FEATURES_EDX_3DNOW = 1 << 31 CPUID_FEATURES_EDX_3DNOW = 1 << 31
} CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED; } CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED;
/* CPUID Thermal and Power Management features (0x00000006) enumeration list */
typedef enum _CPUID_FEATURES_POWER_MANAGEMENT
{
CPUID_FEATURES_EAX_DTHERM = 1 << 0,
CPUID_FEATURES_EAX_IDA = 1 << 1,
CPUID_FEATURES_EAX_ARAT = 1 << 2,
CPUID_FEATURES_EAX_PLN = 1 << 4,
CPUID_FEATURES_EAX_PTS = 1 << 6,
CPUID_FEATURES_EAX_HWP = 1 << 7,
CPUID_FEATURES_EAX_HWP_NOTIFY = 1 << 8,
CPUID_FEATURES_EAX_HWP_ACT_WINDOW = 1 << 9,
CPUID_FEATURES_EAX_HWP_EPP = 1 << 10,
CPUID_FEATURES_EAX_HWP_PKG_REQ = 1 << 11,
CPUID_FEATURES_EAX_HWP_HIGHEST_PERF_CHANGE = 1 << 15,
CPUID_FEATURES_EAX_HFI = 1 << 19
} CPUID_FEATURES_LEAF6, *PCPUID_FEATURES_LEAF6;
/* CPUID STD1 features (0x00000001) enumeration list */ /* CPUID STD1 features (0x00000001) enumeration list */
typedef enum _CPUID_FEATURES_STANDARD1 typedef enum _CPUID_FEATURES_STANDARD1
{ {
@@ -236,7 +202,7 @@ typedef enum _CPUID_FEATURES_STANDARD1
CPUID_FEATURES_ECX_X2APIC = 1 << 21, CPUID_FEATURES_ECX_X2APIC = 1 << 21,
CPUID_FEATURES_ECX_MOVBE = 1 << 22, CPUID_FEATURES_ECX_MOVBE = 1 << 22,
CPUID_FEATURES_ECX_POPCNT = 1 << 23, CPUID_FEATURES_ECX_POPCNT = 1 << 23,
CPUID_FEATURES_ECX_TSC_DEADLINE = 1 << 24, CPUID_FEATURES_ECX_TSC = 1 << 24,
CPUID_FEATURES_ECX_AES = 1 << 25, CPUID_FEATURES_ECX_AES = 1 << 25,
CPUID_FEATURES_ECX_XSAVE = 1 << 26, CPUID_FEATURES_ECX_XSAVE = 1 << 26,
CPUID_FEATURES_ECX_OSXSAVE = 1 << 27, CPUID_FEATURES_ECX_OSXSAVE = 1 << 27,
@@ -410,23 +376,16 @@ typedef enum _CPUID_FEATURES_STANDARD7_LEAF1
/* CPUID requests */ /* CPUID requests */
typedef enum _CPUID_REQUESTS typedef enum _CPUID_REQUESTS
{ {
CPUID_GET_VENDOR_STRING = 0x00000000, CPUID_GET_VENDOR_STRING,
CPUID_GET_STANDARD1_FEATURES = 0x00000001, CPUID_GET_STANDARD1_FEATURES,
CPUID_GET_TLB_CACHE = 0x00000002, CPUID_GET_TLB_CACHE,
CPUID_GET_SERIAL = 0x00000003, CPUID_GET_SERIAL,
CPUID_GET_CACHE_TOPOLOGY = 0x00000004, CPUID_GET_CACHE_TOPOLOGY,
CPUID_GET_MONITOR_MWAIT = 0x00000005, CPUID_GET_MONITOR_MWAIT,
CPUID_GET_POWER_MANAGEMENT = 0x00000006, CPUID_GET_POWER_MANAGEMENT,
CPUID_GET_STANDARD7_FEATURES = 0x00000007, CPUID_GET_STANDARD7_FEATURES
CPUID_GET_TSC_CRYSTAL_CLOCK = 0x00000015,
CPUID_GET_EXTENDED_MAX = 0x80000000,
CPUID_GET_EXTENDED_FEATURES = 0x80000001,
CPUID_GET_ADVANCED_POWER_MANAGEMENT = 0x80000007
} CPUID_REQUESTS, *PCPUID_REQUESTS; } CPUID_REQUESTS, *PCPUID_REQUESTS;
/* Interrupt handler */
typedef VOID (*PINTERRUPT_HANDLER)(PKTRAP_FRAME TrapFrame);
/* Processor identification information */ /* Processor identification information */
typedef struct _CPU_IDENTIFICATION typedef struct _CPU_IDENTIFICATION
{ {
@@ -467,5 +426,4 @@ typedef enum _TRAMPOLINE_TYPE
TrampolineEnableXpa TrampolineEnableXpa
} TRAMPOLINE_TYPE, *PTRAMPOLINE_TYPE; } TRAMPOLINE_TYPE, *PTRAMPOLINE_TYPE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_ARTYPES_H */ #endif /* __XTDK_AMD64_ARTYPES_H */

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@@ -15,9 +15,6 @@
#include <amd64/xtstruct.h> #include <amd64/xtstruct.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Hardware layer routines forward references */ /* Hardware layer routines forward references */
XTCLINK XTCLINK
XTCDECL XTCDECL
@@ -52,5 +49,4 @@ VOID
HlWritePort32(IN USHORT Port, HlWritePort32(IN USHORT Port,
IN ULONG Value); IN ULONG Value);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_HLFUNCS_H */ #endif /* __XTDK_AMD64_HLFUNCS_H */

View File

@@ -9,7 +9,6 @@
#ifndef __XTDK_AMD64_HLTYPES_H #ifndef __XTDK_AMD64_HLTYPES_H
#define __XTDK_AMD64_HLTYPES_H #define __XTDK_AMD64_HLTYPES_H
#include <xtbase.h>
#include <xtdefs.h> #include <xtdefs.h>
#include <xtstruct.h> #include <xtstruct.h>
#include <xttypes.h> #include <xttypes.h>
@@ -54,27 +53,6 @@
/* Maximum number of I/O APICs */ /* Maximum number of I/O APICs */
#define APIC_MAX_IOAPICS 64 #define APIC_MAX_IOAPICS 64
/* I/O APIC base address */
#define IOAPIC_DEFAULT_BASE 0xFEC00000
/* I/O APIC definitions */
#define IOAPIC_MAX_CONTROLLERS 128
#define IOAPIC_MAX_OVERRIDES 16
#define IOAPIC_RTE_MASKED 0x100FF
#define IOAPIC_RTE_SIZE 2
#define IOAPIC_VECTOR_FREE 0xFF
#define IOAPIC_VECTOR_RESERVED 0xFE
/* IOAPIC offsets */
#define IOAPIC_IOREGSEL 0x00
#define IOAPIC_IOWIN 0x10
/* IOAPIC registers */
#define IOAPIC_ID 0x00
#define IOAPIC_VER 0x01
#define IOAPIC_ARB 0x02
#define IOAPIC_REDTBL 0x10
/* 8259/ISP PIC ports definitions */ /* 8259/ISP PIC ports definitions */
#define PIC1_CONTROL_PORT 0x20 #define PIC1_CONTROL_PORT 0x20
#define PIC1_DATA_PORT 0x21 #define PIC1_DATA_PORT 0x21
@@ -84,87 +62,6 @@
/* PIC vector definitions */ /* PIC vector definitions */
#define PIC1_VECTOR_SPURIOUS 0x37 #define PIC1_VECTOR_SPURIOUS 0x37
/* HPET General Capabilities definitions */
#define HPET_CAPABILITY_64BIT 0x2000ULL
#define HPET_CAPABILITY_LEGACY_REPLACEMENT 0x8000ULL
/* HPET General Configuration definitions */
#define HPET_CONFIG_ENABLE 0x0001ULL
#define HPET_CONFIG_LEGACY_REPLACEMENT 0x0002ULL
/* HPET Timer Configuration definitions */
#define HPET_TIMER_CONFIG_LEVEL_TRIGGERED 0x0002ULL
#define HPET_TIMER_CONFIG_ENABLED 0x0004ULL
#define HPET_TIMER_CONFIG_PERIODIC 0x0008ULL
#define HPET_TIMER_CONFIG_SUPPORTS_PERIODIC 0x0010ULL
#define HPET_TIMER_CONFIG_SUPPORTS_64BIT 0x0020ULL
#define HPET_TIMER_CONFIG_VALUE_ACCUMULATOR 0x0040ULL
#define HPET_TIMER_CONFIG_FORCE_32BIT 0x0100ULL
#define HPET_TIMER_CONFIG_FSB_ENABLED 0x4000ULL
#define HPET_TIMER_CONFIG_SUPPORTS_FSB 0x8000ULL
/* PIT ports definitions */
#define PIT_COMMAND_PORT 0x43
#define PIT_DATA_PORT0 0x40
#define PIT_DATA_PORT1 0x41
#define PIT_DATA_PORT2 0x42
/* PIT related definitions */
#define PIT_BASE_FREQUENCY 1193182
/* PIT Access Mode: Defines how the CPU reads or writes the counter value */
#define PIT_CMD_ACCESS_LATCH 0x00
#define PIT_CMD_ACCESS_LOWBYTE_ONLY 0x10
#define PIT_CMD_ACCESS_HIGHBYTE_ONLY 0x20
#define PIT_CMD_ACCESS_LOWBYTE_HIGHBYTE 0x30
/* PIT Channel Selection: Specifies the physical timer channel to configure */
#define PIT_CMD_CHANNEL0 0x00
#define PIT_CMD_CHANNEL1 0x40
#define PIT_CMD_CHANNEL2 0x80
/* PIT Operating Mode: Defines the hardware behavior and the generated waveform */
#define PIT_MODE0_INT_ON_TERMINAL_COUNT 0x00
#define PIT_MODE1_ONESHOT 0x02
#define PIT_MODE2_RATE_GENERATOR 0x04
#define PIT_MODE3_SQUARE_WAVE_GEN 0x06
#define PIT_MODE4_SOFTWARE_STROBE 0x08
#define PIT_MODE5_HARDWARE_STROBE 0x0A
/* CMOS controller access ports */
#define CMOS_SELECT_PORT 0x70
#define CMOS_DATA_PORT 0x71
/* CMOD Select port definitions */
#define CMOS_NMI_SELECT 0x80
#define CMOS_REGISTER_SECOND 0x00
#define CMOS_REGISTER_MINUTE 0x02
#define CMOS_REGISTER_HOUR 0x04
#define CMOS_REGISTER_WEEKDAY 0x06
#define CMOS_REGISTER_DAY 0x07
#define CMOS_REGISTER_MONTH 0x08
#define CMOS_REGISTER_YEAR 0x09
#define CMOS_REGISTER_A 0x0A
#define CMOS_REGISTER_B 0x0B
#define CMOS_REGISTER_C 0x0C
/* CMOS Register A definitions */
#define CMOS_REGISTER_A_RATE_MASK 0x0F
#define CMOS_REGISTER_A_UPDATE_IN_PROGRESS 0x80
/* CMOS Register B definitions */
#define CMOS_REGISTER_B_24_HOUR 0x02
#define CMOS_REGISTER_B_BINARY 0x04
#define CMOS_REGISTER_B_PERIODIC 0x40
#define CMOS_REGISTER_B_SET_CLOCK 0x80
/* CMOS Register C definitions */
#define CMOS_REGISTER_C_PERIODIC 0x40
#define CMOS_REGISTER_C_INTERRUPT 0x80
/* CMOS RTC 24-hour mode */
#define CMOS_RTC_POST_MERIDIEM 0x80
/* Serial ports information */ /* Serial ports information */
#define COMPORT_ADDRESS {0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8} #define COMPORT_ADDRESS {0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}
#define COMPORT_COUNT 8 #define COMPORT_COUNT 8
@@ -172,17 +69,6 @@
/* Initial stall factor */ /* Initial stall factor */
#define INITIAL_STALL_FACTOR 100 #define INITIAL_STALL_FACTOR 100
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* APIC destination mode enumeration list */
typedef enum _APIC_DEST_MODE
{
APIC_DM_Physical,
APIC_DM_Logical
} APIC_DEST_MODE, *PAPIC_DEST_MODE;
/* APIC delivery mode enumeration list */ /* APIC delivery mode enumeration list */
typedef enum _APIC_DM typedef enum _APIC_DM
{ {
@@ -240,7 +126,6 @@ typedef enum _APIC_REGISTER
APIC_TICR = 0x38, /* Initial Count Register for Timer */ APIC_TICR = 0x38, /* Initial Count Register for Timer */
APIC_TCCR = 0x39, /* Current Count Register for Timer */ APIC_TCCR = 0x39, /* Current Count Register for Timer */
APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */ APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */
APIC_SIPI = 0x3F, /* Self-IPI Register */
APIC_EAFR = 0x40, /* extended APIC Feature register */ APIC_EAFR = 0x40, /* extended APIC Feature register */
APIC_EACR = 0x41, /* Extended APIC Control Register */ APIC_EACR = 0x41, /* Extended APIC Control Register */
APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */ APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */
@@ -250,19 +135,6 @@ typedef enum _APIC_REGISTER
APIC_EXT3LVTR = 0x53 /* Extended Interrupt 3 Local Vector Table */ APIC_EXT3LVTR = 0x53 /* Extended Interrupt 3 Local Vector Table */
} APIC_REGISTER, *PAPIC_REGISTER; } APIC_REGISTER, *PAPIC_REGISTER;
/* APIC Timer Divide enumeration list */
typedef enum _APIC_TIMER_DIVISOR
{
TIMER_DivideBy2 = 0,
TIMER_DivideBy4 = 1,
TIMER_DivideBy8 = 2,
TIMER_DivideBy16 = 3,
TIMER_DivideBy32 = 8,
TIMER_DivideBy64 = 9,
TIMER_DivideBy128 = 10,
TIMER_DivideBy1 = 11,
} APIC_TIMER_DIVISOR, *PAPIC_TIMER_DIVISOR;
/* I8259 PIC interrupt mode enumeration list */ /* I8259 PIC interrupt mode enumeration list */
typedef enum _PIC_I8259_ICW1_INTERRUPT_MODE typedef enum _PIC_I8259_ICW1_INTERRUPT_MODE
{ {
@@ -380,40 +252,6 @@ typedef union _APIC_SPURIOUS_REGISTER
}; };
} APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER; } APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
/* I/O APIC Controller information */
typedef struct _IOAPIC_DATA
{
ULONG GsiBase;
ULONG Identifier;
ULONG LineCount;
PHYSICAL_ADDRESS PhysicalAddress;
ULONG_PTR VirtualAddress;
} IOAPIC_DATA, *PIOAPIC_DATA;
/* I/O APIC Redirection Register */
typedef union _IOAPIC_REDIRECTION_REGISTER
{
ULONGLONG LongLong;
struct
{
UINT Base;
UINT Extended;
};
struct
{
ULONGLONG Vector:8;
ULONGLONG DeliveryMode:3;
ULONGLONG DestinationMode:1;
ULONGLONG DeliveryStatus:1;
ULONGLONG PinPolarity:1;
ULONGLONG RemoteIRR:1;
ULONGLONG TriggerMode:1;
ULONGLONG Mask:1;
ULONGLONG Reserved:39;
ULONGLONG Destination:8;
};
} IOAPIC_REDIRECTION_REGISTER, *PIOAPIC_REDIRECTION_REGISTER;
/* I8259 PIC register structure */ /* I8259 PIC register structure */
typedef union _PIC_I8259_ICW1 typedef union _PIC_I8259_ICW1
{ {
@@ -479,38 +317,4 @@ typedef union _PIC_I8259_ICW4
UCHAR Bits; UCHAR Bits;
} PIC_I8259_ICW4, *PPIC_I8259_ICW4; } PIC_I8259_ICW4, *PPIC_I8259_ICW4;
/* HPET Registers structure definition */
typedef struct _HPET_REGISTERS
{
VOLATILE ULONGLONG GeneralCapabilities;
VOLATILE ULONGLONG Reserved0;
VOLATILE ULONGLONG GeneralConfiguration;
VOLATILE ULONGLONG Reserved1;
VOLATILE ULONGLONG GeneralInterruptStatus;
VOLATILE ULONGLONG Reserved2;
VOLATILE ULONGLONG Reserved3[2][12];
VOLATILE ULONGLONG MainCounterValue;
VOLATILE ULONGLONG Reserved4;
struct
{
VOLATILE ULONGLONG Configuration;
VOLATILE ULONGLONG Comparator;
VOLATILE ULONGLONG FsbInterruptRoute;
VOLATILE ULONGLONG Reserved;
} Timers[];
} HPET_REGISTERS, *PHPET_REGISTERS;
typedef struct _TIMER_CAPABILITIES
{
BOOLEAN Arat;
BOOLEAN Art;
BOOLEAN InvariantTsc;
BOOLEAN RDTSCP;
ULONG TimerFrequency;
BOOLEAN TscDeadline;
ULONG TscDenominator;
ULONG TscNumerator;
} TIMER_CAPABILITIES, *PTIMER_CAPABILITIES;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_HLTYPES_H */ #endif /* __XTDK_AMD64_HLTYPES_H */

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@@ -23,7 +23,6 @@
/* GDT selector names */ /* GDT selector names */
#define KGDT_NULL 0x0000 #define KGDT_NULL 0x0000
#define KGDT_R0_CMCODE 0x0008
#define KGDT_R0_CODE 0x0010 #define KGDT_R0_CODE 0x0010
#define KGDT_R0_DATA 0x0018 #define KGDT_R0_DATA 0x0018
#define KGDT_R3_CMCODE 0x0020 #define KGDT_R3_CMCODE 0x0020
@@ -47,7 +46,7 @@
#define KGDT_DESCRIPTOR_CODE 0x08 #define KGDT_DESCRIPTOR_CODE 0x08
/* GDT descriptor type codes */ /* GDT descriptor type codes */
#define KGDT_TYPE_NONE 0x00 #define KGDT_TYPE_NONE 0x0
#define KGDT_TYPE_CODE (0x10 | KGDT_DESCRIPTOR_CODE | KGDT_DESCRIPTOR_EXECUTE_READ) #define KGDT_TYPE_CODE (0x10 | KGDT_DESCRIPTOR_CODE | KGDT_DESCRIPTOR_EXECUTE_READ)
#define KGDT_TYPE_DATA (0x10 | KGDT_DESCRIPTOR_READ_WRITE) #define KGDT_TYPE_DATA (0x10 | KGDT_DESCRIPTOR_READ_WRITE)
@@ -59,7 +58,6 @@
#define KIDT_IST_RESERVED 0 #define KIDT_IST_RESERVED 0
#define KIDT_IST_PANIC 1 #define KIDT_IST_PANIC 1
#define KIDT_IST_MCA 2 #define KIDT_IST_MCA 2
#define KIDT_IST_NMI 3
/* AMD64 Segment Types */ /* AMD64 Segment Types */
#define AMD64_TASK_GATE 0x5 #define AMD64_TASK_GATE 0x5
@@ -110,9 +108,11 @@
/* Static Kernel-Mode address start */ /* Static Kernel-Mode address start */
#define KSEG0_BASE 0xFFFFF80000000000 #define KSEG0_BASE 0xFFFFF80000000000
/* XTOS Kernel address base */
#define KSEG0_KERNEL_BASE 0x0000000800000000
/* XTOS Kernel stack size */ /* XTOS Kernel stack size */
#define KERNEL_STACK_SIZE 0x8000 #define KERNEL_STACK_SIZE 0x8000
#define KERNEL_STACKS 3
/* XTOS Kernel stack guard pages */ /* XTOS Kernel stack guard pages */
#define KERNEL_STACK_GUARD_PAGES 1 #define KERNEL_STACK_GUARD_PAGES 1
@@ -138,10 +138,6 @@
#define NPX_STATE_SCRUB 0x1 #define NPX_STATE_SCRUB 0x1
#define NPX_STATE_SWITCH 0x2 #define NPX_STATE_SWITCH 0x2
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Floating point state storing structure */ /* Floating point state storing structure */
typedef struct _FLOATING_SAVE_AREA typedef struct _FLOATING_SAVE_AREA
{ {
@@ -276,18 +272,11 @@ typedef struct _KIDTENTRY
{ {
USHORT OffsetLow; USHORT OffsetLow;
USHORT Selector; USHORT Selector;
union
{
struct
{
USHORT IstIndex:3; USHORT IstIndex:3;
USHORT Reserved0:5; USHORT Reserved0:5;
USHORT Type:5; USHORT Type:5;
USHORT Dpl:2; USHORT Dpl:2;
USHORT Present:1; USHORT Present:1;
};
USHORT Access;
};
USHORT OffsetMiddle; USHORT OffsetMiddle;
ULONG OffsetHigh; ULONG OffsetHigh;
ULONG Reserved1; ULONG Reserved1;
@@ -523,7 +512,6 @@ typedef struct _KPROCESSOR_BLOCK
KAFFINITY SetMember; KAFFINITY SetMember;
ULONG StallScaleFactor; ULONG StallScaleFactor;
UCHAR CpuNumber; UCHAR CpuNumber;
PINTERRUPT_HANDLER InterruptDispatchTable[256];
} KPROCESSOR_BLOCK, *PKPROCESSOR_BLOCK; } KPROCESSOR_BLOCK, *PKPROCESSOR_BLOCK;
/* Thread Environment Block (TEB) structure definition */ /* Thread Environment Block (TEB) structure definition */
@@ -532,5 +520,4 @@ typedef struct _THREAD_ENVIRONMENT_BLOCK
THREAD_INFORMATION_BLOCK InformationBlock; THREAD_INFORMATION_BLOCK InformationBlock;
} THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK; } THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_KETYPES_H */ #endif /* __XTDK_AMD64_KETYPES_H */

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@@ -25,11 +25,11 @@
#define MM_PXE_BASE 0xFFFFF6FB7DBED000ULL #define MM_PXE_BASE 0xFFFFF6FB7DBED000ULL
/* Page directory and page base addresses for 5-level paging */ /* Page directory and page base addresses for 5-level paging */
#define MM_PTE_LA57_BASE 0xFFED000000000000ULL #define MM_PTE_LA57_BASE 0xFFFF000000000000ULL
#define MM_PDE_LA57_BASE 0xFFEDF68000000000ULL #define MM_PDE_LA57_BASE 0xFFFF010000000000ULL
#define MM_PPE_LA57_BASE 0xFFEDF6FB40000000ULL #define MM_PPE_LA57_BASE 0xFFFF010800000000ULL
#define MM_PXE_LA57_BASE 0xFFEDF6FB7DA00000ULL #define MM_PXE_LA57_BASE 0xFFFF010840000000ULL
#define MM_P5E_LA57_BASE 0xFFEDF6FB7DBED000ULL #define MM_P5E_LA57_BASE 0xFFFF010840200000ULL
/* PTE shift values */ /* PTE shift values */
#define MM_PTE_SHIFT 3 #define MM_PTE_SHIFT 3
@@ -39,56 +39,15 @@
#define MM_PXI_SHIFT 39 #define MM_PXI_SHIFT 39
#define MM_P5I_SHIFT 48 #define MM_P5I_SHIFT 48
/* PTE state flags */ /* Number of PTEs per page */
#define MM_PTE_VALID 0x0000000000000001ULL #define MM_PTE_PER_PAGE 512
#define MM_PTE_ACCESSED 0x0000000000000020ULL #define MM_PDE_PER_PAGE 512
#define MM_PTE_DIRTY 0x0000000000000040ULL #define MM_PPE_PER_PAGE 512
#define MM_PXE_PER_PAGE 512
/* PTE scope flags */
#define MM_PTE_LARGE_PAGE 0x0000000000000080ULL
#define MM_PTE_GLOBAL 0x0000000000000100ULL
/* PTE access flags */
#define MM_PTE_NOACCESS 0x0000000000000000ULL
#define MM_PTE_READONLY 0x0000000000000000ULL
#define MM_PTE_EXECUTE 0x0000000000000000ULL
#define MM_PTE_EXECUTE_READ 0x0000000000000000ULL
#define MM_PTE_READWRITE 0x8000000000000002ULL
#define MM_PTE_WRITECOPY 0x8000000000000200ULL
#define MM_PTE_EXECUTE_READWRITE 0x0000000000000002ULL
#define MM_PTE_EXECUTE_WRITECOPY 0x0000000000000200ULL
/* PTE protection flags */
#define MM_PTE_NOEXECUTE 0x8000000000000000ULL
#define MM_PTE_GUARDED 0x8000000000000018ULL
#define MM_PTE_PROTECT 0x8000000000000612ULL
/* PTE cache flags */
#define MM_PTE_CACHE_ENABLE 0x0000000000000000ULL
#define MM_PTE_CACHE_DISABLE 0x0000000000000010ULL
#define MM_PTE_CACHE_WRITECOMBINED 0x0000000000000010ULL
#define MM_PTE_CACHE_WRITETHROUGH 0x0000000000000008ULL
/* PTE software flags */
#define MM_PTE_COPY_ON_WRITE 0x0000000000000200ULL
#define MM_PTE_PROTOTYPE 0x0000000000000400ULL
#define MM_PTE_TRANSITION 0x0000000000000800ULL
/* PTE frame bits */
#define MM_PTE_FRAME_BITS 57
/* PTE protection bits */
#define MM_PTE_PROTECTION_BITS 5
/* Base address of the system page table */
#define MM_SYSTEM_PTE_BASE KSEG0_BASE
/* Minimum number of physical pages needed by the system */ /* Minimum number of physical pages needed by the system */
#define MM_MINIMUM_PHYSICAL_PAGES 2048 #define MM_MINIMUM_PHYSICAL_PAGES 2048
/* Number of system PTEs */
#define MM_DEFAULT_NUMBER_SYSTEM_PTES 22000
/* Default number of secondary colors */ /* Default number of secondary colors */
#define MM_DEFAULT_SECONDARY_COLORS 64 #define MM_DEFAULT_SECONDARY_COLORS 64
@@ -101,31 +60,12 @@
/* HAL memory pool virtual address start */ /* HAL memory pool virtual address start */
#define MM_HARDWARE_VA_START 0xFFFFFFFFFFC00000ULL #define MM_HARDWARE_VA_START 0xFFFFFFFFFFC00000ULL
/* Kernel shared data address */
#define MM_KERNEL_SHARED_DATA_ADDRESS 0xFFFFFFFFFFDF0000ULL
/* Maximum physical address used by HAL allocations */ /* Maximum physical address used by HAL allocations */
#define MM_MAXIMUM_PHYSICAL_ADDRESS 0x00000000FFFFFFFFULL #define MM_MAXIMUM_PHYSICAL_ADDRESS 0x00000000FFFFFFFFULL
/* Highest system address */
#define MM_HIGHEST_SYSTEM_ADDRESS 0xFFFFFFFFFFFFFFFFULL
/* Trampoline code address */ /* Trampoline code address */
#define MM_TRAMPOLINE_ADDRESS 0x80000 #define MM_TRAMPOLINE_ADDRESS 0x80000
/* Pool block size */
#define MM_POOL_BLOCK_SIZE 16
/* Number of pool lists per page */
#define MM_POOL_LISTS_PER_PAGE (MM_PAGE_SIZE / MM_POOL_BLOCK_SIZE)
/* Number of pool tracking tables */
#define MM_POOL_TRACKING_TABLES 64
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Page size enumeration list */ /* Page size enumeration list */
typedef enum _PAGE_SIZE typedef enum _PAGE_SIZE
{ {
@@ -312,7 +252,6 @@ typedef struct _MMPFN
USHORT ReferenceCount; USHORT ReferenceCount;
} e2; } e2;
} u3; } u3;
ULONG UsedPageTableEntries;
union union
{ {
MMPTE OriginalPte; MMPTE OriginalPte;
@@ -323,33 +262,15 @@ typedef struct _MMPFN
ULONG_PTR EntireFrame; ULONG_PTR EntireFrame;
struct struct
{ {
ULONG_PTR PteFrame:57; ULONG_PTR PteFrame:58;
ULONG_PTR InPageError:1; ULONG_PTR InPageError:1;
ULONG_PTR VerifierAllocation:1; ULONG_PTR VerifierAllocation:1;
ULONG_PTR AweAllocation:1; ULONG_PTR AweAllocation:1;
ULONG_PTR Priority:3; ULONG_PTR LockCharged:1;
ULONG_PTR KernelStack:1;
ULONG_PTR MustBeCached:1; ULONG_PTR MustBeCached:1;
}; };
} u4; } u4;
} MMPFN, *PMMPFN; } MMPFN, *PMMPFN;
/* Pool descriptor structure definition */
typedef struct _POOL_DESCRIPTOR
{
LIST_ENTRY ListHeads[MM_POOL_LISTS_PER_PAGE];
PVOID LockAddress;
ULONG PoolIndex;
LONG PendingFreeDepth;
PVOID PendingFrees;
MMPOOL_TYPE PoolType;
ULONG RunningFrees;
ULONG RunningAllocations;
ULONG Threshold;
ULONG TotalPages;
ULONG TotalBigAllocations;
SIZE_T TotalBytes;
SIZE_T Reserved;
} POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_MMTYPES_H */ #endif /* __XTDK_AMD64_MMTYPES_H */

View File

@@ -12,20 +12,13 @@
#include <xtdefs.h> #include <xtdefs.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Architecture-specific enumeration lists forward references */ /* Architecture-specific enumeration lists forward references */
typedef enum _APIC_DEST_MODE APIC_DEST_MODE, *PAPIC_DEST_MODE;
typedef enum _APIC_DM APIC_DM, *PAPIC_DM; typedef enum _APIC_DM APIC_DM, *PAPIC_DM;
typedef enum _APIC_DSH APIC_DSH, *PAPIC_DSH; typedef enum _APIC_DSH APIC_DSH, *PAPIC_DSH;
typedef enum _APIC_MODE APIC_MODE, *PAPIC_MODE; typedef enum _APIC_MODE APIC_MODE, *PAPIC_MODE;
typedef enum _APIC_REGISTER APIC_REGISTER, *PAPIC_REGISTER; typedef enum _APIC_REGISTER APIC_REGISTER, *PAPIC_REGISTER;
typedef enum _APIC_TIMER_DIVISOR APIC_TIMER_DIVISOR, *PAPIC_TIMER_DIVISOR;
typedef enum _CPU_VENDOR CPU_VENDOR, *PCPU_VENDOR; typedef enum _CPU_VENDOR CPU_VENDOR, *PCPU_VENDOR;
typedef enum _CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT, *PCPUID_FEATURES_ADVANCED_POWER_MANAGEMENT;
typedef enum _CPUID_FEATURES_EXTENDED CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED; typedef enum _CPUID_FEATURES_EXTENDED CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED;
typedef enum _CPUID_FEATURES_POWER_MANAGEMENT CPUID_FEATURES_POWER_MANAGEMENT, *PCPUID_FEATURES_POWER_MANAGEMENT;
typedef enum _CPUID_FEATURES_STANDARD1 CPUID_FEATURES_STANDARD1, *PCPUID_FEATURES_STANDARD1; typedef enum _CPUID_FEATURES_STANDARD1 CPUID_FEATURES_STANDARD1, *PCPUID_FEATURES_STANDARD1;
typedef enum _CPUID_FEATURES_STANDARD7_LEAF0 CPUID_FEATURES_STANDARD7_LEAF0, *PCPUID_FEATURES_STANDARD7_LEAF0; typedef enum _CPUID_FEATURES_STANDARD7_LEAF0 CPUID_FEATURES_STANDARD7_LEAF0, *PCPUID_FEATURES_STANDARD7_LEAF0;
typedef enum _CPUID_FEATURES_STANDARD7_LEAF1 CPUID_FEATURES_STANDARD7_LEAF1, *PCPUID_FEATURES_STANDARD7_LEAF1; typedef enum _CPUID_FEATURES_STANDARD7_LEAF1 CPUID_FEATURES_STANDARD7_LEAF1, *PCPUID_FEATURES_STANDARD7_LEAF1;
@@ -46,8 +39,6 @@ typedef struct _CPUID_REGISTERS CPUID_REGISTERS, *PCPUID_REGISTERS;
typedef struct _CPUID_SIGNATURE CPUID_SIGNATURE, *PCPUID_SIGNATURE; typedef struct _CPUID_SIGNATURE CPUID_SIGNATURE, *PCPUID_SIGNATURE;
typedef struct _FLOATING_SAVE_AREA FLOATING_SAVE_AREA, *PFLOATING_SAVE_AREA; typedef struct _FLOATING_SAVE_AREA FLOATING_SAVE_AREA, *PFLOATING_SAVE_AREA;
typedef struct _HARDWARE_PTE HARDWARE_PTE, *PHARDWARE_PTE; typedef struct _HARDWARE_PTE HARDWARE_PTE, *PHARDWARE_PTE;
typedef struct _HPET_REGISTERS HPET_REGISTERS, *PHPET_REGISTERS;
typedef struct _IOAPIC_DATA IOAPIC_DATA, *PIOAPIC_DATA;
typedef struct _KDESCRIPTOR KDESCRIPTOR, *PKDESCRIPTOR; typedef struct _KDESCRIPTOR KDESCRIPTOR, *PKDESCRIPTOR;
typedef struct _KEXCEPTION_FRAME KEXCEPTION_FRAME, *PKEXCEPTION_FRAME; typedef struct _KEXCEPTION_FRAME KEXCEPTION_FRAME, *PKEXCEPTION_FRAME;
typedef struct _KGDTENTRY KGDTENTRY, *PKGDTENTRY; typedef struct _KGDTENTRY KGDTENTRY, *PKGDTENTRY;
@@ -70,16 +61,13 @@ typedef struct _MMPTE_PROTOTYPE MMPTE_PROTOTYPE, *PMMPTE_PROTOTYPE;
typedef struct _MMPTE_SOFTWARE MMPTE_SOFTWARE, *PMMPTE_SOFTWARE; typedef struct _MMPTE_SOFTWARE MMPTE_SOFTWARE, *PMMPTE_SOFTWARE;
typedef struct _MMPTE_SUBSECTION MMPTE_SUBSECTION, *PMMPTE_SUBSECTION; typedef struct _MMPTE_SUBSECTION MMPTE_SUBSECTION, *PMMPTE_SUBSECTION;
typedef struct _MMPTE_TRANSITION MMPTE_TRANSITION, *PMMPTE_TRANSITION; typedef struct _MMPTE_TRANSITION MMPTE_TRANSITION, *PMMPTE_TRANSITION;
typedef struct _POOL_DESCRIPTOR POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
typedef struct _THREAD_ENVIRONMENT_BLOCK THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK; typedef struct _THREAD_ENVIRONMENT_BLOCK THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
typedef struct _TIMER_CAPABILITIES TIMER_CAPABILITIES, *PTIMER_CAPABILITIES;
/* Unions forward references */ /* Unions forward references */
typedef union _APIC_BASE_REGISTER APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER; typedef union _APIC_BASE_REGISTER APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER;
typedef union _APIC_COMMAND_REGISTER APIC_COMMAND_REGISTER, *PAPIC_COMMAND_REGISTER; typedef union _APIC_COMMAND_REGISTER APIC_COMMAND_REGISTER, *PAPIC_COMMAND_REGISTER;
typedef union _APIC_LVT_REGISTER APIC_LVT_REGISTER, *PAPIC_LVT_REGISTER; typedef union _APIC_LVT_REGISTER APIC_LVT_REGISTER, *PAPIC_LVT_REGISTER;
typedef union _APIC_SPURIOUS_REGISTER APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER; typedef union _APIC_SPURIOUS_REGISTER APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
typedef union _IOAPIC_REDIRECTION_REGISTER IOAPIC_REDIRECTION_REGISTER, *PIOAPIC_REDIRECTION_REGISTER;
typedef union _MMPTE MMP5E, *PMMP5E; typedef union _MMPTE MMP5E, *PMMP5E;
typedef union _MMPTE MMPDE, *PMMPDE; typedef union _MMPTE MMPDE, *PMMPDE;
typedef union _MMPTE MMPPE, *PMMPPE; typedef union _MMPTE MMPPE, *PMMPPE;
@@ -90,5 +78,4 @@ typedef union _PIC_I8259_ICW2 PIC_I8259_ICW2, *PPIC_I8259_ICW2;
typedef union _PIC_I8259_ICW3 PIC_I8259_ICW3, *PPIC_I8259_ICW3; typedef union _PIC_I8259_ICW3 PIC_I8259_ICW3, *PPIC_I8259_ICW3;
typedef union _PIC_I8259_ICW4 PIC_I8259_ICW4, *PPIC_I8259_ICW4; typedef union _PIC_I8259_ICW4 PIC_I8259_ICW4, *PPIC_I8259_ICW4;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_XTSTRUCT_H */ #endif /* __XTDK_AMD64_XTSTRUCT_H */

View File

@@ -13,9 +13,6 @@
#include <xtuefi.h> #include <xtuefi.h>
/* C/C++ specific code */
#ifndef D__XTOS_ASSEMBLER__
/* XT BootLoader routines forward references */ /* XT BootLoader routines forward references */
XTCLINK XTCLINK
XTCDECL XTCDECL
@@ -24,5 +21,4 @@ BlGetXtLdrProtocol(IN PEFI_SYSTEM_TABLE SystemTable,
IN EFI_HANDLE ImageHandle, IN EFI_HANDLE ImageHandle,
OUT PXTBL_LOADER_PROTOCOL *ProtocolHandler); OUT PXTBL_LOADER_PROTOCOL *ProtocolHandler);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_BLFUNCS_H */ #endif /* __XTDK_BLFUNCS_H */

View File

@@ -29,10 +29,6 @@
#define XTBL_DEBUGPORT_SCREEN 1 #define XTBL_DEBUGPORT_SCREEN 1
#define XTBL_DEBUGPORT_SERIAL 2 #define XTBL_DEBUGPORT_SERIAL 2
/* XTLDR Shell definitions */
#define XTBL_SH_MAX_LINE_LENGTH 256
#define XTBL_SH_HISTORY_ENTRIES 20
/* TUI dialog box attributes */ /* TUI dialog box attributes */
#define XTBL_TUI_DIALOG_GENERIC_BOX 1 #define XTBL_TUI_DIALOG_GENERIC_BOX 1
#define XTBL_TUI_DIALOG_ERROR_BOX 2 #define XTBL_TUI_DIALOG_ERROR_BOX 2
@@ -45,10 +41,6 @@
/* TUI dialog box maximum width */ /* TUI dialog box maximum width */
#define XTBL_TUI_MAX_DIALOG_WIDTH 100 #define XTBL_TUI_MAX_DIALOG_WIDTH 100
/* C/C++ specific code */
#ifndef D__XTOS_ASSEMBLER__
/* XTLDR Routine pointers */ /* XTLDR Routine pointers */
typedef LOADER_MEMORY_TYPE (XTCDECL *PBL_GET_MEMTYPE_ROUTINE)(IN EFI_MEMORY_TYPE EfiMemoryType); typedef LOADER_MEMORY_TYPE (XTCDECL *PBL_GET_MEMTYPE_ROUTINE)(IN EFI_MEMORY_TYPE EfiMemoryType);
@@ -59,7 +51,6 @@ typedef EFI_STATUS (XTCDECL *PBL_BOOTMENU_INITIALIZE_OS_LIST)(IN ULONG MaxNameLe
typedef BOOLEAN (XTCDECL *PBL_BOOTUTILS_GET_BOOLEAN_PARAMETER)(IN PCWSTR Parameters, IN PCWSTR Needle); typedef BOOLEAN (XTCDECL *PBL_BOOTUTILS_GET_BOOLEAN_PARAMETER)(IN PCWSTR Parameters, IN PCWSTR Needle);
typedef VOID (XTAPI *PBL_BOOTUTILS_GET_TRAMPOLINE_INFORMATION)(IN TRAMPOLINE_TYPE TrampolineType, OUT PVOID *TrampolineCode, OUT PULONG_PTR TrampolineSize); typedef VOID (XTAPI *PBL_BOOTUTILS_GET_TRAMPOLINE_INFORMATION)(IN TRAMPOLINE_TYPE TrampolineType, OUT PVOID *TrampolineCode, OUT PULONG_PTR TrampolineSize);
typedef EFI_STATUS (XTCDECL *PBL_BUILD_PAGE_MAP)(IN PXTBL_PAGE_MAPPING PageMap, IN ULONG_PTR SelfMapAddress); typedef EFI_STATUS (XTCDECL *PBL_BUILD_PAGE_MAP)(IN PXTBL_PAGE_MAPPING PageMap, IN ULONG_PTR SelfMapAddress);
typedef EFI_STATUS (XTCDECL *PBL_COMMIT_PAGE_MAP)(IN PXTBL_PAGE_MAPPING PageMap);
typedef EFI_STATUS (XTCDECL *PBL_CLOSE_VOLUME)(IN PEFI_HANDLE VolumeHandle); typedef EFI_STATUS (XTCDECL *PBL_CLOSE_VOLUME)(IN PEFI_HANDLE VolumeHandle);
typedef VOID (XTCDECL *PBL_CLEAR_CONSOLE_LINE)(IN ULONGLONG LineNo); typedef VOID (XTCDECL *PBL_CLEAR_CONSOLE_LINE)(IN ULONGLONG LineNo);
typedef BOOLEAN (XTCDECL *PBL_CPU_CPUID)(IN OUT PCPUID_REGISTERS Registers); typedef BOOLEAN (XTCDECL *PBL_CPU_CPUID)(IN OUT PCPUID_REGISTERS Registers);
@@ -77,7 +68,7 @@ typedef VOID (XTCDECL *PBL_CONSOLE_DISABLE_CURSOR)();
typedef VOID (XTCDECL *PBL_CONSOLE_ENABLE_CURSOR)(); typedef VOID (XTCDECL *PBL_CONSOLE_ENABLE_CURSOR)();
typedef VOID (XTCDECL *PBL_CONSOLE_PRINT)(IN PCWSTR Format, IN ...); typedef VOID (XTCDECL *PBL_CONSOLE_PRINT)(IN PCWSTR Format, IN ...);
typedef VOID (XTCDECL *PBL_CONSOLE_QUERY_MODE)(OUT PUINT_PTR ResX, OUT PUINT_PTR ResY); typedef VOID (XTCDECL *PBL_CONSOLE_QUERY_MODE)(OUT PUINT_PTR ResX, OUT PUINT_PTR ResY);
typedef EFI_STATUS (XTCDECL *PBL_CONSOLE_READ_KEY_STROKE)(OUT PEFI_INPUT_KEY Key); typedef VOID (XTCDECL *PBL_CONSOLE_READ_KEY_STROKE)(OUT PEFI_INPUT_KEY Key);
typedef VOID (XTCDECL *PBL_CONSOLE_RESET_INPUT_BUFFER)(); typedef VOID (XTCDECL *PBL_CONSOLE_RESET_INPUT_BUFFER)();
typedef VOID (XTCDECL *PBL_CONSOLE_SET_ATTRIBUTES)(IN ULONGLONG Attributes); typedef VOID (XTCDECL *PBL_CONSOLE_SET_ATTRIBUTES)(IN ULONGLONG Attributes);
typedef VOID (XTCDECL *PBL_CONSOLE_SET_CURSOR_POSITION)(IN ULONGLONG PosX, IN ULONGLONG PosY); typedef VOID (XTCDECL *PBL_CONSOLE_SET_CURSOR_POSITION)(IN ULONGLONG PosX, IN ULONGLONG PosY);
@@ -109,9 +100,9 @@ typedef VOID (XTCDECL *PBL_LLIST_INITIALIZE_HEAD)(IN PLIST_ENTRY ListHead);
typedef VOID (XTCDECL *PBL_LLIST_INSERT_HEAD)(IN OUT PLIST_ENTRY ListHead, IN PLIST_ENTRY Entry); typedef VOID (XTCDECL *PBL_LLIST_INSERT_HEAD)(IN OUT PLIST_ENTRY ListHead, IN PLIST_ENTRY Entry);
typedef VOID (XTCDECL *PBL_LLIST_INSERT_TAIL)(IN OUT PLIST_ENTRY ListHead, IN PLIST_ENTRY Entry); typedef VOID (XTCDECL *PBL_LLIST_INSERT_TAIL)(IN OUT PLIST_ENTRY ListHead, IN PLIST_ENTRY Entry);
typedef VOID (XTCDECL *PBL_LLIST_REMOVE_ENTRY)(IN PLIST_ENTRY Entry); typedef VOID (XTCDECL *PBL_LLIST_REMOVE_ENTRY)(IN PLIST_ENTRY Entry);
typedef EFI_STATUS (XTCDECL *PBL_MAP_EFI_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN OUT PVOID *BaseAddress, IN BOOLEAN IdentityMapping, IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine); typedef EFI_STATUS (XTCDECL *PBL_MAP_EFI_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN OUT PVOID *MemoryMapAddress, IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine);
typedef EFI_STATUS (XTCDECL *PBL_MAP_PAGE)(IN PXTBL_PAGE_MAPPING PageMap, IN ULONGLONG VirtualAddress, IN ULONGLONG PhysicalAddress, IN ULONGLONG NumberOfPages); typedef EFI_STATUS (XTCDECL *PBL_MAP_PAGE)(IN PXTBL_PAGE_MAPPING PageMap, IN ULONG_PTR VirtualAddress, IN ULONG_PTR PhysicalAddress, IN ULONG NumberOfPages);
typedef EFI_STATUS (XTCDECL *PBL_MAP_VIRTUAL_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN ULONGLONG VirtualAddress, IN ULONGLONG PhysicalAddress, IN ULONGLONG NumberOfPages, IN LOADER_MEMORY_TYPE MemoryType); typedef EFI_STATUS (XTCDECL *PBL_MAP_VIRTUAL_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN PVOID VirtualAddress, IN PVOID PhysicalAddress, IN ULONGLONG NumberOfPages, IN LOADER_MEMORY_TYPE MemoryType);
typedef VOID (XTAPI *PBL_MOVE_MEMORY)(IN OUT PVOID Destination, IN PCVOID Source, IN SIZE_T Length); typedef VOID (XTAPI *PBL_MOVE_MEMORY)(IN OUT PVOID Destination, IN PCVOID Source, IN SIZE_T Length);
typedef EFI_STATUS (XTCDECL *PBL_OPEN_VOLUME)(IN PEFI_DEVICE_PATH_PROTOCOL DevicePath, OUT PEFI_HANDLE DiskHandle, OUT PEFI_FILE_HANDLE *FsHandle); typedef EFI_STATUS (XTCDECL *PBL_OPEN_VOLUME)(IN PEFI_DEVICE_PATH_PROTOCOL DevicePath, OUT PEFI_HANDLE DiskHandle, OUT PEFI_FILE_HANDLE *FsHandle);
typedef EFI_STATUS (XTCDECL *PBL_OPEN_PROTOCOL)(OUT PEFI_HANDLE Handle, OUT PVOID *ProtocolHandler, IN PEFI_GUID ProtocolGuid); typedef EFI_STATUS (XTCDECL *PBL_OPEN_PROTOCOL)(OUT PEFI_HANDLE Handle, OUT PVOID *ProtocolHandler, IN PEFI_GUID ProtocolGuid);
@@ -147,8 +138,6 @@ typedef XTSTATUS (XTAPI *PBL_WIDESTRING_FORMAT)(IN PRTL_PRINT_CONTEXT Context, I
typedef SIZE_T (XTAPI *PBL_WIDESTRING_LENGTH)(IN PCWSTR String, IN SIZE_T MaxLength); typedef SIZE_T (XTAPI *PBL_WIDESTRING_LENGTH)(IN PCWSTR String, IN SIZE_T MaxLength);
typedef PWCHAR (XTAPI *PBL_WIDESTRING_TOKENIZE)(IN PWCHAR String, IN PCWSTR Delimiter, IN OUT PWCHAR *SavePtr); typedef PWCHAR (XTAPI *PBL_WIDESTRING_TOKENIZE)(IN PWCHAR String, IN PCWSTR Delimiter, IN OUT PWCHAR *SavePtr);
typedef EFI_STATUS (XTCDECL *PBL_WAIT_FOR_EFI_EVENT)(IN UINT_PTR NumberOfEvents, IN PEFI_EVENT Event, OUT PUINT_PTR Index); typedef EFI_STATUS (XTCDECL *PBL_WAIT_FOR_EFI_EVENT)(IN UINT_PTR NumberOfEvents, IN PEFI_EVENT Event, OUT PUINT_PTR Index);
typedef VOID (XTCDECL *PBL_SHELL_COMMAND)(IN ULONG Argc, IN PWCHAR *Argv);
typedef EFI_STATUS (XTCDECL *PBL_REGISTER_SHELL_COMMAND)(IN PCWSTR Command, IN PCWSTR Description, IN PBL_SHELL_COMMAND Handler);
typedef VOID (XTCDECL *PBL_XT_BOOT_MENU)(); typedef VOID (XTCDECL *PBL_XT_BOOT_MENU)();
typedef VOID (XTAPI *PBL_ZERO_MEMORY)(OUT PVOID Destination, IN SIZE_T Length); typedef VOID (XTAPI *PBL_ZERO_MEMORY)(OUT PVOID Destination, IN SIZE_T Length);
@@ -239,21 +228,12 @@ typedef struct _XTBL_KNOWN_BOOT_PROTOCOL
EFI_GUID Guid; EFI_GUID Guid;
} XTBL_KNOWN_BOOT_PROTOCOL, *PXTBL_KNOWN_BOOT_PROTOCOL; } XTBL_KNOWN_BOOT_PROTOCOL, *PXTBL_KNOWN_BOOT_PROTOCOL;
/* XTLDR Shell command entry */
typedef struct _XTBL_SHELL_COMMAND
{
LIST_ENTRY Flink;
PWCHAR Command;
PWCHAR Description;
PBL_SHELL_COMMAND Handler;
} XTBL_SHELL_COMMAND, *PXTBL_SHELL_COMMAND;
/* Boot Loader memory mapping information */ /* Boot Loader memory mapping information */
typedef struct _XTBL_MEMORY_MAPPING typedef struct _XTBL_MEMORY_MAPPING
{ {
LIST_ENTRY ListEntry; LIST_ENTRY ListEntry;
ULONGLONG VirtualAddress; PVOID VirtualAddress;
ULONGLONG PhysicalAddress; PVOID PhysicalAddress;
ULONGLONG NumberOfPages; ULONGLONG NumberOfPages;
LOADER_MEMORY_TYPE MemoryType; LOADER_MEMORY_TYPE MemoryType;
} XTBL_MEMORY_MAPPING, *PXTBL_MEMORY_MAPPING; } XTBL_MEMORY_MAPPING, *PXTBL_MEMORY_MAPPING;
@@ -469,7 +449,6 @@ typedef struct _XTBL_LOADER_PROTOCOL
PBL_ALLOCATE_PAGES AllocatePages; PBL_ALLOCATE_PAGES AllocatePages;
PBL_ALLOCATE_POOL AllocatePool; PBL_ALLOCATE_POOL AllocatePool;
PBL_BUILD_PAGE_MAP BuildPageMap; PBL_BUILD_PAGE_MAP BuildPageMap;
PBL_COMMIT_PAGE_MAP CommitPageMap;
PBL_COMPARE_MEMORY CompareMemory; PBL_COMPARE_MEMORY CompareMemory;
PBL_COPY_MEMORY CopyMemory; PBL_COPY_MEMORY CopyMemory;
PBL_FREE_PAGES FreePages; PBL_FREE_PAGES FreePages;
@@ -497,10 +476,6 @@ typedef struct _XTBL_LOADER_PROTOCOL
PBL_OPEN_PROTOCOL_HANDLE OpenHandle; PBL_OPEN_PROTOCOL_HANDLE OpenHandle;
} Protocol; } Protocol;
struct struct
{
PBL_REGISTER_SHELL_COMMAND RegisterCommand;
} Shell;
struct
{ {
PBL_STRING_COMPARE Compare; PBL_STRING_COMPARE Compare;
PBL_STRING_LENGTH Length; PBL_STRING_LENGTH Length;
@@ -543,5 +518,4 @@ typedef struct _XTBL_LOADER_PROTOCOL
} WideString; } WideString;
} XTBL_LOADER_PROTOCOL, *PXTBL_LOADER_PROTOCOL; } XTBL_LOADER_PROTOCOL, *PXTBL_LOADER_PROTOCOL;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_BLTYPES_H */ #endif /* __XTDK_BLTYPES_H */

View File

@@ -13,9 +13,6 @@
#include <xttypes.h> #include <xttypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel Executive routines forward references */ /* Kernel Executive routines forward references */
XTCLINK XTCLINK
XTFASTCALL XTFASTCALL
@@ -47,5 +44,4 @@ XTFASTCALL
VOID VOID
ExWaitForRundownProtectionRelease(IN PEX_RUNDOWN_REFERENCE Descriptor); ExWaitForRundownProtectionRelease(IN PEX_RUNDOWN_REFERENCE Descriptor);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_EXFUNCS_H */ #endif /* __XTDK_EXFUNCS_H */

View File

@@ -17,10 +17,6 @@
/* Rundown protection flags */ /* Rundown protection flags */
#define EX_RUNDOWN_ACTIVE 0x1 #define EX_RUNDOWN_ACTIVE 0x1
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Executive rundown protection structure definition */ /* Executive rundown protection structure definition */
typedef struct _EX_RUNDOWN_REFERENCE typedef struct _EX_RUNDOWN_REFERENCE
{ {
@@ -38,5 +34,4 @@ typedef struct _EX_RUNDOWN_WAIT_BLOCK
KEVENT WakeEvent; KEVENT WakeEvent;
} EX_RUNDOWN_WAIT_BLOCK, *PEX_RUNDOWN_WAIT_BLOCK; } EX_RUNDOWN_WAIT_BLOCK, *PEX_RUNDOWN_WAIT_BLOCK;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_EXTYPES_H */ #endif /* __XTDK_EXTYPES_H */

View File

@@ -14,9 +14,6 @@
#include <xttypes.h> #include <xttypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Hardware layer routines forward references */ /* Hardware layer routines forward references */
XTCLINK XTCLINK
XTAPI XTAPI
@@ -51,5 +48,4 @@ VOID
HlWriteRegister32(IN PVOID Register, HlWriteRegister32(IN PVOID Register,
IN ULONG Value); IN ULONG Value);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_HLFUNCS_H */ #endif /* __XTDK_HLFUNCS_H */

View File

@@ -64,8 +64,8 @@
#define ACPI_FADT_32BIT_TIMER (1<<8) #define ACPI_FADT_32BIT_TIMER (1<<8)
/* ACPI Timer bit masks */ /* ACPI Timer bit masks */
#define ACPI_FADT_TIMER_32BIT 0xFFFFFFFF #define ACPI_FADT_TIMER_32BIT 0x80000000
#define ACPI_FADT_TIMER_24BIT 0x00FFFFFF #define ACPI_FADT_TIMER_24BIT 0x00800000
/* ACPI MADT subtable type definitions */ /* ACPI MADT subtable type definitions */
#define ACPI_MADT_TYPE_LOCAL_APIC 0 #define ACPI_MADT_TYPE_LOCAL_APIC 0
@@ -101,15 +101,6 @@
#define ACPI_MADT_PLACE_ENABLED 0 /* Processor Local APIC CPU Enabled */ #define ACPI_MADT_PLACE_ENABLED 0 /* Processor Local APIC CPU Enabled */
#define ACPI_MADT_PLAOC_ENABLED 1 /* Processor Local APIC Online Capable */ #define ACPI_MADT_PLAOC_ENABLED 1 /* Processor Local APIC Online Capable */
/* ACPI Timer frequency */
#define ACPI_PM_TIMER_FREQUENCY 3579545
/* ACPI address space definitions */
#define ACPI_ADDRESS_SPACE_MEMORY 0x00
/* Maximum number of cached ACPI tables */
#define ACPI_MAX_CACHED_TABLES 32
/* Default serial port settings */ /* Default serial port settings */
#define COMPORT_CLOCK_RATE 0x1C200 #define COMPORT_CLOCK_RATE 0x1C200
#define COMPORT_WAIT_TIMEOUT 204800 #define COMPORT_WAIT_TIMEOUT 204800
@@ -188,14 +179,6 @@
#define COMPORT_REG_MSR 0x06 /* Modem Status Register */ #define COMPORT_REG_MSR 0x06 /* Modem Status Register */
#define COMPORT_REG_SR 0x07 /* Scratch Register */ #define COMPORT_REG_SR 0x07 /* Scratch Register */
/* Minimum and maximum profile intervals */
#define MIN_PROFILE_INTERVAL 10000
#define MAX_PROFILE_INTERVAL 10000000
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Generic Address structure */ /* Generic Address structure */
typedef struct _GENERIC_ADDRESS typedef struct _GENERIC_ADDRESS
{ {
@@ -231,7 +214,7 @@ typedef struct _ACPI_SUBTABLE_HEADER
typedef struct _ACPI_CACHE_LIST typedef struct _ACPI_CACHE_LIST
{ {
LIST_ENTRY ListEntry; LIST_ENTRY ListEntry;
PACPI_DESCRIPTION_HEADER Table; ACPI_DESCRIPTION_HEADER Header;
} ACPI_CACHE_LIST, *PACPI_CACHE_LIST; } ACPI_CACHE_LIST, *PACPI_CACHE_LIST;
/* ACPI Root System Description Table Pointer (RSDP) structure */ /* ACPI Root System Description Table Pointer (RSDP) structure */
@@ -322,17 +305,6 @@ typedef struct _ACPI_FADT
GENERIC_ADDRESS SleepStatusReg; GENERIC_ADDRESS SleepStatusReg;
} PACKED ACPI_FADT, *PACPI_FADT; } PACKED ACPI_FADT, *PACPI_FADT;
/* ACPI High Precision Event Timer (HPET) table structure */
typedef struct _ACPI_HPET
{
ACPI_DESCRIPTION_HEADER Header;
ULONG EventTimerBlockId;
GENERIC_ADDRESS BaseAddress;
UCHAR HpetNumber;
USHORT MinimumTick;
UCHAR PageProtectionAndOem;
} PACKED ACPI_HPET, *PACPI_HPET;
/* ACPI Multiple APIC Description Table (MADT) structure */ /* ACPI Multiple APIC Description Table (MADT) structure */
typedef struct _ACPI_MADT typedef struct _ACPI_MADT
{ {
@@ -342,26 +314,6 @@ typedef struct _ACPI_MADT
ULONG ApicTables[]; ULONG ApicTables[];
} PACKED ACPI_MADT, *PACPI_MADT; } PACKED ACPI_MADT, *PACPI_MADT;
/* ACPI Interrupt Override MADT subtable structure */
typedef struct _ACPI_MADT_INTERRUPT_OVERRIDE
{
ACPI_SUBTABLE_HEADER Header;
UCHAR Bus;
UCHAR SourceIrq;
ULONG GlobalSystemInterrupt;
USHORT Flags;
} PACKED ACPI_MADT_INTERRUPT_OVERRIDE, *PACPI_MADT_INTERRUPT_OVERRIDE;
/* ACPI IO APIC MADT subtable structure */
typedef struct _ACPI_MADT_IOAPIC
{
ACPI_SUBTABLE_HEADER Header;
UCHAR IoApicId;
UCHAR Reserved;
ULONG IoApicAddress;
ULONG GlobalIrqBase;
} PACKED ACPI_MADT_IOAPIC, *PACPI_MADT_IOAPIC;
/* ACPI Local APIC MADT subtable structure */ /* ACPI Local APIC MADT subtable structure */
typedef struct _ACPI_MADT_LOCAL_APIC typedef struct _ACPI_MADT_LOCAL_APIC
{ {
@@ -498,5 +450,4 @@ typedef struct _SMBIOS3_TABLE_HEADER
ULONGLONG TableAddress; ULONGLONG TableAddress;
} SMBIOS3_TABLE_HEADER, *PSMBIOS3_TABLE_HEADER; } SMBIOS3_TABLE_HEADER, *PSMBIOS3_TABLE_HEADER;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_HLTYPES_H */ #endif /* __XTDK_HLTYPES_H */

View File

@@ -12,7 +12,6 @@
#include <xtdefs.h> #include <xtdefs.h>
#include <xtstruct.h> #include <xtstruct.h>
#include <xttypes.h> #include <xttypes.h>
#include ARCH_HEADER(xtstruct.h)
/* Control Register 0 constants */ /* Control Register 0 constants */
@@ -93,10 +92,6 @@
#define X86_EFLAGS_VIP_MASK 0x00100000 /* Virtual Interrupt Pending */ #define X86_EFLAGS_VIP_MASK 0x00100000 /* Virtual Interrupt Pending */
#define X86_EFLAGS_ID_MASK 0x00200000 /* Identification */ #define X86_EFLAGS_ID_MASK 0x00200000 /* Identification */
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* CPU vendor enumeration list */ /* CPU vendor enumeration list */
typedef enum _CPU_VENDOR typedef enum _CPU_VENDOR
{ {
@@ -105,18 +100,6 @@ typedef enum _CPU_VENDOR
CPU_VENDOR_UNKNOWN = 0xFFFFFFFF CPU_VENDOR_UNKNOWN = 0xFFFFFFFF
} CPU_VENDOR, *PCPU_VENDOR; } CPU_VENDOR, *PCPU_VENDOR;
/* CPUID advanced power management features (0x80000007) enumeration list */
typedef enum _CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT
{
CPUID_FEATURES_EDX_TS = 1 << 0, /* Temperature Sensor */
CPUID_FEATURES_EDX_FIS = 1 << 1, /* Frequency ID Selection */
CPUID_FEATURES_EDX_VIS = 1 << 2, /* Voltage ID Selection */
CPUID_FEATURES_EDX_TTS = 1 << 3, /* ThermaTrip Support */
CPUID_FEATURES_EDX_HTC = 1 << 4, /* Hardware Thermal Throttling */
CPUID_FEATURES_EDX_STC = 1 << 5, /* Software Thermal Throttling */
CPUID_FEATURES_EDX_TSCI = 1 << 8 /* TSC Invariant */
} CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT, *PCPUID_FEATURES_ADVANCED_POWER_MANAGEMENT;
/* CPUID extended features (0x80000001) enumeration list */ /* CPUID extended features (0x80000001) enumeration list */
typedef enum _CPUID_FEATURES_EXTENDED typedef enum _CPUID_FEATURES_EXTENDED
{ {
@@ -158,23 +141,6 @@ typedef enum _CPUID_FEATURES_EXTENDED
CPUID_FEATURES_EDX_3DNOW = 1 << 31 CPUID_FEATURES_EDX_3DNOW = 1 << 31
} CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED; } CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED;
/* CPUID Thermal and Power Management features (0x00000006) enumeration list */
typedef enum _CPUID_FEATURES_POWER_MANAGEMENT
{
CPUID_FEATURES_EAX_DTHERM = 1 << 0,
CPUID_FEATURES_EAX_IDA = 1 << 1,
CPUID_FEATURES_EAX_ARAT = 1 << 2,
CPUID_FEATURES_EAX_PLN = 1 << 4,
CPUID_FEATURES_EAX_PTS = 1 << 6,
CPUID_FEATURES_EAX_HWP = 1 << 7,
CPUID_FEATURES_EAX_HWP_NOTIFY = 1 << 8,
CPUID_FEATURES_EAX_HWP_ACT_WINDOW = 1 << 9,
CPUID_FEATURES_EAX_HWP_EPP = 1 << 10,
CPUID_FEATURES_EAX_HWP_PKG_REQ = 1 << 11,
CPUID_FEATURES_EAX_HWP_HIGHEST_PERF_CHANGE = 1 << 15,
CPUID_FEATURES_EAX_HFI = 1 << 19
} CPUID_FEATURES_LEAF6, *PCPUID_FEATURES_LEAF6;
/* CPUID STD1 features (0x00000001) enumeration list */ /* CPUID STD1 features (0x00000001) enumeration list */
typedef enum _CPUID_FEATURES_STANDARD1 typedef enum _CPUID_FEATURES_STANDARD1
{ {
@@ -201,7 +167,7 @@ typedef enum _CPUID_FEATURES_STANDARD1
CPUID_FEATURES_ECX_X2APIC = 1 << 21, CPUID_FEATURES_ECX_X2APIC = 1 << 21,
CPUID_FEATURES_ECX_MOVBE = 1 << 22, CPUID_FEATURES_ECX_MOVBE = 1 << 22,
CPUID_FEATURES_ECX_POPCNT = 1 << 23, CPUID_FEATURES_ECX_POPCNT = 1 << 23,
CPUID_FEATURES_ECX_TSC_DEADLINE = 1 << 24, CPUID_FEATURES_ECX_TSC = 1 << 24,
CPUID_FEATURES_ECX_AES = 1 << 25, CPUID_FEATURES_ECX_AES = 1 << 25,
CPUID_FEATURES_ECX_XSAVE = 1 << 26, CPUID_FEATURES_ECX_XSAVE = 1 << 26,
CPUID_FEATURES_ECX_OSXSAVE = 1 << 27, CPUID_FEATURES_ECX_OSXSAVE = 1 << 27,
@@ -375,23 +341,16 @@ typedef enum _CPUID_FEATURES_STANDARD7_LEAF1
/* CPUID requests */ /* CPUID requests */
typedef enum _CPUID_REQUESTS typedef enum _CPUID_REQUESTS
{ {
CPUID_GET_VENDOR_STRING = 0x00000000, CPUID_GET_VENDOR_STRING,
CPUID_GET_STANDARD1_FEATURES = 0x00000001, CPUID_GET_STANDARD1_FEATURES,
CPUID_GET_TLB_CACHE = 0x00000002, CPUID_GET_TLB_CACHE,
CPUID_GET_SERIAL = 0x00000003, CPUID_GET_SERIAL,
CPUID_GET_CACHE_TOPOLOGY = 0x00000004, CPUID_GET_CACHE_TOPOLOGY,
CPUID_GET_MONITOR_MWAIT = 0x00000005, CPUID_GET_MONITOR_MWAIT,
CPUID_GET_POWER_MANAGEMENT = 0x00000006, CPUID_GET_POWER_MANAGEMENT,
CPUID_GET_STANDARD7_FEATURES = 0x00000007, CPUID_GET_STANDARD7_FEATURES
CPUID_GET_TSC_CRYSTAL_CLOCK = 0x00000015,
CPUID_GET_EXTENDED_MAX = 0x80000000,
CPUID_GET_EXTENDED_FEATURES = 0x80000001,
CPUID_GET_ADVANCED_POWER_MANAGEMENT = 0x80000007
} CPUID_REQUESTS, *PCPUID_REQUESTS; } CPUID_REQUESTS, *PCPUID_REQUESTS;
/* Interrupt handler */
typedef VOID (*PINTERRUPT_HANDLER)(PKTRAP_FRAME TrapFrame);
/* Processor identification information */ /* Processor identification information */
typedef struct _CPU_IDENTIFICATION typedef struct _CPU_IDENTIFICATION
{ {
@@ -431,5 +390,4 @@ typedef enum _TRAMPOLINE_TYPE
TrampolineApStartup TrampolineApStartup
} TRAMPOLINE_TYPE, *PTRAMPOLINE_TYPE; } TRAMPOLINE_TYPE, *PTRAMPOLINE_TYPE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_ARTYPES_H */ #endif /* __XTDK_I686_ARTYPES_H */

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@@ -15,9 +15,6 @@
#include <i686/xtstruct.h> #include <i686/xtstruct.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Hardware layer routines forward references */ /* Hardware layer routines forward references */
XTCLINK XTCLINK
XTCDECL XTCDECL
@@ -52,5 +49,4 @@ VOID
HlWritePort32(IN USHORT Port, HlWritePort32(IN USHORT Port,
IN ULONG Value); IN ULONG Value);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_HLFUNCS_H */ #endif /* __XTDK_I686_HLFUNCS_H */

View File

@@ -9,7 +9,6 @@
#ifndef __XTDK_I686_HLTYPES_H #ifndef __XTDK_I686_HLTYPES_H
#define __XTDK_I686_HLTYPES_H #define __XTDK_I686_HLTYPES_H
#include <xtbase.h>
#include <xtdefs.h> #include <xtdefs.h>
#include <xtstruct.h> #include <xtstruct.h>
#include <xttypes.h> #include <xttypes.h>
@@ -37,7 +36,6 @@
#define APIC_VECTOR_GENERIC 0xC1 #define APIC_VECTOR_GENERIC 0xC1
#define APIC_VECTOR_SYNC 0xC1 #define APIC_VECTOR_SYNC 0xC1
#define APIC_VECTOR_CLOCK 0xD1 #define APIC_VECTOR_CLOCK 0xD1
#define APIC_VECTOR_CLOCK_IPI 0xD2
#define APIC_VECTOR_IPI 0xE1 #define APIC_VECTOR_IPI 0xE1
#define APIC_VECTOR_ERROR 0xE3 #define APIC_VECTOR_ERROR 0xE3
#define APIC_VECTOR_POWERFAIL 0xEF #define APIC_VECTOR_POWERFAIL 0xEF
@@ -60,27 +58,6 @@
/* Maximum number of I/O APICs */ /* Maximum number of I/O APICs */
#define APIC_MAX_IOAPICS 64 #define APIC_MAX_IOAPICS 64
/* I/O APIC base address */
#define IOAPIC_DEFAULT_BASE 0xFEC00000
/* I/O APIC definitions */
#define IOAPIC_MAX_CONTROLLERS 64
#define IOAPIC_MAX_OVERRIDES 16
#define IOAPIC_RTE_MASKED 0x100FF
#define IOAPIC_RTE_SIZE 2
#define IOAPIC_VECTOR_FREE 0xFF
#define IOAPIC_VECTOR_RESERVED 0xFE
/* IOAPIC offsets */
#define IOAPIC_IOREGSEL 0x00
#define IOAPIC_IOWIN 0x10
/* IOAPIC registers */
#define IOAPIC_ID 0x00
#define IOAPIC_VER 0x01
#define IOAPIC_ARB 0x02
#define IOAPIC_REDTBL 0x10
/* 8259/ISP PIC ports definitions */ /* 8259/ISP PIC ports definitions */
#define PIC1_CONTROL_PORT 0x20 #define PIC1_CONTROL_PORT 0x20
#define PIC1_DATA_PORT 0x21 #define PIC1_DATA_PORT 0x21
@@ -92,87 +69,6 @@
/* PIC vector definitions */ /* PIC vector definitions */
#define PIC1_VECTOR_SPURIOUS 0x37 #define PIC1_VECTOR_SPURIOUS 0x37
/* HPET General Capabilities definitions */
#define HPET_CAPABILITY_64BIT 0x2000ULL
#define HPET_CAPABILITY_LEGACY_REPLACEMENT 0x8000ULL
/* HPET General Configuration definitions */
#define HPET_CONFIG_ENABLE 0x0001ULL
#define HPET_CONFIG_LEGACY_REPLACEMENT 0x0002ULL
/* HPET Timer Configuration definitions */
#define HPET_TIMER_CONFIG_LEVEL_TRIGGERED 0x0002ULL
#define HPET_TIMER_CONFIG_ENABLED 0x0004ULL
#define HPET_TIMER_CONFIG_PERIODIC 0x0008ULL
#define HPET_TIMER_CONFIG_SUPPORTS_PERIODIC 0x0010ULL
#define HPET_TIMER_CONFIG_SUPPORTS_64BIT 0x0020ULL
#define HPET_TIMER_CONFIG_VALUE_ACCUMULATOR 0x0040ULL
#define HPET_TIMER_CONFIG_FORCE_32BIT 0x0100ULL
#define HPET_TIMER_CONFIG_FSB_ENABLED 0x4000ULL
#define HPET_TIMER_CONFIG_SUPPORTS_FSB 0x8000ULL
/* PIT ports definitions */
#define PIT_COMMAND_PORT 0x43
#define PIT_DATA_PORT0 0x40
#define PIT_DATA_PORT1 0x41
#define PIT_DATA_PORT2 0x42
/* PIT related definitions */
#define PIT_BASE_FREQUENCY 1193182
/* PIT Access Mode: Defines how the CPU reads or writes the counter value */
#define PIT_CMD_ACCESS_LATCH 0x00
#define PIT_CMD_ACCESS_LOWBYTE_ONLY 0x10
#define PIT_CMD_ACCESS_HIGHBYTE_ONLY 0x20
#define PIT_CMD_ACCESS_LOWBYTE_HIGHBYTE 0x30
/* PIT Channel Selection: Specifies the physical timer channel to configure */
#define PIT_CMD_CHANNEL0 0x00
#define PIT_CMD_CHANNEL1 0x40
#define PIT_CMD_CHANNEL2 0x80
/* PIT Operating Mode: Defines the hardware behavior and the generated waveform */
#define PIT_MODE0_INT_ON_TERMINAL_COUNT 0x00
#define PIT_MODE1_ONESHOT 0x02
#define PIT_MODE2_RATE_GENERATOR 0x04
#define PIT_MODE3_SQUARE_WAVE_GEN 0x06
#define PIT_MODE4_SOFTWARE_STROBE 0x08
#define PIT_MODE5_HARDWARE_STROBE 0x0A
/* CMOS controller access ports */
#define CMOS_SELECT_PORT 0x70
#define CMOS_DATA_PORT 0x71
/* CMOD Select port definitions */
#define CMOS_NMI_SELECT 0x80
#define CMOS_REGISTER_SECOND 0x00
#define CMOS_REGISTER_MINUTE 0x02
#define CMOS_REGISTER_HOUR 0x04
#define CMOS_REGISTER_WEEKDAY 0x06
#define CMOS_REGISTER_DAY 0x07
#define CMOS_REGISTER_MONTH 0x08
#define CMOS_REGISTER_YEAR 0x09
#define CMOS_REGISTER_A 0x0A
#define CMOS_REGISTER_B 0x0B
#define CMOS_REGISTER_C 0x0C
/* CMOS Register A definitions */
#define CMOS_REGISTER_A_RATE_MASK 0x0F
#define CMOS_REGISTER_A_UPDATE_IN_PROGRESS 0x80
/* CMOS Register B definitions */
#define CMOS_REGISTER_B_24_HOUR 0x02
#define CMOS_REGISTER_B_BINARY 0x04
#define CMOS_REGISTER_B_PERIODIC 0x40
#define CMOS_REGISTER_B_SET_CLOCK 0x80
/* CMOS Register C definitions */
#define CMOS_REGISTER_C_PERIODIC 0x40
#define CMOS_REGISTER_C_INTERRUPT 0x80
/* CMOS RTC 24-hour mode */
#define CMOS_RTC_POST_MERIDIEM 0x80
/* Serial ports information */ /* Serial ports information */
#define COMPORT_ADDRESS {0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8} #define COMPORT_ADDRESS {0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}
#define COMPORT_COUNT 8 #define COMPORT_COUNT 8
@@ -180,17 +76,6 @@
/* Initial stall factor */ /* Initial stall factor */
#define INITIAL_STALL_FACTOR 100 #define INITIAL_STALL_FACTOR 100
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* APIC destination mode enumeration list */
typedef enum _APIC_DEST_MODE
{
APIC_DM_Physical,
APIC_DM_Logical
} APIC_DEST_MODE, *PAPIC_DEST_MODE;
/* APIC delivery mode enumeration list */ /* APIC delivery mode enumeration list */
typedef enum _APIC_DM typedef enum _APIC_DM
{ {
@@ -248,7 +133,6 @@ typedef enum _APIC_REGISTER
APIC_TICR = 0x38, /* Initial Count Register for Timer */ APIC_TICR = 0x38, /* Initial Count Register for Timer */
APIC_TCCR = 0x39, /* Current Count Register for Timer */ APIC_TCCR = 0x39, /* Current Count Register for Timer */
APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */ APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */
APIC_SIPI = 0x3F, /* Self-IPI Register */
APIC_EAFR = 0x40, /* extended APIC Feature register */ APIC_EAFR = 0x40, /* extended APIC Feature register */
APIC_EACR = 0x41, /* Extended APIC Control Register */ APIC_EACR = 0x41, /* Extended APIC Control Register */
APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */ APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */
@@ -258,19 +142,6 @@ typedef enum _APIC_REGISTER
APIC_EXT3LVTR = 0x53 /* Extended Interrupt 3 Local Vector Table */ APIC_EXT3LVTR = 0x53 /* Extended Interrupt 3 Local Vector Table */
} APIC_REGISTER, *PAPIC_REGISTER; } APIC_REGISTER, *PAPIC_REGISTER;
/* APIC Timer Divide enumeration list */
typedef enum _APIC_TIMER_DIVISOR
{
TIMER_DivideBy2 = 0,
TIMER_DivideBy4 = 1,
TIMER_DivideBy8 = 2,
TIMER_DivideBy16 = 3,
TIMER_DivideBy32 = 8,
TIMER_DivideBy64 = 9,
TIMER_DivideBy128 = 10,
TIMER_DivideBy1 = 11,
} APIC_TIMER_DIVISOR, *PAPIC_TIMER_DIVISOR;
/* I8259 PIC interrupt mode enumeration list */ /* I8259 PIC interrupt mode enumeration list */
typedef enum _PIC_I8259_ICW1_INTERRUPT_MODE typedef enum _PIC_I8259_ICW1_INTERRUPT_MODE
{ {
@@ -388,40 +259,6 @@ typedef union _APIC_SPURIOUS_REGISTER
}; };
} APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER; } APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
/* I/O APIC Controller information */
typedef struct _IOAPIC_DATA
{
ULONG GsiBase;
ULONG Identifier;
ULONG LineCount;
PHYSICAL_ADDRESS PhysicalAddress;
ULONG_PTR VirtualAddress;
} IOAPIC_DATA, *PIOAPIC_DATA;
/* I/O APIC Redirection Register */
typedef union _IOAPIC_REDIRECTION_REGISTER
{
ULONGLONG LongLong;
struct
{
UINT Base;
UINT Extended;
};
struct
{
ULONGLONG Vector:8;
ULONGLONG DeliveryMode:3;
ULONGLONG DestinationMode:1;
ULONGLONG DeliveryStatus:1;
ULONGLONG PinPolarity:1;
ULONGLONG RemoteIRR:1;
ULONGLONG TriggerMode:1;
ULONGLONG Mask:1;
ULONGLONG Reserved:39;
ULONGLONG Destination:8;
};
} IOAPIC_REDIRECTION_REGISTER, *PIOAPIC_REDIRECTION_REGISTER;
/* I8259 PIC register structure */ /* I8259 PIC register structure */
typedef union _PIC_I8259_ICW1 typedef union _PIC_I8259_ICW1
{ {
@@ -487,39 +324,4 @@ typedef union _PIC_I8259_ICW4
UCHAR Bits; UCHAR Bits;
} PIC_I8259_ICW4, *PPIC_I8259_ICW4; } PIC_I8259_ICW4, *PPIC_I8259_ICW4;
/* HPET Registers structure definition */
typedef struct _HPET_REGISTERS
{
VOLATILE ULONGLONG GeneralCapabilities;
VOLATILE ULONGLONG Reserved0;
VOLATILE ULONGLONG GeneralConfiguration;
VOLATILE ULONGLONG Reserved1;
VOLATILE ULONGLONG GeneralInterruptStatus;
VOLATILE ULONGLONG Reserved2;
VOLATILE ULONGLONG Reserved3[2][12];
VOLATILE ULONGLONG MainCounterValue;
VOLATILE ULONGLONG Reserved4;
struct
{
VOLATILE ULONGLONG Configuration;
VOLATILE ULONGLONG Comparator;
VOLATILE ULONGLONG FsbInterruptRoute;
VOLATILE ULONGLONG Reserved;
} Timers[];
} HPET_REGISTERS, *PHPET_REGISTERS;
/* Timer Capabilities */
typedef struct _TIMER_CAPABILITIES
{
BOOLEAN Arat;
BOOLEAN Art;
BOOLEAN InvariantTsc;
BOOLEAN RDTSCP;
ULONG TimerFrequency;
BOOLEAN TscDeadline;
ULONG TscDenominator;
ULONG TscNumerator;
} TIMER_CAPABILITIES, *PTIMER_CAPABILITIES;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_HLTYPES_H */ #endif /* __XTDK_I686_HLTYPES_H */

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@@ -50,7 +50,7 @@
#define KGDT_DESCRIPTOR_CODE 0x08 #define KGDT_DESCRIPTOR_CODE 0x08
/* GDT descriptor type codes */ /* GDT descriptor type codes */
#define KGDT_TYPE_NONE 0x00 #define KGDT_TYPE_NONE 0x0
#define KGDT_TYPE_CODE (0x10 | KGDT_DESCRIPTOR_CODE | KGDT_DESCRIPTOR_EXECUTE_READ) #define KGDT_TYPE_CODE (0x10 | KGDT_DESCRIPTOR_CODE | KGDT_DESCRIPTOR_EXECUTE_READ)
#define KGDT_TYPE_DATA (0x10 | KGDT_DESCRIPTOR_READ_WRITE) #define KGDT_TYPE_DATA (0x10 | KGDT_DESCRIPTOR_READ_WRITE)
@@ -58,6 +58,12 @@
#define KIDT_ACCESS_RING0 0x00 #define KIDT_ACCESS_RING0 0x00
#define KIDT_ACCESS_RING3 0x60 #define KIDT_ACCESS_RING3 0x60
/* IDT gate types */
#define KIDT_TASK 0x05
#define KIDT_CALL 0x0C
#define KIDT_INTERRUPT 0x0E
#define KIDT_TRAP 0x0F
/* TSS Offsets */ /* TSS Offsets */
#define KTSS_ESP0 0x04 #define KTSS_ESP0 0x04
#define KTSS_CR3 0x1C #define KTSS_CR3 0x1C
@@ -82,7 +88,6 @@
#define KTSS_IO_MAPS 0x68 #define KTSS_IO_MAPS 0x68
/* I686 Segment Types */ /* I686 Segment Types */
#define I686_LDT 0x2
#define I686_TASK_GATE 0x5 #define I686_TASK_GATE 0x5
#define I686_TSS 0x9 #define I686_TSS 0x9
#define I686_ACTIVE_TSS 0xB #define I686_ACTIVE_TSS 0xB
@@ -129,9 +134,11 @@
/* Static Kernel-Mode address start */ /* Static Kernel-Mode address start */
#define KSEG0_BASE 0x80000000 #define KSEG0_BASE 0x80000000
/* XTOS Kernel address base */
#define KSEG0_KERNEL_BASE 0x01800000
/* XTOS Kernel stack size */ /* XTOS Kernel stack size */
#define KERNEL_STACK_SIZE 0x4000 #define KERNEL_STACK_SIZE 0x4000
#define KERNEL_STACKS 3
/* XTOS Kernel stack guard pages */ /* XTOS Kernel stack guard pages */
#define KERNEL_STACK_GUARD_PAGES 1 #define KERNEL_STACK_GUARD_PAGES 1
@@ -159,10 +166,6 @@
#define NPX_STATE_LOADED 0x0 #define NPX_STATE_LOADED 0x0
#define NPX_STATE_UNLOADED 0xA #define NPX_STATE_UNLOADED 0xA
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Floating point state storing structure */ /* Floating point state storing structure */
typedef struct _FN_SAVE_FORMAT typedef struct _FN_SAVE_FORMAT
{ {
@@ -281,18 +284,7 @@ typedef struct _KIDTENTRY
{ {
USHORT Offset; USHORT Offset;
USHORT Selector; USHORT Selector;
union
{
struct
{
UCHAR Reserved;
UCHAR Type:4;
UCHAR Flag:1;
UCHAR Dpl:2;
UCHAR Present:1;
};
USHORT Access; USHORT Access;
};
USHORT ExtendedOffset; USHORT ExtendedOffset;
} KIDTENTRY, *PKIDTENTRY; } KIDTENTRY, *PKIDTENTRY;
@@ -478,7 +470,6 @@ typedef struct _KPROCESSOR_BLOCK
KAFFINITY SetMember; KAFFINITY SetMember;
ULONG StallScaleFactor; ULONG StallScaleFactor;
UCHAR CpuNumber; UCHAR CpuNumber;
PINTERRUPT_HANDLER InterruptDispatchTable[256];
} KPROCESSOR_BLOCK, *PKPROCESSOR_BLOCK; } KPROCESSOR_BLOCK, *PKPROCESSOR_BLOCK;
/* Thread Environment Block (TEB) structure definition */ /* Thread Environment Block (TEB) structure definition */
@@ -487,5 +478,4 @@ typedef struct _THREAD_ENVIRONMENT_BLOCK
THREAD_INFORMATION_BLOCK InformationBlock; THREAD_INFORMATION_BLOCK InformationBlock;
} THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK; } THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_KETYPES_H */ #endif /* __XTDK_I686_KETYPES_H */

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@@ -35,58 +35,9 @@
#define MM_PTE_LEGACY_SHIFT 2 #define MM_PTE_LEGACY_SHIFT 2
#define MM_PDI_LEGACY_SHIFT 22 #define MM_PDI_LEGACY_SHIFT 22
/* PTE state flags */
#define MM_PTE_VALID 0x00000001
#define MM_PTE_ACCESSED 0x00000020
#define MM_PTE_DIRTY 0x00000040
/* PTE scope flags */
#define MM_PTE_LARGE_PAGE 0x00000080
#define MM_PTE_GLOBAL 0x00000100
/* PTE access flags */
#define MM_PTE_NOACCESS 0x00000000
#define MM_PTE_READONLY 0x00000000
#define MM_PTE_EXECUTE 0x00000000
#define MM_PTE_EXECUTE_READ 0x00000000
#define MM_PTE_READWRITE 0x00000002
#define MM_PTE_WRITECOPY 0x00000200
#define MM_PTE_EXECUTE_READWRITE 0x00000002
#define MM_PTE_EXECUTE_WRITECOPY 0x00000200
/* PTE protection flags */
#define MM_PTE_NOEXECUTE 0x00000000
#define MM_PTE_GUARDED 0x00000018
#define MM_PTE_PROTECT 0x00000612
/* PTE cache flags */
#define MM_PTE_CACHE_ENABLE 0x00000000
#define MM_PTE_CACHE_DISABLE 0x00000010
#define MM_PTE_CACHE_WRITECOMBINED 0x00000010
#define MM_PTE_CACHE_WRITETHROUGH 0x00000008
/* PTE software flags */
#define MM_PTE_COPY_ON_WRITE 0x00000200
#define MM_PTE_PROTOTYPE 0x00000400
#define MM_PTE_TRANSITION 0x00000800
/* PTE frame bits */
#define MM_PTE_FRAME_BITS 25
/* PTE protection bits */
#define MM_PTE_PROTECTION_BITS 5
/* Base address of the system page table */
#define MM_SYSTEM_PTE_BASE NULLPTR
/* Minimum number of physical pages needed by the system */ /* Minimum number of physical pages needed by the system */
#define MM_MINIMUM_PHYSICAL_PAGES 1100 #define MM_MINIMUM_PHYSICAL_PAGES 1100
/* Number of system PTEs */
#define MM_MINIMUM_NUMBER_SYSTEM_PTES 7000
#define MM_DEFAULT_NUMBER_SYSTEM_PTES 11000
#define MM_MAXIMUM_NUMBER_SYSTEM_PTES 22000
/* Default number of secondary colors */ /* Default number of secondary colors */
#define MM_DEFAULT_SECONDARY_COLORS 64 #define MM_DEFAULT_SECONDARY_COLORS 64
@@ -99,31 +50,12 @@
/* HAL memory pool virtual address start */ /* HAL memory pool virtual address start */
#define MM_HARDWARE_VA_START 0xFFC00000 #define MM_HARDWARE_VA_START 0xFFC00000
/* Kernel shared data address */
#define MM_KERNEL_SHARED_DATA_ADDRESS 0xFFDF0000
/* Maximum physical address used by HAL allocations */ /* Maximum physical address used by HAL allocations */
#define MM_MAXIMUM_PHYSICAL_ADDRESS 0xFFFFFFFF #define MM_MAXIMUM_PHYSICAL_ADDRESS 0xFFFFFFFF
/* Highest system address */
#define MM_HIGHEST_SYSTEM_ADDRESS 0xFFFFFFFF
/* Trampoline code address */ /* Trampoline code address */
#define MM_TRAMPOLINE_ADDRESS 0x80000 #define MM_TRAMPOLINE_ADDRESS 0x80000
/* Pool block size */
#define MM_POOL_BLOCK_SIZE 8
/* Number of pool lists per page */
#define MM_POOL_LISTS_PER_PAGE (MM_PAGE_SIZE / MM_POOL_BLOCK_SIZE)
/* Number of pool tracking tables */
#define MM_POOL_TRACKING_TABLES 32
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Page size enumeration list */ /* Page size enumeration list */
typedef enum _PAGE_SIZE typedef enum _PAGE_SIZE
{ {
@@ -174,6 +106,7 @@ typedef struct _HARDWARE_MODERN_PTE
/* Generic Page Table entry union to abstract PML2 and PML3 formats */ /* Generic Page Table entry union to abstract PML2 and PML3 formats */
typedef union _HARDWARE_PTE typedef union _HARDWARE_PTE
{ {
ULONGLONG Long;
HARDWARE_LEGACY_PTE Pml2; HARDWARE_LEGACY_PTE Pml2;
HARDWARE_MODERN_PTE Pml3; HARDWARE_MODERN_PTE Pml3;
} HARDWARE_PTE, *PHARDWARE_PTE; } HARDWARE_PTE, *PHARDWARE_PTE;
@@ -268,12 +201,12 @@ typedef struct _MMPML2_PTE_TRANSITION
typedef union _MMPML2_PTE typedef union _MMPML2_PTE
{ {
ULONG Long; ULONG Long;
HARDWARE_LEGACY_PTE Flush; HARDWARE_PTE Flush;
MMPML2_PTE_HARDWARE Hardware; MMPML2_PTE_HARDWARE Hard;
MMPML2_PTE_PROTOTYPE Prototype; MMPML2_PTE_PROTOTYPE Proto;
MMPML2_PTE_SOFTWARE Software; MMPML2_PTE_SOFTWARE Soft;
MMPML2_PTE_TRANSITION Transition; MMPML2_PTE_TRANSITION Trans;
MMPML2_PTE_SUBSECTION Subsection; MMPML2_PTE_SUBSECTION Subsect;
MMPML2_PTE_LIST List; MMPML2_PTE_LIST List;
} MMPML2_PTE, *PMMPML2_PTE; } MMPML2_PTE, *PMMPML2_PTE;
@@ -363,7 +296,7 @@ typedef struct _MMPML3_PTE_TRANSITION
typedef union _MMPML3_PTE typedef union _MMPML3_PTE
{ {
ULONGLONG Long; ULONGLONG Long;
HARDWARE_MODERN_PTE Flush; HARDWARE_PTE Flush;
MMPML3_PTE_HARDWARE Hardware; MMPML3_PTE_HARDWARE Hardware;
MMPML3_PTE_PROTOTYPE Prototype; MMPML3_PTE_PROTOTYPE Prototype;
MMPML3_PTE_SOFTWARE Software; MMPML3_PTE_SOFTWARE Software;
@@ -375,6 +308,7 @@ typedef union _MMPML3_PTE
/* Generic Page Table Entry union to abstract PML2 and PML3 formats */ /* Generic Page Table Entry union to abstract PML2 and PML3 formats */
typedef union _MMPTE typedef union _MMPTE
{ {
ULONGLONG Long;
MMPML2_PTE Pml2; MMPML2_PTE Pml2;
MMPML3_PTE Pml3; MMPML3_PTE Pml3;
} MMPTE, *PMMPTE; } MMPTE, *PMMPTE;
@@ -405,7 +339,6 @@ typedef struct _MMPFN
USHORT ReferenceCount; USHORT ReferenceCount;
} e2; } e2;
} u3; } u3;
ULONG UsedPageTableEntries;
union union
{ {
MMPTE OriginalPte; MMPTE OriginalPte;
@@ -416,33 +349,15 @@ typedef struct _MMPFN
ULONG_PTR EntireFrame; ULONG_PTR EntireFrame;
struct struct
{ {
ULONG_PTR PteFrame:25; ULONG_PTR PteFrame:26;
ULONG_PTR InPageError:1; ULONG_PTR InPageError:1;
ULONG_PTR VerifierAllocation:1; ULONG_PTR VerifierAllocation:1;
ULONG_PTR AweAllocation:1; ULONG_PTR AweAllocation:1;
ULONG_PTR Priority:3; ULONG_PTR LockCharged:1;
ULONG_PTR KernelStack:1;
ULONG_PTR MustBeCached:1; ULONG_PTR MustBeCached:1;
}; };
} u4; } u4;
} MMPFN, *PMMPFN; } MMPFN, *PMMPFN;
/* Pool descriptor structure definition */
typedef struct _POOL_DESCRIPTOR
{
LIST_ENTRY ListHeads[MM_POOL_LISTS_PER_PAGE];
PVOID LockAddress;
ULONG PoolIndex;
LONG PendingFreeDepth;
PVOID PendingFrees;
MMPOOL_TYPE PoolType;
ULONG RunningFrees;
ULONG RunningAllocations;
ULONG Threshold;
ULONG TotalPages;
ULONG TotalBigAllocations;
SIZE_T TotalBytes;
SIZE_T Reserved;
} POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_MMTYPES_H */ #endif /* __XTDK_I686_MMTYPES_H */

View File

@@ -12,20 +12,13 @@
#include <xtdefs.h> #include <xtdefs.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Architecture-specific enumeration lists forward references */ /* Architecture-specific enumeration lists forward references */
typedef enum _APIC_DEST_MODE APIC_DEST_MODE, *PAPIC_DEST_MODE;
typedef enum _APIC_DM APIC_DM, *PAPIC_DM; typedef enum _APIC_DM APIC_DM, *PAPIC_DM;
typedef enum _APIC_DSH APIC_DSH, *PAPIC_DSH; typedef enum _APIC_DSH APIC_DSH, *PAPIC_DSH;
typedef enum _APIC_MODE APIC_MODE, *PAPIC_MODE; typedef enum _APIC_MODE APIC_MODE, *PAPIC_MODE;
typedef enum _APIC_REGISTER APIC_REGISTER, *PAPIC_REGISTER; typedef enum _APIC_REGISTER APIC_REGISTER, *PAPIC_REGISTER;
typedef enum _APIC_TIMER_DIVISOR APIC_TIMER_DIVISOR, *PAPIC_TIMER_DIVISOR;
typedef enum _CPU_VENDOR CPU_VENDOR, *PCPU_VENDOR; typedef enum _CPU_VENDOR CPU_VENDOR, *PCPU_VENDOR;
typedef enum _CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT, *PCPUID_FEATURES_ADVANCED_POWER_MANAGEMENT;
typedef enum _CPUID_FEATURES_EXTENDED CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED; typedef enum _CPUID_FEATURES_EXTENDED CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED;
typedef enum _CPUID_FEATURES_POWER_MANAGEMENT CPUID_FEATURES_POWER_MANAGEMENT, *PCPUID_FEATURES_POWER_MANAGEMENT;
typedef enum _CPUID_FEATURES_STANDARD1 CPUID_FEATURES_STANDARD1, *PCPUID_FEATURES_STANDARD1; typedef enum _CPUID_FEATURES_STANDARD1 CPUID_FEATURES_STANDARD1, *PCPUID_FEATURES_STANDARD1;
typedef enum _CPUID_FEATURES_STANDARD7_LEAF0 CPUID_FEATURES_STANDARD7_LEAF0, *PCPUID_FEATURES_STANDARD7_LEAF0; typedef enum _CPUID_FEATURES_STANDARD7_LEAF0 CPUID_FEATURES_STANDARD7_LEAF0, *PCPUID_FEATURES_STANDARD7_LEAF0;
typedef enum _CPUID_FEATURES_STANDARD7_LEAF1 CPUID_FEATURES_STANDARD7_LEAF1, *PCPUID_FEATURES_STANDARD7_LEAF1; typedef enum _CPUID_FEATURES_STANDARD7_LEAF1 CPUID_FEATURES_STANDARD7_LEAF1, *PCPUID_FEATURES_STANDARD7_LEAF1;
@@ -49,8 +42,6 @@ typedef struct _FX_SAVE_AREA FX_SAVE_AREA, *PFX_SAVE_AREA;
typedef struct _FX_SAVE_FORMAT FX_SAVE_FORMAT, *PFX_SAVE_FORMAT; typedef struct _FX_SAVE_FORMAT FX_SAVE_FORMAT, *PFX_SAVE_FORMAT;
typedef struct _HARDWARE_LEGACY_PTE HARDWARE_LEGACY_PTE, *PHARDWARE_LEGACY_PTE; typedef struct _HARDWARE_LEGACY_PTE HARDWARE_LEGACY_PTE, *PHARDWARE_LEGACY_PTE;
typedef struct _HARDWARE_MODERN_PTE HARDWARE_MODERN_PTE, *PHARDWARE_MODERN_PTE; typedef struct _HARDWARE_MODERN_PTE HARDWARE_MODERN_PTE, *PHARDWARE_MODERN_PTE;
typedef struct _HPET_REGISTERS HPET_REGISTERS, *PHPET_REGISTERS;
typedef struct _IOAPIC_DATA IOAPIC_DATA, *PIOAPIC_DATA;
typedef struct _KDESCRIPTOR KDESCRIPTOR, *PKDESCRIPTOR; typedef struct _KDESCRIPTOR KDESCRIPTOR, *PKDESCRIPTOR;
typedef struct _KEXCEPTION_FRAME KEXCEPTION_FRAME, *PKEXCEPTION_FRAME; typedef struct _KEXCEPTION_FRAME KEXCEPTION_FRAME, *PKEXCEPTION_FRAME;
typedef struct _KGDTENTRY KGDTENTRY, *PKGDTENTRY; typedef struct _KGDTENTRY KGDTENTRY, *PKGDTENTRY;
@@ -79,9 +70,7 @@ typedef struct _MMPML3_PTE_PROTOTYPE MMPML3_PTE_PROTOTYPE, *PMMPML3_PTE_PROTOTYP
typedef struct _MMPML3_PTE_SOFTWARE MMPML3_PTE_SOFTWARE, *PMMPML3_PTE_SOFTWARE; typedef struct _MMPML3_PTE_SOFTWARE MMPML3_PTE_SOFTWARE, *PMMPML3_PTE_SOFTWARE;
typedef struct _MMPML3_PTE_SUBSECTION MMPML3_PTE_SUBSECTION, *PMMPML3_PTE_SUBSECTION; typedef struct _MMPML3_PTE_SUBSECTION MMPML3_PTE_SUBSECTION, *PMMPML3_PTE_SUBSECTION;
typedef struct _MMPML3_PTE_TRANSITION MMPML3_PTE_TRANSITION, *PMMPML3_PTE_TRANSITION; typedef struct _MMPML3_PTE_TRANSITION MMPML3_PTE_TRANSITION, *PMMPML3_PTE_TRANSITION;
typedef struct _POOL_DESCRIPTOR POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
typedef struct _THREAD_ENVIRONMENT_BLOCK THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK; typedef struct _THREAD_ENVIRONMENT_BLOCK THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
typedef struct _TIMER_CAPABILITIES TIMER_CAPABILITIES, *PTIMER_CAPABILITIES;
/* Unions forward references */ /* Unions forward references */
typedef union _APIC_BASE_REGISTER APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER; typedef union _APIC_BASE_REGISTER APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER;
@@ -89,7 +78,6 @@ typedef union _APIC_COMMAND_REGISTER APIC_COMMAND_REGISTER, *PAPIC_COMMAND_REGIS
typedef union _APIC_LVT_REGISTER APIC_LVT_REGISTER, *PAPIC_LVT_REGISTER; typedef union _APIC_LVT_REGISTER APIC_LVT_REGISTER, *PAPIC_LVT_REGISTER;
typedef union _APIC_SPURIOUS_REGISTER APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER; typedef union _APIC_SPURIOUS_REGISTER APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
typedef union _HARDWARE_PTE HARDWARE_PTE, *PHARDWARE_PTE; typedef union _HARDWARE_PTE HARDWARE_PTE, *PHARDWARE_PTE;
typedef union _IOAPIC_REDIRECTION_REGISTER IOAPIC_REDIRECTION_REGISTER, *PIOAPIC_REDIRECTION_REGISTER;
typedef union _MMPML2_PTE MMPML2_PTE, *PMMPML2_PTE; typedef union _MMPML2_PTE MMPML2_PTE, *PMMPML2_PTE;
typedef union _MMPML3_PTE MMPML3_PTE, *PMMPML3_PTE; typedef union _MMPML3_PTE MMPML3_PTE, *PMMPML3_PTE;
typedef union _MMPTE MMPDE, *PMMPDE; typedef union _MMPTE MMPDE, *PMMPDE;
@@ -100,5 +88,4 @@ typedef union _PIC_I8259_ICW2 PIC_I8259_ICW2, *PPIC_I8259_ICW2;
typedef union _PIC_I8259_ICW3 PIC_I8259_ICW3, *PPIC_I8259_ICW3; typedef union _PIC_I8259_ICW3 PIC_I8259_ICW3, *PPIC_I8259_ICW3;
typedef union _PIC_I8259_ICW4 PIC_I8259_ICW4, *PPIC_I8259_ICW4; typedef union _PIC_I8259_ICW4 PIC_I8259_ICW4, *PPIC_I8259_ICW4;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_XTSTRUCT_H */ #endif /* __XTDK_I686_XTSTRUCT_H */

View File

@@ -58,10 +58,6 @@
#define PCI_STATUS_SIGNALED_SYSTEM_ERROR 0x4000 #define PCI_STATUS_SIGNALED_SYSTEM_ERROR 0x4000
#define PCI_STATUS_DETECTED_PARITY_ERROR 0x8000 #define PCI_STATUS_DETECTED_PARITY_ERROR 0x8000
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* PCI bridge control registers */ /* PCI bridge control registers */
typedef struct _PCI_BRIDGE_CONTROL_REGISTER typedef struct _PCI_BRIDGE_CONTROL_REGISTER
{ {
@@ -218,5 +214,4 @@ typedef struct _PCI_TYPE1_DEVICE
PCI_BRIDGE_CONTROL_REGISTER Bridge; PCI_BRIDGE_CONTROL_REGISTER Bridge;
} PCI_TYPE1_DEVICE, *PPCI_TYPE1_DEVICE; } PCI_TYPE1_DEVICE, *PPCI_TYPE1_DEVICE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_IOTYPES_H */ #endif /* __XTDK_IOTYPES_H */

View File

@@ -13,9 +13,6 @@
#include <xttypes.h> #include <xttypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel debugger routines forward references */ /* Kernel debugger routines forward references */
XTCLINK XTCLINK
XTCDECL XTCDECL
@@ -23,5 +20,4 @@ VOID
DbgPrint(PCWSTR Format, DbgPrint(PCWSTR Format,
...); ...);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_KDFUNCS_H */ #endif /* __XTDK_KDFUNCS_H */

View File

@@ -21,10 +21,6 @@
#define DEBUG_PROVIDER_COMPORT 0x00000001 #define DEBUG_PROVIDER_COMPORT 0x00000001
#define DEBUG_PROVIDER_FRAMEBUFFER 0x00000002 #define DEBUG_PROVIDER_FRAMEBUFFER 0x00000002
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel routine callbacks */ /* Kernel routine callbacks */
typedef XTSTATUS (XTAPI *PKD_INIT_ROUTINE)(); typedef XTSTATUS (XTAPI *PKD_INIT_ROUTINE)();
typedef VOID (*PKD_PRINT_ROUTINE)(IN PCWSTR Format, IN ...); typedef VOID (*PKD_PRINT_ROUTINE)(IN PCWSTR Format, IN ...);
@@ -46,5 +42,4 @@ typedef struct _KD_DISPATCH_TABLE
RTL_PRINT_CONTEXT PrintContext; RTL_PRINT_CONTEXT PrintContext;
} KD_DISPATCH_TABLE, *PKD_DISPATCH_TABLE; } KD_DISPATCH_TABLE, *PKD_DISPATCH_TABLE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_KDTYPES_H */ #endif /* __XTDK_KDTYPES_H */

View File

@@ -15,9 +15,6 @@
#include <ketypes.h> #include <ketypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel services routines forward references */ /* Kernel services routines forward references */
XTCLINK XTCLINK
XTFASTCALL XTFASTCALL
@@ -162,5 +159,4 @@ XTAPI
BOOLEAN BOOLEAN
KeSignalCallDpcSynchronize(IN PVOID SystemArgument); KeSignalCallDpcSynchronize(IN PVOID SystemArgument);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_KEFUNCS_H */ #endif /* __XTDK_KEFUNCS_H */

View File

@@ -49,10 +49,6 @@
#define THREAD_HIGH_PRIORITY 31 #define THREAD_HIGH_PRIORITY 31
#define THREAD_MAXIMUM_PRIORITY 32 #define THREAD_MAXIMUM_PRIORITY 32
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Adjust reason */ /* Adjust reason */
typedef enum _ADJUST_REASON typedef enum _ADJUST_REASON
{ {
@@ -137,37 +133,6 @@ typedef enum _KPROCESS_STATE
ProcessOutSwap ProcessOutSwap
} KPROCESS_STATE, *PKPROCESS_STATE; } KPROCESS_STATE, *PKPROCESS_STATE;
/* Kernel profiling sources */
typedef enum _KPROFILE_SOURCE
{
ProfileTime,
ProfileAlignmentFixup,
ProfileTotalIssues,
ProfilePipelineDry,
ProfileLoadInstructions,
ProfilePipelineFrozen,
ProfileBranchInstructions,
ProfileTotalNonissues,
ProfileDcacheMisses,
ProfileIcacheMisses,
ProfileCacheMisses,
ProfileBranchMispredictions,
ProfileStoreInstructions,
ProfileFpInstructions,
ProfileIntegerInstructions,
Profile2Issue,
Profile3Issue,
Profile4Issue,
ProfileSpecialInstructions,
ProfileTotalCycles,
ProfileIcacheIssues,
ProfileDcacheAccesses,
ProfileMemoryBarrierCycles,
ProfileLoadLinkedIssues,
ProfileXtKernel,
ProfileMaximum
} KPROFILE_SOURCE, *PKPROFILE_SOURCE;
/* Thread state */ /* Thread state */
typedef enum _KTHREAD_STATE typedef enum _KTHREAD_STATE
{ {
@@ -185,23 +150,21 @@ typedef enum _KTHREAD_STATE
typedef enum _KSPIN_LOCK_QUEUE_LEVEL typedef enum _KSPIN_LOCK_QUEUE_LEVEL
{ {
DispatcherLock, DispatcherLock,
ExpansionLock, UnusedSpareLock,
PfnLock, PfnLock,
SystemSpaceLock, SystemSpaceLock,
VacbLock, VacbLock,
MasterLock, MasterLock,
NonPagedAllocPoolLock, NonPagedPoolLock,
IoCancelLock, IoCancelLock,
WorkQueueLock, WorkQueueLock,
IoVpbLock, IoVpbLock,
IoDatabaseLock, IoDatabaseLock,
IoCompletionLock, IoCompletionLock,
FileSystemLock, FsStructLock,
AfdWorkQueueLock, AfdWorkQueueLock,
BcbLock, BcbLock,
NonPagedPoolLock, MmNonPagedPoolLock,
ReservedSystemLock,
TimerTableLock,
MaximumLock MaximumLock
} KSPIN_LOCK_QUEUE_LEVEL, *PKSPIN_LOCK_QUEUE_LEVEL; } KSPIN_LOCK_QUEUE_LEVEL, *PKSPIN_LOCK_QUEUE_LEVEL;
@@ -449,28 +412,6 @@ typedef struct _KPROCESS
UCHAR Spare; UCHAR Spare;
} KPROCESS, *PKPROCESS; } KPROCESS, *PKPROCESS;
/* System Time structure definition */
typedef struct _KSYSTEM_TIME
{
ULONG LowPart;
LONG High1Part;
LONG High2Part;
} KSYSTEM_TIME, *PKSYSTEM_TIME;
/* Kernel Shared Data (KSD) structure definition */
typedef struct _KSHARED_DATA
{
VOLATILE KSYSTEM_TIME InterruptTime;
VOLATILE KSYSTEM_TIME SystemTime;
ULONG XtMajorVersion;
ULONG XtMinorVersion;
WCHAR XtBuild[8];
WCHAR XtBuildHash[11];
WCHAR XtArchitecture[8];
WCHAR XtDate[9];
WCHAR XtFullDate[25];
} KSHARED_DATA, *PKSHARED_DATA;
/* Thread control block structure definition */ /* Thread control block structure definition */
typedef struct _KTHREAD typedef struct _KTHREAD
{ {
@@ -704,5 +645,4 @@ typedef struct _KUBSAN_TYPE_MISMATCH_DATA_V1
UCHAR TypeCheckKind; UCHAR TypeCheckKind;
} KUBSAN_TYPE_MISMATCH_DATA_V1, *PKUBSAN_TYPE_MISMATCH_DATA_V1; } KUBSAN_TYPE_MISMATCH_DATA_V1, *PKUBSAN_TYPE_MISMATCH_DATA_V1;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_KEFUNCS_H */ #endif /* __XTDK_KEFUNCS_H */

View File

@@ -38,10 +38,6 @@
#define LDR_DTE_MM_LOADED 0x40000000 #define LDR_DTE_MM_LOADED 0x40000000
#define LDR_DTE_COMPAT_DATABASE_PROCESSED 0x80000000 #define LDR_DTE_COMPAT_DATABASE_PROCESSED 0x80000000
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Loader data table entry */ /* Loader data table entry */
typedef struct _LDR_DATA_TABLE_ENTRY typedef struct _LDR_DATA_TABLE_ENTRY
{ {
@@ -74,5 +70,4 @@ typedef struct _LDR_DATA_TABLE_ENTRY
PVOID PatchInformation; PVOID PatchInformation;
} LDR_DATA_TABLE_ENTRY, *PLDR_DATA_TABLE_ENTRY; } LDR_DATA_TABLE_ENTRY, *PLDR_DATA_TABLE_ENTRY;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_LDRTYPES_H */ #endif /* __XTDK_LDRTYPES_H */

View File

@@ -1,44 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtdk/mmfuncs.h
* DESCRIPTION: XTOS memory manager routine definitions
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTDK_MMFUNCS_H
#define __XTDK_MMFUNCS_H
#include <xtdefs.h>
#include <xtstruct.h>
#include <xttypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Memory manager routines forward references */
XTAPI
XTSTATUS
MmAllocatePool(IN MMPOOL_TYPE PoolType,
IN SIZE_T Bytes,
OUT PVOID *Memory);
XTAPI
XTSTATUS
MmAllocatePoolWithTag(IN MMPOOL_TYPE PoolType,
IN SIZE_T Bytes,
OUT PVOID *Memory,
IN ULONG Tag);
XTAPI
XTSTATUS
MmFreePool(IN PVOID VirtualAddress);
XTAPI
XTSTATUS
MmFreePoolWithTag(IN PVOID VirtualAddress,
IN ULONG Tag);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_MMFUNCS_H */

View File

@@ -4,7 +4,6 @@
* FILE: sdk/xtdk/mmtypes.h * FILE: sdk/xtdk/mmtypes.h
* DESCRIPTION: Memory management data structures * DESCRIPTION: Memory management data structures
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org> * DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <harraiken91@gmail.com>
*/ */
#ifndef __XTDK_MMTYPES_H #ifndef __XTDK_MMTYPES_H
@@ -14,99 +13,6 @@
#include ARCH_HEADER(xtstruct.h) #include ARCH_HEADER(xtstruct.h)
/* Number of hyper space pages */
#define MM_HYPERSPACE_PAGE_COUNT 255
/* Number of free page list heads */
#define MM_MAX_FREE_PAGE_LIST_HEADS 4
/* Number of paging colors */
#define MM_PAGING_COLORS 64
/* PTE frame mask definition */
#define MM_PFN_PTE_FRAME (((ULONG_PTR)1 << MM_PTE_FRAME_BITS) - 1)
/* Memory manager pool type mask definition */
#define MM_POOL_TYPE_MASK 1
/* Bad pool caller reasons */
#define MM_POOL_INVALID_ALLOC_RUNLEVEL 8
#define MM_POOL_INVALID_FREE_RUNLEVEL 9
/* Pool flags */
#define MM_POOL_BIG_ALLOCATIONS_ENTRY_FREE 0x1
#define MM_POOL_PROTECTED 0x80000000
#define MM_POOL_RAISE_EXCEPTION 0x10
/* Number of reserved zeroed PTEs */
#define MM_RESERVED_ZERO_PTES 32
/* Memory Manager Protection Bits */
#define MM_ZERO_ACCESS 0
#define MM_READONLY 1
#define MM_EXECUTE 2
#define MM_EXECUTE_READ 3
#define MM_READWRITE 4
#define MM_WRITECOPY 5
#define MM_EXECUTE_READWRITE 6
#define MM_EXECUTE_WRITECOPY 7
#define MM_PROTECT_ACCESS 7
/* Protection field shift */
#define MM_PROTECT_FIELD_SHIFT 5
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Memory manager page lists */
typedef enum _MMPAGELISTS
{
ZeroedPageList = 0,
FreePageList = 1,
StandbyPageList = 2,
ModifiedPageList = 3,
ModifiedReadOnlyPageList = 4,
BadPageList = 5,
ActiveAndValid = 6,
TransitionPage = 7
} MMPAGELISTS, *PMMPAGELISTS;
/* Page cache attributes */
typedef enum _MMPFN_CACHE_ATTRIBUTE
{
PfnNonCached,
PfnCached,
PfnWriteCombined,
PfnNotMapped
} MMPFN_CACHE_ATTRIBUTE, *PMMPFN_CACHE_ATTRIBUTE;
/* Memory Manager pool types */
typedef enum _MMPOOL_TYPE
{
NonPagedPool = 0,
PagedPool = 1,
NonPagedPoolMustSucceed = 2,
NonPagedPoolCacheAligned = 4,
PagedPoolCacheAligned = 5,
NonPagedPoolCacheAlignedMustSucceed = 6,
MaxPoolType = 7,
NonPagedPoolSession = 32,
PagedPoolSession = 33,
NonPagedPoolMustSucceedSession = 34,
NonPagedPoolCacheAlignedSession = 36,
PagedPoolCacheAlignedSession = 37,
NonPagedPoolCacheAlignedMustSucceedSession = 38
} MMPOOL_TYPE, *PMMPOOL_TYPE;
/* Page table pool types */
typedef enum _MMSYSTEM_PTE_POOL_TYPE
{
SystemPteSpace,
NonPagedPoolExpansion,
MaximumPtePoolTypes
} MMSYSTEM_PTE_POOL_TYPE, *PMMSYSTEM_PTE_POOL_TYPE;
/* Page map routines structure definition */ /* Page map routines structure definition */
typedef CONST STRUCT _CMMPAGEMAP_ROUTINES typedef CONST STRUCT _CMMPAGEMAP_ROUTINES
{ {
@@ -124,58 +30,6 @@ typedef struct _MMCOLOR_TABLES
ULONG_PTR Count; ULONG_PTR Count;
} MMCOLOR_TABLES, *PMMCOLOR_TABLES; } MMCOLOR_TABLES, *PMMCOLOR_TABLES;
/* Free pool entry structure definition */
typedef struct _MMFREE_POOL_ENTRY
{
LIST_ENTRY List;
PFN_COUNT Size;
PMMFREE_POOL_ENTRY Owner;
} MMFREE_POOL_ENTRY, *PMMFREE_POOL_ENTRY;
/* Memory layout structure definition */
typedef struct _MMMEMORY_LAYOUT
{
PMMPFN PfnDatabase;
PFN_NUMBER PfnDatabaseSize;
PVOID SelfMapAddress;
PVOID HardwarePoolStart;
PVOID HardwarePoolEnd;
PVOID HyperSpaceStart;
PVOID HyperSpaceEnd;
PVOID LoaderMappingsStart;
PVOID LoaderMappingsEnd;
PFN_NUMBER LoaderMappingsSize;
PVOID NonCanonicalStart;
PVOID NonCanonicalEnd;
PVOID NonPagedPoolStart;
PVOID NonPagedPoolEnd;
PFN_NUMBER NonPagedPoolSize;
PVOID NonPagedExpansionPoolStart;
PVOID NonPagedExpansionPoolEnd;
PFN_NUMBER NonPagedExpansionPoolSize;
PVOID NonPagedSystemPoolStart;
PVOID NonPagedSystemPoolEnd;
PFN_NUMBER NonPagedSystemPoolSize;
PVOID PagedPoolStart;
PVOID PagedPoolEnd;
PFN_NUMBER PagedPoolSize;
PVOID ReservedSystemPoolStart;
PVOID ReservedSystemPoolEnd;
PVOID SessionSpaceStart;
PVOID SessionSpaceEnd;
PFN_NUMBER SessionSpaceSize;
PVOID SharedSystemPageStart;
PVOID SharedSystemPageEnd;
PVOID SystemCacheStart;
PVOID SystemCacheEnd;
PVOID SystemWorkingSetStart;
PVOID SystemWorkingSetEnd;
PVOID UserSpaceStart;
PVOID UserSpaceEnd;
PVOID PteSpaceStart;
PVOID PteSpaceEnd;
} MMMEMORY_LAYOUT, *PMMMEMORY_LAYOUT;
/* Page Frame Entry structure definition */ /* Page Frame Entry structure definition */
typedef struct _MMPFNENTRY typedef struct _MMPFNENTRY
{ {
@@ -191,76 +45,4 @@ typedef struct _MMPFNENTRY
USHORT ParityError:1; USHORT ParityError:1;
} MMPFNENTRY, *PMMPFNENTRY; } MMPFNENTRY, *PMMPFNENTRY;
/* Page Frame List structure definition */
typedef struct _MMPFNLIST
{
PFN_NUMBER Total;
MMPAGELISTS ListName;
PFN_NUMBER Flink;
PFN_NUMBER Blink;
} MMPFNLIST, *PMMPFNLIST;
/* Physical memory run structure definition */
typedef struct _PHYSICAL_MEMORY_RUN
{
PFN_NUMBER BasePage;
PFN_NUMBER PageCount;
} PHYSICAL_MEMORY_RUN, *PPHYSICAL_MEMORY_RUN;
/* Physical memory descriptor structure definition */
typedef struct _PHYSICAL_MEMORY_DESCRIPTOR
{
ULONG NumberOfRuns;
PFN_NUMBER NumberOfPages;
PHYSICAL_MEMORY_RUN Run[1];
} PHYSICAL_MEMORY_DESCRIPTOR, *PPHYSICAL_MEMORY_DESCRIPTOR;
/* Pool header structure definition */
typedef struct _POOL_HEADER
{
union
{
struct
{
USHORT PreviousSize:9;
USHORT PoolIndex:7;
USHORT BlockSize:9;
USHORT PoolType:7;
};
ULONG Long;
};
union
{
ULONG PoolTag;
PEPROCESS ProcessBilled;
struct
{
USHORT AllocatorBackTraceIndex;
USHORT PoolTagHash;
};
};
} POOL_HEADER, *PPOOL_HEADER;
/* Pool descriptor structure definition */
typedef struct _POOL_TRACKING_BIG_ALLOCATIONS
{
ULONG NumberOfPages;
PVOID QuotaObject;
ULONG Tag;
PVOID VirtualAddress;
} POOL_TRACKING_BIG_ALLOCATIONS, *PPOOL_TRACKING_BIG_ALLOCATIONS;
/* Pool tracking table structure definition */
typedef struct _POOL_TRACKING_TABLE
{
LONG NonPagedAllocations;
SIZE_T NonPagedBytes;
LONG NonPagedFrees;
LONG PagedAllocations;
SIZE_T PagedBytes;
LONG PagedFrees;
ULONG Tag;
} POOL_TRACKING_TABLE, *PPOOL_TRACKING_TABLE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_MMTYPES_H */ #endif /* __XTDK_MMTYPES_H */

View File

@@ -14,9 +14,6 @@
#include <ketypes.h> #include <ketypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Power Manager routine callbacks */ /* Power Manager routine callbacks */
typedef VOID (XTFASTCALL *PPROCESSOR_IDLE_FUNCTION)(IN PPROCESSOR_POWER_STATE PowerState); typedef VOID (XTFASTCALL *PPROCESSOR_IDLE_FUNCTION)(IN PPROCESSOR_POWER_STATE PowerState);
typedef XTSTATUS (XTFASTCALL *PSET_PROCESSOR_THROTTLE)(IN UCHAR Throttle); typedef XTSTATUS (XTFASTCALL *PSET_PROCESSOR_THROTTLE)(IN UCHAR Throttle);
@@ -91,5 +88,4 @@ typedef struct _PROCESSOR_POWER_STATE
ULONG LastC3UserTime; ULONG LastC3UserTime;
} PROCESSOR_POWER_STATE, *PPROCESSOR_POWER_STATE; } PROCESSOR_POWER_STATE, *PPROCESSOR_POWER_STATE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_POTYPES_H */ #endif /* __XTDK_POTYPES_H */

View File

@@ -13,9 +13,6 @@
#include <ketypes.h> #include <ketypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel's representation of a process object */ /* Kernel's representation of a process object */
typedef struct _EPROCESS typedef struct _EPROCESS
{ {
@@ -30,5 +27,4 @@ typedef struct _ETHREAD
UINT Reserved0; UINT Reserved0;
} ETHREAD, *PETHREAD; } ETHREAD, *PETHREAD;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_PSTYPES_H */ #endif /* __XTDK_PSTYPES_H */

View File

@@ -15,9 +15,6 @@
#include <rtltypes.h> #include <rtltypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Runtime Library routines forward references */ /* Runtime Library routines forward references */
XTCLINK XTCLINK
XTAPI XTAPI
@@ -297,18 +294,6 @@ BOOLEAN
RtlTestBit(IN PRTL_BITMAP BitMap, RtlTestBit(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Bit); IN ULONG_PTR Bit);
XTCLINK
XTAPI
XTSTATUS
RtlTimeFieldsToUnixEpoch(IN PTIME_FIELDS TimeFields,
OUT PLONGLONG UnixTime);
XTCLINK
XTAPI
XTSTATUS
RtlTimeFieldsToXtEpoch(IN PTIME_FIELDS TimeFields,
OUT PLARGE_INTEGER XtTime);
XTCLINK XTCLINK
XTAPI XTAPI
PCHAR PCHAR
@@ -385,5 +370,4 @@ VOID
RtlZeroMemory(OUT PVOID Destination, RtlZeroMemory(OUT PVOID Destination,
IN SIZE_T Length); IN SIZE_T Length);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_RTLFUNCS_H */ #endif /* __XTDK_RTLFUNCS_H */

View File

@@ -49,21 +49,6 @@
#define PFL_DIGIT_PRECISION 0x00002000 #define PFL_DIGIT_PRECISION 0x00002000
#define PFL_THOUSANDS_GROUPING 0x00004000 #define PFL_THOUSANDS_GROUPING 0x00004000
/* Cryptographic related definitions */
#define SHA1_BLOCK_SIZE 64
#define SHA1_DIGEST_SIZE 20
/* Time related definitions */
#define TIME_SECONDS_PER_MINUTE 60ULL
#define TIME_SECONDS_PER_HOUR 3600ULL
#define TIME_SECONDS_PER_DAY 86400ULL
#define TIME_TICKS_PER_SECOND 10000000ULL
#define TIME_TICKS_PER_MILLISECOND 10000ULL
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Runtime Library routine callbacks */ /* Runtime Library routine callbacks */
typedef XTSTATUS (*PWRITE_CHARACTER)(IN CHAR Character); typedef XTSTATUS (*PWRITE_CHARACTER)(IN CHAR Character);
typedef XTSTATUS (*PWRITE_WIDE_CHARACTER)(IN WCHAR Character); typedef XTSTATUS (*PWRITE_WIDE_CHARACTER)(IN WCHAR Character);
@@ -110,26 +95,4 @@ typedef struct _RTL_PRINT_FORMAT_PROPERTIES
LONG Flags; LONG Flags;
} RTL_PRINT_FORMAT_PROPERTIES, *PRTL_PRINT_FORMAT_PROPERTIES; } RTL_PRINT_FORMAT_PROPERTIES, *PRTL_PRINT_FORMAT_PROPERTIES;
/* Runtime Library SHA-1 context structure definition */
typedef struct _RTL_SHA1_CONTEXT
{
ULONG State[5];
ULONG Count[2];
UCHAR Buffer[SHA1_BLOCK_SIZE];
} RTL_SHA1_CONTEXT, *PRTL_SHA1_CONTEXT;
/* Runtime time fields structure definition */
typedef struct _TIME_FIELDS
{
SHORT Year;
SHORT Month;
SHORT Day;
SHORT Hour;
SHORT Minute;
SHORT Second;
SHORT Milliseconds;
SHORT Weekday;
} TIME_FIELDS, *PTIME_FIELDS;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_RTLTYPES_H */ #endif /* __XTDK_RTLTYPES_H */

View File

@@ -14,9 +14,6 @@
#include <xttypes.h> #include <xttypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel affinity */ /* Kernel affinity */
typedef ULONG_PTR KAFFINITY, *PKAFFINITY; typedef ULONG_PTR KAFFINITY, *PKAFFINITY;
@@ -32,9 +29,6 @@ typedef UCHAR KRUNLEVEL, *PKRUNLEVEL;
/* Spin locks synchronization mechanism */ /* Spin locks synchronization mechanism */
typedef ULONG_PTR KSPIN_LOCK, *PKSPIN_LOCK; typedef ULONG_PTR KSPIN_LOCK, *PKSPIN_LOCK;
/* Page Frame Number count */
typedef ULONG PFN_COUNT;
/* Page Frame Number */ /* Page Frame Number */
typedef ULONG_PTR PFN_NUMBER, *PPFN_NUMBER; typedef ULONG_PTR PFN_NUMBER, *PPFN_NUMBER;
@@ -111,5 +105,4 @@ typedef struct _DISPATCHER_HEADER
LIST_ENTRY WaitListHead; LIST_ENTRY WaitListHead;
} DISPATCHER_HEADER, *PDISPATCHER_HEADER; } DISPATCHER_HEADER, *PDISPATCHER_HEADER;
#endif /* __XTOS_ASSEMBLER_ */
#endif /* __XTDK_XTBASE_H */ #endif /* __XTDK_XTBASE_H */

View File

@@ -10,15 +10,10 @@
#define __XTDK_XTCOMPAT_H #define __XTDK_XTCOMPAT_H
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
#ifdef __cplusplus #ifdef __cplusplus
/* C++ definitions */ /* C++ definitions */
#define NULLPTR nullptr
#define VIRTUAL virtual
#define XTCLINK extern "C" #define XTCLINK extern "C"
#define XTSYMBOL(Name) __asm__(Name) #define NULLPTR nullptr
/* C++ boolean type */ /* C++ boolean type */
typedef bool BOOLEAN, *PBOOLEAN; typedef bool BOOLEAN, *PBOOLEAN;
@@ -29,10 +24,8 @@
typedef wchar_t wchar; typedef wchar_t wchar;
#else #else
/* C definitions */ /* C definitions */
#define NULLPTR ((void *)0)
#define VIRTUAL
#define XTCLINK #define XTCLINK
#define XTSYMBOL(Name) #define NULLPTR ((void *)0)
/* C boolean type */ /* C boolean type */
typedef enum _BOOLEAN typedef enum _BOOLEAN
@@ -45,5 +38,4 @@
typedef unsigned short wchar; typedef unsigned short wchar;
#endif #endif
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTCOMPAT_H */ #endif /* __XTDK_XTCOMPAT_H */

View File

@@ -23,7 +23,7 @@
#define DebugPrint(Format, ...) DbgPrint(Format, __VA_ARGS__); #define DebugPrint(Format, ...) DbgPrint(Format, __VA_ARGS__);
#else #else
#define DEBUG 0 #define DEBUG 0
#define DebugPrint(Format, ...) ((VOID)NULLPTR) #define DebugPrint(Format, ...) ((VOID)NULL)
#endif #endif
#endif /* __XTDK_XTDEBUG_H */ #endif /* __XTDK_XTDEBUG_H */

View File

@@ -58,10 +58,6 @@
/* Macro for calculating size of an array */ /* Macro for calculating size of an array */
#define ARRAY_SIZE(Array) (sizeof(Array) / sizeof(*Array)) #define ARRAY_SIZE(Array) (sizeof(Array) / sizeof(*Array))
/* Macros for converting Binary Coded Decimal (BCD) into decimal and vice versa */
#define BCD_TO_DECIMAL(Value) (((Value) & 0x0F) + (((Value) >> 4) * 10))
#define DECIMAL_TO_BCD(Value) ((((Value) / 10) << 4) | ((Value) % 10))
/* Macros for concatenating two strings */ /* Macros for concatenating two strings */
#define CONCAT_STRING(Str1, Str2) Str1##Str2 #define CONCAT_STRING(Str1, Str2) Str1##Str2
#define CONCATENATE(Str1, Str2) CONCAT_STRING(Str1, Str2) #define CONCATENATE(Str1, Str2) CONCAT_STRING(Str1, Str2)
@@ -78,20 +74,12 @@
/* Macro for calculating size of a field in the structure */ /* Macro for calculating size of a field in the structure */
#define FIELD_SIZE(Structure, Field) (sizeof(((Structure *)0)->Field)) #define FIELD_SIZE(Structure, Field) (sizeof(((Structure *)0)->Field))
/* Macros for calculating minimum and maximum of two values */
#define MIN(A, B) (((A) < (B)) ? (A) : (B))
#define MAX(A, B) (((A) > (B)) ? (A) : (B))
/* Macro that page-aligns a virtual address */ /* Macro that page-aligns a virtual address */
#define PAGE_ALIGN(VirtualAddress) ((PVOID)((ULONG_PTR)VirtualAddress & ~MM_PAGE_MASK)) #define PAGE_ALIGN(VirtualAddress) ((PVOID)((ULONG_PTR)VirtualAddress & ~MM_PAGE_MASK))
/* Macro that returns offset of the virtual address */ /* Macro that returns offset of the virtual address */
#define PAGE_OFFSET(VirtualAddress) ((ULONG)((ULONG_PTR)VirtualAddress & MM_PAGE_MASK)) #define PAGE_OFFSET(VirtualAddress) ((ULONG)((ULONG_PTR)VirtualAddress & MM_PAGE_MASK))
/* Macros for bitwise rotating */
#define ROTATE_LEFT(Value, Count) ((Value << Count) | (Value >> (32 - Count)))
#define ROTATE_RIGHT(Value, Count) ((Value >> Count) | (Value << (32 - Count)))
/* Macro for rounding down */ /* Macro for rounding down */
#define ROUND_DOWN(Value, Alignment) ((Value) & ~((Alignment) - 1)) #define ROUND_DOWN(Value, Alignment) ((Value) & ~((Alignment) - 1))
@@ -115,6 +103,7 @@
#define UNIQUE(Prefix) CONCATENATE(CONCATENATE(__UNIQUE_ID_, Prefix), __COUNTER__) #define UNIQUE(Prefix) CONCATENATE(CONCATENATE(__UNIQUE_ID_, Prefix), __COUNTER__)
/* Variadic ABI functions */ /* Variadic ABI functions */
typedef __builtin_va_list VA_LIST, *PVA_LIST;
#define VA_ARG(Marker, Type) ((sizeof (Type) < sizeof(UINT_PTR)) ? \ #define VA_ARG(Marker, Type) ((sizeof (Type) < sizeof(UINT_PTR)) ? \
(Type)(__builtin_va_arg(Marker, UINT_PTR)) : \ (Type)(__builtin_va_arg(Marker, UINT_PTR)) : \
(Type)(__builtin_va_arg(Marker, Type))) (Type)(__builtin_va_arg(Marker, Type)))

View File

@@ -13,9 +13,6 @@
#include <xtdefs.h> #include <xtdefs.h>
/* C/C++ specific code */
#ifndef D__XTOS_ASSEMBLER__
/* SSF2 font header */ /* SSF2 font header */
typedef struct _SSFN_FONT_HEADER typedef struct _SSFN_FONT_HEADER
{ {
@@ -3983,5 +3980,4 @@ UCHAR XtFbDefaultFont[] = {0x78, 0x74, 0x66, 0x6E, 0x3B, 0xE7, 0x00, 0x00, 0x03,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0x82, 0x32, 0x4E, 0x46, 0x53}; 0x82, 0x32, 0x4E, 0x46, 0x53};
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTFONT_H */ #endif /* __XTDK_XTFONT_H */

View File

@@ -19,10 +19,6 @@
/* Version number of the current XTOS loader protocol */ /* Version number of the current XTOS loader protocol */
#define BOOT_PROTOCOL_VERSION 1 #define BOOT_PROTOCOL_VERSION 1
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Memory allocation structures */ /* Memory allocation structures */
typedef enum _LOADER_MEMORY_TYPE typedef enum _LOADER_MEMORY_TYPE
{ {
@@ -111,7 +107,6 @@ typedef struct _KERNEL_INITIALIZATION_BLOCK
ULONG BlockVersion; ULONG BlockVersion;
ULONG ProtocolVersion; ULONG ProtocolVersion;
PWCHAR KernelParameters; PWCHAR KernelParameters;
PFN_NUMBER BootImageSize;
LIST_ENTRY LoadOrderListHead; LIST_ENTRY LoadOrderListHead;
LIST_ENTRY MemoryDescriptorListHead; LIST_ENTRY MemoryDescriptorListHead;
LIST_ENTRY BootDriverListHead; LIST_ENTRY BootDriverListHead;
@@ -120,5 +115,4 @@ typedef struct _KERNEL_INITIALIZATION_BLOCK
FIRMWARE_INFORMATION_BLOCK FirmwareInformation; FIRMWARE_INFORMATION_BLOCK FirmwareInformation;
} KERNEL_INITIALIZATION_BLOCK, *PKERNEL_INITIALIZATION_BLOCK; } KERNEL_INITIALIZATION_BLOCK, *PKERNEL_INITIALIZATION_BLOCK;
#endif /* __XTOS_ASSEMBLER_ */
#endif /* __XTDK_XTFW_H */ #endif /* __XTDK_XTFW_H */

View File

@@ -12,9 +12,6 @@
#include <xttypes.h> #include <xttypes.h>
/* C/C++ specific code */
#ifndef D__XTOS_ASSEMBLER__
CHAR XTGLYPH_EXECTOS_LOGO[] = CHAR XTGLYPH_EXECTOS_LOGO[] =
{ {
0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x25, 0x23, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x25, 0x23,
@@ -64,5 +61,4 @@ CHAR XTGLYPH_EXECTOS_LOGO[] =
0x28, 0x0d, 0x0a 0x28, 0x0d, 0x0a
}; };
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTGLYPH_H */ #endif /* __XTDK_XTGLYPH_H */

View File

@@ -202,10 +202,6 @@
#define PECOFF_IMAGE_SCN_MEM_READ 0x40000000 #define PECOFF_IMAGE_SCN_MEM_READ 0x40000000
#define PECOFF_IMAGE_SCN_MEM_WRITE 0x80000000 #define PECOFF_IMAGE_SCN_MEM_WRITE 0x80000000
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* PE/COFF image representation structure */ /* PE/COFF image representation structure */
typedef struct _PECOFF_IMAGE_CONTEXT typedef struct _PECOFF_IMAGE_CONTEXT
{ {
@@ -642,5 +638,4 @@ typedef struct _PECOFF_IMAGE_RESOURCE_DATA_ENTRY
ULONG Reserved; ULONG Reserved;
} PECOFF_IMAGE_RESOURCE_DATA_ENTRY, *PPECOFF_IMAGE_RESOURCE_DATA_ENTRY; } PECOFF_IMAGE_RESOURCE_DATA_ENTRY, *PPECOFF_IMAGE_RESOURCE_DATA_ENTRY;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTIMAGE_H */ #endif /* __XTDK_XTIMAGE_H */

View File

@@ -50,7 +50,6 @@
#include <hlfuncs.h> #include <hlfuncs.h>
#include <kdfuncs.h> #include <kdfuncs.h>
#include <kefuncs.h> #include <kefuncs.h>
#include <mmfuncs.h>
#include <rtlfuncs.h> #include <rtlfuncs.h>
/* Architecture specific XT routines */ /* Architecture specific XT routines */

View File

@@ -12,9 +12,6 @@
#include <xtdefs.h> #include <xtdefs.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Enumeration lists forward references */ /* Enumeration lists forward references */
typedef enum _ADJUST_REASON ADJUST_REASON, *PADJUST_REASON; typedef enum _ADJUST_REASON ADJUST_REASON, *PADJUST_REASON;
typedef enum _EXCEPTION_DISPOSITION EXCEPTION_DISPOSITION, *PEXCEPTION_DISPOSITION; typedef enum _EXCEPTION_DISPOSITION EXCEPTION_DISPOSITION, *PEXCEPTION_DISPOSITION;
@@ -47,15 +44,10 @@ typedef enum _KDPC_IMPORTANCE KDPC_IMPORTANCE, *PKDPC_IMPORTANCE;
typedef enum _KEVENT_TYPE KEVENT_TYPE, *PKEVENT_TYPE; typedef enum _KEVENT_TYPE KEVENT_TYPE, *PKEVENT_TYPE;
typedef enum _KOBJECTS KOBJECTS, *PKOBJECTS; typedef enum _KOBJECTS KOBJECTS, *PKOBJECTS;
typedef enum _KPROCESS_STATE KPROCESS_STATE, *PKPROCESS_STATE; typedef enum _KPROCESS_STATE KPROCESS_STATE, *PKPROCESS_STATE;
typedef enum _KPROFILE_SOURCE KPROFILE_SOURCE, *PKPROFILE_SOURCE;
typedef enum _KTHREAD_STATE KTHREAD_STATE, *PKTHREAD_STATE; typedef enum _KTHREAD_STATE KTHREAD_STATE, *PKTHREAD_STATE;
typedef enum _KTIMER_TYPE KTIMER_TYPE, *PKTIMER_TYPE; typedef enum _KTIMER_TYPE KTIMER_TYPE, *PKTIMER_TYPE;
typedef enum _KUBSAN_DATA_TYPE KUBSAN_DATA_TYPE, *PKUBSAN_DATA_TYPE; typedef enum _KUBSAN_DATA_TYPE KUBSAN_DATA_TYPE, *PKUBSAN_DATA_TYPE;
typedef enum _LOADER_MEMORY_TYPE LOADER_MEMORY_TYPE, *PLOADER_MEMORY_TYPE; typedef enum _LOADER_MEMORY_TYPE LOADER_MEMORY_TYPE, *PLOADER_MEMORY_TYPE;
typedef enum _MMPAGELISTS MMPAGELISTS, *PMMPAGELISTS;
typedef enum _MMPFN_CACHE_ATTRIBUTE MMPFN_CACHE_ATTRIBUTE, *PMMPFN_CACHE_ATTRIBUTE;
typedef enum _MMPOOL_TYPE MMPOOL_TYPE, *PMMPOOL_TYPE;
typedef enum _MMSYSTEM_PTE_POOL_TYPE MMSYSTEM_PTE_POOL_TYPE, *PMMSYSTEM_PTE_POOL_TYPE;
typedef enum _MODE MODE, *PMODE; typedef enum _MODE MODE, *PMODE;
typedef enum _RTL_VARIABLE_TYPE RTL_VARIABLE_TYPE, *PRTL_VARIABLE_TYPE; typedef enum _RTL_VARIABLE_TYPE RTL_VARIABLE_TYPE, *PRTL_VARIABLE_TYPE;
typedef enum _SYSTEM_FIRMWARE_TYPE SYSTEM_FIRMWARE_TYPE, *PSYSTEM_FIRMWARE_TYPE; typedef enum _SYSTEM_FIRMWARE_TYPE SYSTEM_FIRMWARE_TYPE, *PSYSTEM_FIRMWARE_TYPE;
@@ -66,12 +58,8 @@ typedef enum _WAIT_TYPE WAIT_TYPE, *PWAIT_TYPE;
typedef struct _ACPI_CACHE_LIST ACPI_CACHE_LIST, *PACPI_CACHE_LIST; typedef struct _ACPI_CACHE_LIST ACPI_CACHE_LIST, *PACPI_CACHE_LIST;
typedef struct _ACPI_DESCRIPTION_HEADER ACPI_DESCRIPTION_HEADER, *PACPI_DESCRIPTION_HEADER; typedef struct _ACPI_DESCRIPTION_HEADER ACPI_DESCRIPTION_HEADER, *PACPI_DESCRIPTION_HEADER;
typedef struct _ACPI_FADT ACPI_FADT, *PACPI_FADT; typedef struct _ACPI_FADT ACPI_FADT, *PACPI_FADT;
typedef struct _ACPI_HPET ACPI_HPET, *PACPI_HPET;
typedef struct _ACPI_MADT ACPI_MADT, *PACPI_MADT; typedef struct _ACPI_MADT ACPI_MADT, *PACPI_MADT;
typedef struct _ACPI_MADT_INTERRUPT_OVERRIDE ACPI_MADT_INTERRUPT_OVERRIDE, *PACPI_MADT_INTERRUPT_OVERRIDE; typedef struct _ACPI_MADT_TABLE_LOCAL_APIC ACPI_MADT_TABLE_LOCAL_APIC, *PACPI_MADT_TABLE_LOCAL_APIC;
typedef struct _ACPI_MADT_IOAPIC ACPI_MADT_IOAPIC, *PACPI_MADT_IOAPIC;
typedef struct _ACPI_MADT_LOCAL_APIC ACPI_MADT_LOCAL_APIC, *PACPI_MADT_LOCAL_APIC;
typedef struct _ACPI_MADT_LOCAL_X2APIC ACPI_MADT_LOCAL_X2APIC, *PACPI_MADT_LOCAL_X2APIC;
typedef struct _ACPI_RSDP ACPI_RSDP, *PACPI_RSDP; typedef struct _ACPI_RSDP ACPI_RSDP, *PACPI_RSDP;
typedef struct _ACPI_RSDT ACPI_RSDT, *PACPI_RSDT; typedef struct _ACPI_RSDT ACPI_RSDT, *PACPI_RSDT;
typedef struct _ACPI_SUBTABLE_HEADER ACPI_SUBTABLE_HEADER, *PACPI_SUBTABLE_HEADER; typedef struct _ACPI_SUBTABLE_HEADER ACPI_SUBTABLE_HEADER, *PACPI_SUBTABLE_HEADER;
@@ -263,9 +251,7 @@ typedef struct _KPROCESS KPROCESS, *PKPROCESS;
typedef struct _KQUEUE KQUEUE, *PKQUEUE; typedef struct _KQUEUE KQUEUE, *PKQUEUE;
typedef struct _KSEMAPHORE KSEMAPHORE, *PKSEMAPHORE; typedef struct _KSEMAPHORE KSEMAPHORE, *PKSEMAPHORE;
typedef struct _KSERVICE_DESCRIPTOR_TABLE KSERVICE_DESCRIPTOR_TABLE, *PKSERVICE_DESCRIPTOR_TABLE; typedef struct _KSERVICE_DESCRIPTOR_TABLE KSERVICE_DESCRIPTOR_TABLE, *PKSERVICE_DESCRIPTOR_TABLE;
typedef struct _KSHARED_DATA KSHARED_DATA, *PKSHARED_DATA;
typedef struct _KSPIN_LOCK_QUEUE KSPIN_LOCK_QUEUE, *PKSPIN_LOCK_QUEUE; typedef struct _KSPIN_LOCK_QUEUE KSPIN_LOCK_QUEUE, *PKSPIN_LOCK_QUEUE;
typedef struct _KSYSTEM_TIME KSYSTEM_TIME, *PKSYSTEM_TIME;
typedef struct _KTHREAD KTHREAD, *PKTHREAD; typedef struct _KTHREAD KTHREAD, *PKTHREAD;
typedef struct _KTIMER KTIMER, *PKTIMER; typedef struct _KTIMER KTIMER, *PKTIMER;
typedef struct _KUBSAN_FLOAT_CAST_OVERFLOW_DATA KUBSAN_FLOAT_CAST_OVERFLOW_DATA, *PKUBSAN_FLOAT_CAST_OVERFLOW_DATA; typedef struct _KUBSAN_FLOAT_CAST_OVERFLOW_DATA KUBSAN_FLOAT_CAST_OVERFLOW_DATA, *PKUBSAN_FLOAT_CAST_OVERFLOW_DATA;
@@ -288,10 +274,7 @@ typedef struct _LOADER_INFORMATION_BLOCK LOADER_INFORMATION_BLOCK, *PLOADER_INFO
typedef struct _LOADER_MEMORY_DESCRIPTOR LOADER_MEMORY_DESCRIPTOR, *PLOADER_MEMORY_DESCRIPTOR; typedef struct _LOADER_MEMORY_DESCRIPTOR LOADER_MEMORY_DESCRIPTOR, *PLOADER_MEMORY_DESCRIPTOR;
typedef struct _M128 M128, *PM128; typedef struct _M128 M128, *PM128;
typedef struct _MMCOLOR_TABLES MMCOLOR_TABLES, *PMMCOLOR_TABLES; typedef struct _MMCOLOR_TABLES MMCOLOR_TABLES, *PMMCOLOR_TABLES;
typedef struct _MMFREE_POOL_ENTRY MMFREE_POOL_ENTRY, *PMMFREE_POOL_ENTRY;
typedef struct _MMMEMORY_LAYOUT MMMEMORY_LAYOUT, *PMMMEMORY_LAYOUT;
typedef struct _MMPFNENTRY MMPFNENTRY, *PMMPFNENTRY; typedef struct _MMPFNENTRY MMPFNENTRY, *PMMPFNENTRY;
typedef struct _MMPFNLIST MMPFNLIST, *PMMPFNLIST;
typedef struct _PCAT_FIRMWARE_INFORMATION PCAT_FIRMWARE_INFORMATION, *PPCAT_FIRMWARE_INFORMATION; typedef struct _PCAT_FIRMWARE_INFORMATION PCAT_FIRMWARE_INFORMATION, *PPCAT_FIRMWARE_INFORMATION;
typedef struct _PCI_BRIDGE_CONTROL_REGISTER PCI_BRIDGE_CONTROL_REGISTER, *PPCI_BRIDGE_CONTROL_REGISTER; typedef struct _PCI_BRIDGE_CONTROL_REGISTER PCI_BRIDGE_CONTROL_REGISTER, *PPCI_BRIDGE_CONTROL_REGISTER;
typedef struct _PCI_COMMON_CONFIG PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG; typedef struct _PCI_COMMON_CONFIG PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
@@ -320,11 +303,6 @@ typedef struct _PECOFF_IMAGE_ROM_HEADER PECOFF_IMAGE_ROM_HEADER, *PPECOFF_IMAGE_
typedef struct _PECOFF_IMAGE_ROM_OPTIONAL_HEADER PECOFF_IMAGE_ROM_OPTIONAL_HEADER, *PPECOFF_IMAGE_ROM_OPTIONAL_HEADER; typedef struct _PECOFF_IMAGE_ROM_OPTIONAL_HEADER PECOFF_IMAGE_ROM_OPTIONAL_HEADER, *PPECOFF_IMAGE_ROM_OPTIONAL_HEADER;
typedef struct _PECOFF_IMAGE_SECTION_HEADER PECOFF_IMAGE_SECTION_HEADER, *PPECOFF_IMAGE_SECTION_HEADER; typedef struct _PECOFF_IMAGE_SECTION_HEADER PECOFF_IMAGE_SECTION_HEADER, *PPECOFF_IMAGE_SECTION_HEADER;
typedef struct _PECOFF_IMAGE_VXD_HEADER PECOFF_IMAGE_VXD_HEADER, *PPECOFF_IMAGE_VXD_HEADER; typedef struct _PECOFF_IMAGE_VXD_HEADER PECOFF_IMAGE_VXD_HEADER, *PPECOFF_IMAGE_VXD_HEADER;
typedef struct _PHYSICAL_MEMORY_DESCRIPTOR PHYSICAL_MEMORY_DESCRIPTOR, *PPHYSICAL_MEMORY_DESCRIPTOR;
typedef struct _PHYSICAL_MEMORY_RUN PHYSICAL_MEMORY_RUN, *PPHYSICAL_MEMORY_RUN;
typedef struct _POOL_HEADER POOL_HEADER, *PPOOL_HEADER;
typedef struct _POOL_TRACKING_BIG_ALLOCATIONS POOL_TRACKING_BIG_ALLOCATIONS, *PPOOL_TRACKING_BIG_ALLOCATIONS;
typedef struct _POOL_TRACKING_TABLE POOL_TRACKING_TABLE, *PPOOL_TRACKING_TABLE;
typedef struct _PROCESSOR_IDENTITY PROCESSOR_IDENTITY, *PPROCESSOR_IDENTITY; typedef struct _PROCESSOR_IDENTITY PROCESSOR_IDENTITY, *PPROCESSOR_IDENTITY;
typedef struct _PROCESSOR_POWER_STATE PROCESSOR_POWER_STATE, *PPROCESSOR_POWER_STATE; typedef struct _PROCESSOR_POWER_STATE PROCESSOR_POWER_STATE, *PPROCESSOR_POWER_STATE;
typedef struct _RTL_BITMAP RTL_BITMAP, *PRTL_BITMAP; typedef struct _RTL_BITMAP RTL_BITMAP, *PRTL_BITMAP;
@@ -337,7 +315,6 @@ typedef struct _STRING STRING, *PSTRING;
typedef struct _STRING32 STRING32, *PSTRING32; typedef struct _STRING32 STRING32, *PSTRING32;
typedef struct _STRING64 STRING64, *PSTRING64; typedef struct _STRING64 STRING64, *PSTRING64;
typedef struct _THREAD_INFORMATION_BLOCK THREAD_INFORMATION_BLOCK, *PTHREAD_INFORMATION_BLOCK; typedef struct _THREAD_INFORMATION_BLOCK THREAD_INFORMATION_BLOCK, *PTHREAD_INFORMATION_BLOCK;
typedef struct _TIME_FIELDS TIME_FIELDS, *PTIME_FIELDS;
typedef struct _UEFI_FIRMWARE_INFORMATION UEFI_FIRMWARE_INFORMATION, *PUEFI_FIRMWARE_INFORMATION; typedef struct _UEFI_FIRMWARE_INFORMATION UEFI_FIRMWARE_INFORMATION, *PUEFI_FIRMWARE_INFORMATION;
typedef struct _UNICODE_STRING UNICODE_STRING, *PUNICODE_STRING; typedef struct _UNICODE_STRING UNICODE_STRING, *PUNICODE_STRING;
typedef struct _UNICODE_STRING32 UNICODE_STRING32, *PUNICODE_STRING32; typedef struct _UNICODE_STRING32 UNICODE_STRING32, *PUNICODE_STRING32;
@@ -359,7 +336,6 @@ typedef struct _XTBL_MODULE_AUTHORS XTBL_MODULE_AUTHORS, *PXTBL_MODULE_AUTHORS;
typedef struct _XTBL_MODULE_DEPS XTBL_MODULE_DEPS, *PXTBL_MODULE_DEPS; typedef struct _XTBL_MODULE_DEPS XTBL_MODULE_DEPS, *PXTBL_MODULE_DEPS;
typedef struct _XTBL_MODULE_INFO XTBL_MODULE_INFO, *PXTBL_MODULE_INFO; typedef struct _XTBL_MODULE_INFO XTBL_MODULE_INFO, *PXTBL_MODULE_INFO;
typedef struct _XTBL_PAGE_MAPPING XTBL_PAGE_MAPPING, *PXTBL_PAGE_MAPPING; typedef struct _XTBL_PAGE_MAPPING XTBL_PAGE_MAPPING, *PXTBL_PAGE_MAPPING;
typedef struct _XTBL_SHELL_COMMAND XTBL_SHELL_COMMAND, *PXTBL_SHELL_COMMAND;
typedef struct _XTBL_STATUS XTBL_STATUS, *PXTBL_STATUS; typedef struct _XTBL_STATUS XTBL_STATUS, *PXTBL_STATUS;
/* Unions forward references */ /* Unions forward references */
@@ -375,5 +351,4 @@ typedef union _LARGE_INTEGER LARGE_INTEGER, *PLARGE_INTEGER;
typedef union _SINGLE_LIST_HEADER SINGLE_LIST_HEADER, *PSINGLE_LIST_HEADER; typedef union _SINGLE_LIST_HEADER SINGLE_LIST_HEADER, *PSINGLE_LIST_HEADER;
typedef union _ULARGE_INTEGER ULARGE_INTEGER, *PULARGE_INTEGER; typedef union _ULARGE_INTEGER ULARGE_INTEGER, *PULARGE_INTEGER;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTSTRUCT_H */ #endif /* __XTDK_XTSTRUCT_H */

View File

@@ -13,9 +13,6 @@
#include <xtcompat.h> #include <xtcompat.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Standard C types */ /* Standard C types */
typedef unsigned char BYTE, *PBYTE, *LPBYTE; typedef unsigned char BYTE, *PBYTE, *LPBYTE;
typedef char CHAR, *PCHAR, *LPCHAR; typedef char CHAR, *PCHAR, *LPCHAR;
@@ -153,9 +150,6 @@ typedef LPCWSTR PCTSTR, LPCTSTR;
typedef LPUWSTR PUTSTR, LPUTSTR; typedef LPUWSTR PUTSTR, LPUTSTR;
typedef LPCUWSTR PCUTSTR, LPCUTSTR; typedef LPCUWSTR PCUTSTR, LPCUTSTR;
/* Variadic ABI types */
typedef __builtin_va_list VA_LIST, *PVA_LIST;
/* 128-bit floats structure */ /* 128-bit floats structure */
typedef struct _FLOAT128 typedef struct _FLOAT128
{ {
@@ -293,5 +287,4 @@ typedef struct _UNICODE_STRING64
} UNICODE_STRING64, *PUNICODE_STRING64; } UNICODE_STRING64, *PUNICODE_STRING64;
typedef const UNICODE_STRING64 *PCUNICODE_STRING64; typedef const UNICODE_STRING64 *PCUNICODE_STRING64;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTTYPES_H */ #endif /* __XTDK_XTTYPES_H */

View File

@@ -373,10 +373,6 @@
#define EFI_CONFIG_TABLE_SMBIOS_TABLE_GUID {0xEB9D2D31, 0x2D88, 0x11D3, {0x9A, 0x16, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}} #define EFI_CONFIG_TABLE_SMBIOS_TABLE_GUID {0xEB9D2D31, 0x2D88, 0x11D3, {0x9A, 0x16, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}}
#define EFI_CONFIG_TABLE_SMBIOS3_TABLE_GUID {0xF2FD1544, 0x9794, 0x4A2C, {0x99, 0x2E, 0xE5, 0xBB, 0xCf, 0x20, 0xE3, 0x94}} #define EFI_CONFIG_TABLE_SMBIOS3_TABLE_GUID {0xF2FD1544, 0x9794, 0x4A2C, {0x99, 0x2E, 0xE5, 0xBB, 0xCf, 0x20, 0xE3, 0x94}}
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Basic UEFI types */ /* Basic UEFI types */
typedef PVOID EFI_EVENT, *PEFI_EVENT; typedef PVOID EFI_EVENT, *PEFI_EVENT;
typedef PVOID EFI_HANDLE, *PEFI_HANDLE; typedef PVOID EFI_HANDLE, *PEFI_HANDLE;
@@ -2727,5 +2723,4 @@ typedef struct _EFI_PROCESSOR_INFORMATION
EFI_PROCESSOR_PHYSICAL_LOCATION Location; EFI_PROCESSOR_PHYSICAL_LOCATION Location;
} EFI_PROCESSOR_INFORMATION, *PEFI_PROCESSOR_INFORMATION; } EFI_PROCESSOR_INFORMATION, *PEFI_PROCESSOR_INFORMATION;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTUEFI_H */ #endif /* __XTDK_XTUEFI_H */

View File

@@ -10,6 +10,7 @@ include_directories(
# Specify list of kernel source code files # Specify list of kernel source code files
list(APPEND XTOSKRNL_SOURCE list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/archsup.S ${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/archsup.S
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/boot.S
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/cpufunc.cc ${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/cpufunc.cc
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/data.cc ${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/data.cc
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/procsup.cc ${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/procsup.cc
@@ -17,13 +18,9 @@ list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/ex/exports.cc ${XTOSKRNL_SOURCE_DIR}/ex/exports.cc
${XTOSKRNL_SOURCE_DIR}/ex/rundown.cc ${XTOSKRNL_SOURCE_DIR}/ex/rundown.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/cpu.cc ${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/cpu.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/firmware.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/ioport.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/irq.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/pic.cc ${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/pic.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/rtc.cc ${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/ioport.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/runlevel.cc ${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/runlevel.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/timer.cc
${XTOSKRNL_SOURCE_DIR}/hl/acpi.cc ${XTOSKRNL_SOURCE_DIR}/hl/acpi.cc
${XTOSKRNL_SOURCE_DIR}/hl/cport.cc ${XTOSKRNL_SOURCE_DIR}/hl/cport.cc
${XTOSKRNL_SOURCE_DIR}/hl/data.cc ${XTOSKRNL_SOURCE_DIR}/hl/data.cc
@@ -34,6 +31,7 @@ list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/kd/data.cc ${XTOSKRNL_SOURCE_DIR}/kd/data.cc
${XTOSKRNL_SOURCE_DIR}/kd/dbgio.cc ${XTOSKRNL_SOURCE_DIR}/kd/dbgio.cc
${XTOSKRNL_SOURCE_DIR}/kd/exports.cc ${XTOSKRNL_SOURCE_DIR}/kd/exports.cc
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/irq.cc
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/krnlinit.cc ${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/krnlinit.cc
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/kthread.cc ${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/kthread.cc
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/proc.cc ${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/proc.cc
@@ -41,7 +39,6 @@ list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/ke/bootinfo.cc ${XTOSKRNL_SOURCE_DIR}/ke/bootinfo.cc
${XTOSKRNL_SOURCE_DIR}/ke/crash.cc ${XTOSKRNL_SOURCE_DIR}/ke/crash.cc
${XTOSKRNL_SOURCE_DIR}/ke/data.cc ${XTOSKRNL_SOURCE_DIR}/ke/data.cc
${XTOSKRNL_SOURCE_DIR}/ke/dispatch.cc
${XTOSKRNL_SOURCE_DIR}/ke/dpc.cc ${XTOSKRNL_SOURCE_DIR}/ke/dpc.cc
${XTOSKRNL_SOURCE_DIR}/ke/event.cc ${XTOSKRNL_SOURCE_DIR}/ke/event.cc
${XTOSKRNL_SOURCE_DIR}/ke/exports.cc ${XTOSKRNL_SOURCE_DIR}/ke/exports.cc
@@ -51,33 +48,20 @@ list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/ke/kubsan.cc ${XTOSKRNL_SOURCE_DIR}/ke/kubsan.cc
${XTOSKRNL_SOURCE_DIR}/ke/runlevel.cc ${XTOSKRNL_SOURCE_DIR}/ke/runlevel.cc
${XTOSKRNL_SOURCE_DIR}/ke/semphore.cc ${XTOSKRNL_SOURCE_DIR}/ke/semphore.cc
${XTOSKRNL_SOURCE_DIR}/ke/shdata.cc
${XTOSKRNL_SOURCE_DIR}/ke/spinlock.cc ${XTOSKRNL_SOURCE_DIR}/ke/spinlock.cc
${XTOSKRNL_SOURCE_DIR}/ke/sysres.cc ${XTOSKRNL_SOURCE_DIR}/ke/sysres.cc
${XTOSKRNL_SOURCE_DIR}/ke/systime.cc
${XTOSKRNL_SOURCE_DIR}/ke/timer.cc ${XTOSKRNL_SOURCE_DIR}/ke/timer.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/mmgr.cc ${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/init.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pagemap.cc ${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pagemap.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/paging.cc ${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/paging.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pfault.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pfn.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pool.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pte.cc
${XTOSKRNL_SOURCE_DIR}/mm/alloc.cc
${XTOSKRNL_SOURCE_DIR}/mm/colors.cc
${XTOSKRNL_SOURCE_DIR}/mm/data.cc ${XTOSKRNL_SOURCE_DIR}/mm/data.cc
${XTOSKRNL_SOURCE_DIR}/mm/exports.cc
${XTOSKRNL_SOURCE_DIR}/mm/hlpool.cc ${XTOSKRNL_SOURCE_DIR}/mm/hlpool.cc
${XTOSKRNL_SOURCE_DIR}/mm/init.cc
${XTOSKRNL_SOURCE_DIR}/mm/kpool.cc ${XTOSKRNL_SOURCE_DIR}/mm/kpool.cc
${XTOSKRNL_SOURCE_DIR}/mm/mmgr.cc
${XTOSKRNL_SOURCE_DIR}/mm/paging.cc ${XTOSKRNL_SOURCE_DIR}/mm/paging.cc
${XTOSKRNL_SOURCE_DIR}/mm/pfn.cc
${XTOSKRNL_SOURCE_DIR}/mm/pool.cc
${XTOSKRNL_SOURCE_DIR}/mm/pte.cc
${XTOSKRNL_SOURCE_DIR}/po/idle.cc ${XTOSKRNL_SOURCE_DIR}/po/idle.cc
${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/dispatch.cc ${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/dispatch.cc
${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/exsup.cc ${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/exsup.cc
${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/intrin.cc
${XTOSKRNL_SOURCE_DIR}/rtl/atomic.cc ${XTOSKRNL_SOURCE_DIR}/rtl/atomic.cc
${XTOSKRNL_SOURCE_DIR}/rtl/bitmap.cc ${XTOSKRNL_SOURCE_DIR}/rtl/bitmap.cc
${XTOSKRNL_SOURCE_DIR}/rtl/data.cc ${XTOSKRNL_SOURCE_DIR}/rtl/data.cc
@@ -87,10 +71,7 @@ list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/rtl/llist.cc ${XTOSKRNL_SOURCE_DIR}/rtl/llist.cc
${XTOSKRNL_SOURCE_DIR}/rtl/math.cc ${XTOSKRNL_SOURCE_DIR}/rtl/math.cc
${XTOSKRNL_SOURCE_DIR}/rtl/memory.cc ${XTOSKRNL_SOURCE_DIR}/rtl/memory.cc
${XTOSKRNL_SOURCE_DIR}/rtl/sha1.cc
${XTOSKRNL_SOURCE_DIR}/rtl/slist.cc
${XTOSKRNL_SOURCE_DIR}/rtl/string.cc ${XTOSKRNL_SOURCE_DIR}/rtl/string.cc
${XTOSKRNL_SOURCE_DIR}/rtl/time.cc
${XTOSKRNL_SOURCE_DIR}/rtl/widestr.cc) ${XTOSKRNL_SOURCE_DIR}/rtl/widestr.cc)
# Set module definition SPEC file # Set module definition SPEC file
@@ -98,13 +79,14 @@ set_specfile(xtoskrnl.spec xtoskrnl.exe)
# Link static XTOS library # Link static XTOS library
add_library(libxtos ${XTOSKRNL_SOURCE}) add_library(libxtos ${XTOSKRNL_SOURCE})
target_link_libraries(libxtos PRIVATE xtadk)
# Link kernel executable # Link kernel executable
add_executable(xtoskrnl ${CMAKE_CURRENT_BINARY_DIR}/xtoskrnl.def) add_executable(xtoskrnl
${XTOSKRNL_SOURCE}
${CMAKE_CURRENT_BINARY_DIR}/xtoskrnl.def)
# Add linker libraries # Add linker libraries
target_link_libraries(xtoskrnl PRIVATE libxtos) target_link_libraries(xtoskrnl)
# Set proper binary name and install target # Set proper binary name and install target
set_target_properties(xtoskrnl PROPERTIES SUFFIX .exe) set_target_properties(xtoskrnl PROPERTIES SUFFIX .exe)

View File

@@ -4,18 +4,6 @@ within the XTOS kernel space. It is responsible for various core services, such
management, and process scheduling. The kernel contains the scheduler (sometimes referred to as the Dispatcher), the management, and process scheduling. The kernel contains the scheduler (sometimes referred to as the Dispatcher), the
cache, object, and memory managers, the security manager, and other executive components described below. cache, object, and memory managers, the security manager, and other executive components described below.
## Kernel Parameters
Kernel parameters are XTOS boot-time options used to ensure proper initialization and handling of hardware peripherals.
These parameters can be configured either temporarily by editing the boot entry in the bootloaders selection menu, or
permanently by modifying the XTLDR configuration file.
The following is a consolidated list of available kernel parameters:
* **NOXPA**: Disables PAE or LA57 support, depending on the CPU architecture. This parameter is handled by the
bootloader, which configures paging and selects the appropriate Page Map Level (PML) before transferring control to
the kernel.
## Source Code
The source code of the kernel is organized into subsystem-specific directories. Each directory name also defines the The source code of the kernel is organized into subsystem-specific directories. Each directory name also defines the
corresponding C++ namespace in which the subsystem's classes and routines reside. These subsystems include: corresponding C++ namespace in which the subsystem's classes and routines reside. These subsystems include:

View File

@@ -4,42 +4,31 @@
* FILE: xtoskrnl/ar/amd64/archsup.S * FILE: xtoskrnl/ar/amd64/archsup.S
* DESCRIPTION: Provides AMD64 architecture features not implementable in C * DESCRIPTION: Provides AMD64 architecture features not implementable in C
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org> * DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <harraiken91@gmail.com>
*/ */
#include <xtkmapi.h> #include <ar/amd64/asmsup.h>
#include <xtadk.h>
.altmacro .altmacro
.text .text
/** /**
* Creates a trap or interrupt handler for the specified vector. * Creates a trap handler for the specified vector.
* *
* @param Vector * @param Vector
* Supplies a trap/interrupt vector number. * Supplies a trap vector number.
*
* @param Type
* Specifies whether the handler is designed to handle an interrupt or a trap.
* *
* @return This macro does not return any value. * @return This macro does not return any value.
* *
* @since XT 1.0 * @since XT 1.0
*/ */
.macro ArCreateHandler Vector Type .macro ArCreateTrapHandler Vector
.global Ar\Type\Vector .global ArTrap\Vector
Ar\Type\Vector: ArTrap\Vector:
/* Check handler type */ /* Push fake error code for non-error vectors */
.ifc \Type,Trap
/* Push fake error code for non-error vector traps */
.if \Vector != 8 && \Vector != 10 && \Vector != 11 && \Vector != 12 && \Vector != 13 && \Vector != 14 && \Vector != 17 && \Vector != 30 .if \Vector != 8 && \Vector != 10 && \Vector != 11 && \Vector != 12 && \Vector != 13 && \Vector != 14 && \Vector != 17 && \Vector != 30
push $0 push $0
.endif .endif
.else
/* Push fake error code for interrupts */
push $0
.endif
/* Push vector number */ /* Push vector number */
push $\Vector push $\Vector
@@ -62,122 +51,105 @@ Ar\Type\Vector:
push %rax push %rax
/* Reserve space for other registers and point RBP to the trap frame */ /* Reserve space for other registers and point RBP to the trap frame */
sub $(KTRAP_FRAME_SIZE - KTRAP_FRAME_REGISTERS_SIZE), %rsp sub $(TRAP_FRAME_SIZE - TRAP_REGISTERS_SIZE), %rsp
lea (%rsp), %rbp lea (%rsp), %rbp
/* Store segment selectors */ /* Store segment selectors */
mov %gs, KTRAP_FRAME_SegGs(%rbp) mov %gs, TrapSegGs(%rbp)
mov %fs, KTRAP_FRAME_SegFs(%rbp) mov %fs, TrapSegFs(%rbp)
mov %es, KTRAP_FRAME_SegEs(%rbp) mov %es, TrapSegEs(%rbp)
mov %ds, KTRAP_FRAME_SegDs(%rbp) mov %ds, TrapSegDs(%rbp)
/* Store debug registers */ /* Store debug registers */
mov %dr7, %rax mov %dr7, %rax
mov %rax, KTRAP_FRAME_Dr7(%rbp) mov %rax, TrapDr7(%rbp)
mov %dr6, %rax mov %dr6, %rax
mov %rax, KTRAP_FRAME_Dr6(%rbp) mov %rax, TrapDr6(%rbp)
mov %dr3, %rax mov %dr3, %rax
mov %rax, KTRAP_FRAME_Dr3(%rbp) mov %rax, TrapDr3(%rbp)
mov %dr2, %rax mov %dr2, %rax
mov %rax, KTRAP_FRAME_Dr2(%rbp) mov %rax, TrapDr2(%rbp)
mov %dr1, %rax mov %dr1, %rax
mov %rax, KTRAP_FRAME_Dr1(%rbp) mov %rax, TrapDr1(%rbp)
mov %dr0, %rax mov %dr0, %rax
mov %rax, KTRAP_FRAME_Dr0(%rbp) mov %rax, TrapDr0(%rbp)
/* Store CR2 and CR3 */ /* Store CR2 and CR3 */
mov %cr3, %rax mov %cr3, %rax
mov %rax, KTRAP_FRAME_Cr3(%rbp) mov %rax, TrapCr3(%rbp)
mov %cr2, %rax mov %cr2, %rax
mov %rax, KTRAP_FRAME_Cr2(%rbp) mov %rax, TrapCr2(%rbp)
/* Store MxCsr register */ /* Store MxCsr register */
stmxcsr KTRAP_FRAME_MxCsr(%rbp) stmxcsr TrapMxCsr(%rbp)
/* Store XMM registers */ /* Store XMM registers */
movdqa %xmm15, KTRAP_FRAME_Xmm15(%rbp) movdqa %xmm15, TrapXmm15(%rbp)
movdqa %xmm14, KTRAP_FRAME_Xmm14(%rbp) movdqa %xmm14, TrapXmm14(%rbp)
movdqa %xmm13, KTRAP_FRAME_Xmm13(%rbp) movdqa %xmm13, TrapXmm13(%rbp)
movdqa %xmm12, KTRAP_FRAME_Xmm12(%rbp) movdqa %xmm12, TrapXmm12(%rbp)
movdqa %xmm11, KTRAP_FRAME_Xmm11(%rbp) movdqa %xmm11, TrapXmm11(%rbp)
movdqa %xmm10, KTRAP_FRAME_Xmm10(%rbp) movdqa %xmm10, TrapXmm10(%rbp)
movdqa %xmm9, KTRAP_FRAME_Xmm9(%rbp) movdqa %xmm9, TrapXmm9(%rbp)
movdqa %xmm8, KTRAP_FRAME_Xmm8(%rbp) movdqa %xmm8, TrapXmm8(%rbp)
movdqa %xmm7, KTRAP_FRAME_Xmm7(%rbp) movdqa %xmm7, TrapXmm7(%rbp)
movdqa %xmm6, KTRAP_FRAME_Xmm6(%rbp) movdqa %xmm6, TrapXmm6(%rbp)
movdqa %xmm5, KTRAP_FRAME_Xmm5(%rbp) movdqa %xmm5, TrapXmm5(%rbp)
movdqa %xmm4, KTRAP_FRAME_Xmm4(%rbp) movdqa %xmm4, TrapXmm4(%rbp)
movdqa %xmm3, KTRAP_FRAME_Xmm3(%rbp) movdqa %xmm3, TrapXmm3(%rbp)
movdqa %xmm2, KTRAP_FRAME_Xmm2(%rbp) movdqa %xmm2, TrapXmm2(%rbp)
movdqa %xmm1, KTRAP_FRAME_Xmm1(%rbp) movdqa %xmm1, TrapXmm1(%rbp)
movdqa %xmm0, KTRAP_FRAME_Xmm0(%rbp) movdqa %xmm0, TrapXmm0(%rbp)
/* Test previous mode and swap GS if needed */ /* Test previous mode and swap GS if needed */
movl $0, KTRAP_FRAME_PreviousMode(%rbp) movl $0, TrapPreviousMode(%rbp)
mov KTRAP_FRAME_SegCs(%rbp), %ax mov %cs, %ax
and $3, %al and $1, %al
mov %al, KTRAP_FRAME_PreviousMode(%rbp) mov %al, TrapPreviousMode(%rbp)
jz KernelMode$\Vector
/* Skip swapgs as the interrupt originated from kernel mode */
jz Dispatch\Type\Vector
swapgs swapgs
Dispatch\Type\Vector: KernelMode$\Vector:
/* Set up trap frame pointer for the dispatcher and clear the direction flag */ /* Push Frame Pointer, clear direction flag and pass to trap dispatcher */
mov %rsp, %rcx mov %rsp, %rcx
cld cld
/* Preserve the original stack pointer */
mov %rsp, %rbx
/* Force stack alignment */
and $-16, %rsp
/* Allocate 32 bytes of shadow space */
sub $32, %rsp
.ifc \Type,Trap
/* Pass to the trap dispatcher */
call ArDispatchTrap call ArDispatchTrap
.else
/* Pass to the interrupt dispatcher */
call ArDispatchInterrupt
.endif
/* Restore the original trap frame stack pointer */
mov %rbx, %rsp
/* Test previous mode and swapgs if needed */ /* Test previous mode and swapgs if needed */
testb $1, KTRAP_FRAME_PreviousMode(%rbp) testb $1, TrapPreviousMode(%rbp)
jz RestoreState\Type\Vector jz KernelModeReturn$\Vector
cli cli
swapgs swapgs
RestoreState\Type\Vector: KernelModeReturn$\Vector:
/* Restore XMM registers */ /* Restore XMM registers */
movdqa KTRAP_FRAME_Xmm0(%rbp), %xmm0 movdqa TrapXmm0(%rbp), %xmm0
movdqa KTRAP_FRAME_Xmm1(%rbp), %xmm1 movdqa TrapXmm1(%rbp), %xmm1
movdqa KTRAP_FRAME_Xmm2(%rbp), %xmm2 movdqa TrapXmm2(%rbp), %xmm2
movdqa KTRAP_FRAME_Xmm3(%rbp), %xmm3 movdqa TrapXmm3(%rbp), %xmm3
movdqa KTRAP_FRAME_Xmm4(%rbp), %xmm4 movdqa TrapXmm4(%rbp), %xmm4
movdqa KTRAP_FRAME_Xmm5(%rbp), %xmm5 movdqa TrapXmm5(%rbp), %xmm5
movdqa KTRAP_FRAME_Xmm6(%rbp), %xmm6 movdqa TrapXmm6(%rbp), %xmm6
movdqa KTRAP_FRAME_Xmm7(%rbp), %xmm7 movdqa TrapXmm7(%rbp), %xmm7
movdqa KTRAP_FRAME_Xmm8(%rbp), %xmm8 movdqa TrapXmm8(%rbp), %xmm8
movdqa KTRAP_FRAME_Xmm9(%rbp), %xmm9 movdqa TrapXmm9(%rbp), %xmm9
movdqa KTRAP_FRAME_Xmm10(%rbp), %xmm10 movdqa TrapXmm10(%rbp), %xmm10
movdqa KTRAP_FRAME_Xmm11(%rbp), %xmm11 movdqa TrapXmm11(%rbp), %xmm11
movdqa KTRAP_FRAME_Xmm12(%rbp), %xmm12 movdqa TrapXmm12(%rbp), %xmm12
movdqa KTRAP_FRAME_Xmm13(%rbp), %xmm13 movdqa TrapXmm13(%rbp), %xmm13
movdqa KTRAP_FRAME_Xmm14(%rbp), %xmm14 movdqa TrapXmm14(%rbp), %xmm14
movdqa KTRAP_FRAME_Xmm15(%rbp), %xmm15 movdqa TrapXmm15(%rbp), %xmm15
/* Load MxCsr register */ /* Load MxCsr register */
ldmxcsr KTRAP_FRAME_MxCsr(%rbp) ldmxcsr TrapMxCsr(%rbp)
/* Restore segment selectors */
mov TrapSegDs(%rbp), %ds
mov TrapSegEs(%rbp), %es
mov TrapSegFs(%rbp), %fs
/* Free stack space */ /* Free stack space */
add $(KTRAP_FRAME_SIZE - KTRAP_FRAME_REGISTERS_SIZE), %rsp add $(TRAP_FRAME_SIZE - TRAP_REGISTERS_SIZE), %rsp
/* Pop General Purpose Registers */ /* Pop General Purpose Registers */
pop %rax pop %rax
@@ -201,172 +173,9 @@ RestoreState\Type\Vector:
iretq iretq
.endm .endm
/* Populate common interrupt and trap handlers */ /* Populate common trap handlers */
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F .irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F .irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
ArCreateHandler 0x\i\j Interrupt ArCreateTrapHandler 0x\i\j
ArCreateHandler 0x\i\j Trap
.endr .endr
.endr .endr
/* Define array of pointers to the interrupt handlers */
.global ArInterruptEntry
ArInterruptEntry:
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.quad ArInterrupt0x\i\j
.endr
.endr
/* Define array of pointers to the trap handlers */
.global ArTrapEntry
ArTrapEntry:
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.quad ArTrap0x\i\j
.endr
.endr
/**
* Enables eXtended Physical Addressing (XPA).
*
* @param PageMap
* Supplies a pointer to the page map to be used.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global ArEnableExtendedPhysicalAddressing
ArEnableExtendedPhysicalAddressing:
/* Save the original CR4 register */
movq %cr4, %rax
/* Save the state of stack pointer and non-volatile registers */
movq %rsp, XpaRegisterSaveArea(%rip)
movq %rbp, XpaRegisterSaveArea+0x08(%rip)
movq %rax, XpaRegisterSaveArea+0x10(%rip)
movq %rbx, XpaRegisterSaveArea+0x18(%rip)
/* Save the original CR0 register */
movq %cr0, %rbp
/* Load temporary GDT required for mode transitions */
leaq XpaTemporaryGdtDesc(%rip), %rax
movq %rax, XpaTemporaryGdtBase(%rip)
lgdtq XpaTemporaryGdtSize(%rip)
/* Load addresses for entering compatibility mode and re-entering long mode */
leaq XpaEnterCompatMode(%rip), %rax
leaq XpaEnterLongMode(%rip), %rbx
/* Push the 32-bit code segment selector and the target address for a far jump */
pushq $KGDT_R0_CMCODE
pushq %rax
/* Perform a far return to switch to 32-bit compatibility mode */
lretq
XpaEnterCompatMode:
/* Enter 32-bit compatibility mode */
.code32
/* Store the PageMap pointer on the stack for future use */
pushl %ecx
/* Set the stack segment to the 32-bit data segment selector */
movl $KGDT_R0_DATA, %eax
movl %eax, %ss
/* Disable PGE and PCIDE to ensure all TLB entries will be flushed */
movl %cr4, %eax
andl $~(CR4_PGE | CR4_PCIDE), %eax
movl %eax, %cr4
/* Temporarily disable paging */
movl %ebp, %eax
andl $~CR0_PG, %eax
movl %eax, %cr0
/* Disable Long Mode as prerequisite for enabling 5-level paging */
movl $X86_MSR_EFER, %ecx
rdmsr
andl $~X86_MSR_EFER_LME, %eax
wrmsr
/* Transition to 5-level paging (PML5/LA57) */
movl %cr4, %eax
orl $CR4_LA57, %eax
movl %eax, %cr4
/* Restore the PageMap pointer from the stack and load it into CR3 */
popl %ecx
movl %ecx, %cr3
/* Re-enable Long Mode */
movl $X86_MSR_EFER, %ecx
rdmsr
orl $X86_MSR_EFER_LME, %eax
wrmsr
/* Restore CR0 with paging enabled and flush the instruction pipeline */
movl %ebp, %cr0
call XpaFlushInstructions
XpaFlushInstructions:
/* Push the 64-bit code segment selector and the target address for a far jump */
pushl $KGDT_R0_CODE
pushl %ebx
/* Perform a far return to switch to 64-bit long mode */
lretl
XpaEnterLongMode:
/* Enter 64-bit long mode */
.code64
/* Restore the stack pointer and non-volatile registers */
movq XpaRegisterSaveArea(%rip), %rsp
movq XpaRegisterSaveArea+8(%rip), %rbp
movq XpaRegisterSaveArea+0x10(%rip), %rax
movq XpaRegisterSaveArea+0x18(%rip), %rbx
/* Restore the original CR4 register with LA57 bit set */
orq $CR4_LA57, %rax
movq %rax, %cr4
/* Return to the caller */
retq
/* Data section for saving registers and temporary GDT */
XpaRegisterSaveArea: .quad 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000
XpaTemporaryGdtSize: .short ArEnableExtendedPhysicalAddressingEnd - XpaTemporaryGdtDesc - 1
XpaTemporaryGdtBase: .quad 0x0000000000000000
XpaTemporaryGdtDesc: .quad 0x0000000000000000, 0x00CF9A000000FFFF, 0x00AF9A000000FFFF, 0x00CF92000000FFFF
.global ArEnableExtendedPhysicalAddressingEnd
ArEnableExtendedPhysicalAddressingEnd:
/**
* Handles a spurious interrupt allowing it to end up.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global ArHandleSpuriousInterrupt
ArHandleSpuriousInterrupt:
iretq
/**
* Starts an application processor (AP). This is just a stub.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global ArStartApplicationProcessor
ArStartApplicationProcessor:
.global ArStartApplicationProcessorEnd
ArStartApplicationProcessorEnd:

147
xtoskrnl/ar/amd64/boot.S Normal file
View File

@@ -0,0 +1,147 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/amd64/boot.S
* DESCRIPTION: AMD64-specific boot code for setting up the low-level CPU environment
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <ar/amd64/asmsup.h>
.altmacro
.text
/**
* Enables eXtended Physical Addressing (XPA).
*
* @param PageMap
* Supplies a pointer to the page map to be used.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global ArEnableExtendedPhysicalAddressing
ArEnableExtendedPhysicalAddressing:
/* Save the original CR4 register */
movq %cr4, %rax
/* Save the state of stack pointer and non-volatile registers */
movq %rsp, XpaRegisterSaveArea(%rip)
movq %rbp, XpaRegisterSaveArea+0x08(%rip)
movq %rax, XpaRegisterSaveArea+0x10(%rip)
movq %rbx, XpaRegisterSaveArea+0x18(%rip)
/* Save the original CR0 register */
movq %cr0, %rbp
/* Load temporary GDT required for mode transitions */
leaq XpaTemporaryGdtDesc(%rip), %rax
movq %rax, XpaTemporaryGdtBase(%rip)
lgdtq XpaTemporaryGdtSize(%rip)
/* Load addresses for entering compatibility mode and re-entering long mode */
leaq XpaEnterCompatMode(%rip), %rax
leaq XpaEnterLongMode(%rip), %rbx
/* Push the 32-bit code segment selector and the target address for a far jump */
pushq $GDT_R0_CMCODE
pushq %rax
/* Perform a far return to switch to 32-bit compatibility mode */
lretq
XpaEnterCompatMode:
/* Enter 32-bit compatibility mode */
.code32
/* Store the PageMap pointer on the stack for future use */
pushl %ecx
/* Set the stack segment to the 32-bit data segment selector */
movl $GDT_R0_DATA, %eax
movl %eax, %ss
/* Disable PGE and PCIDE to ensure all TLB entries will be flushed */
movl %cr4, %eax
andl $~(CR4_PGE | CR4_PCIDE), %eax
movl %eax, %cr4
/* Temporarily disable paging */
movl %ebp, %eax
andl $~CR0_PG, %eax
movl %eax, %cr0
/* Disable Long Mode as prerequisite for enabling 5-level paging */
movl $X86_MSR_EFER, %ecx
rdmsr
andl $~X86_MSR_EFER_LME, %eax
wrmsr
/* Transition to 5-level paging (PML5/LA57) */
movl %cr4, %eax
orl $CR4_LA57, %eax
movl %eax, %cr4
/* Restore the PageMap pointer from the stack and load it into CR3 */
popl %ecx
movl %ecx, %cr3
/* Re-enable Long Mode */
movl $X86_MSR_EFER, %ecx
rdmsr
orl $X86_MSR_EFER_LME, %eax
wrmsr
/* Restore CR0 with paging enabled and flush the instruction pipeline */
movl %ebp, %cr0
call XpaFlushInstructions
XpaFlushInstructions:
/* Push the 64-bit code segment selector and the target address for a far jump */
pushl $GDT_R0_CODE
pushl %ebx
/* Perform a far return to switch to 64-bit long mode */
lretl
XpaEnterLongMode:
/* Enter 64-bit long mode */
.code64
/* Restore the stack pointer and non-volatile registers */
movq XpaRegisterSaveArea(%rip), %rsp
movq XpaRegisterSaveArea+8(%rip), %rbp
movq XpaRegisterSaveArea+0x10(%rip), %rax
movq XpaRegisterSaveArea+0x18(%rip), %rbx
/* Restore the original CR4 register with LA57 bit set */
orq $CR4_LA57, %rax
movq %rax, %cr4
/* Return to the caller */
retq
/* Data section for saving registers and temporary GDT */
XpaRegisterSaveArea: .quad 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000
XpaTemporaryGdtSize: .short ArEnableExtendedPhysicalAddressingEnd - XpaTemporaryGdtDesc - 1
XpaTemporaryGdtBase: .quad 0x0000000000000000
XpaTemporaryGdtDesc: .quad 0x0000000000000000, 0x00CF9A000000FFFF, 0x00AF9A000000FFFF, 0x00CF92000000FFFF
.global ArEnableExtendedPhysicalAddressingEnd
ArEnableExtendedPhysicalAddressingEnd:
/**
* Starts an application processor (AP). This is just a stub.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global ArStartApplicationProcessor
ArStartApplicationProcessor:
.global ArStartApplicationProcessorEnd
ArStartApplicationProcessorEnd:

View File

@@ -573,33 +573,6 @@ AR::CpuFunc::ReadTimeStampCounter(VOID)
return ((ULONGLONG)High << 32) | Low; return ((ULONGLONG)High << 32) | Low;
} }
/**
* Reads the current value of the CPU's time-stamp counter and processor ID.
*
* @param TscAux
* Supplies a pointer to a variable that receives the auxiliary TSC information (IA32_TSC_AUX).
*
* @return This routine returns the current instruction cycle count since the processor was last reset.
*
* @since XT 1.0
*/
XTCDECL
ULONGLONG
AR::CpuFunc::ReadTimeStampCounterProcessor(OUT PULONG TscAux)
{
ULONG Low, High;
/* Execute the RDTSCP instruction */
__asm__ volatile("rdtscp"
: "=a" (Low),
"=d" (High),
"=c" (*TscAux)
);
/* Combine the two 32-bit registers into a single 64-bit unsigned integer and return the value */
return ((ULONGLONG)High << 32) | Low;
}
/** /**
* Orders memory accesses as seen by other processors, without fence. * Orders memory accesses as seen by other processors, without fence.
* *

View File

@@ -26,9 +26,3 @@ KPROCESSOR_BLOCK AR::ProcSup::InitialProcessorBlock;
/* Initial TSS */ /* Initial TSS */
KTSS AR::ProcSup::InitialTss; KTSS AR::ProcSup::InitialTss;
/* Initial kernel NMI stack */
UCHAR AR::ProcSup::NmiStack[KERNEL_STACK_SIZE] = {};
/* Unhandled interrupt routine */
PINTERRUPT_HANDLER AR::Traps::UnhandledInterruptRoutine = NULLPTR;

View File

@@ -20,7 +20,7 @@ XTAPI
PVOID PVOID
AR::ProcSup::GetBootStack(VOID) AR::ProcSup::GetBootStack(VOID)
{ {
return (PVOID)((ULONG_PTR)BootStack + KERNEL_STACK_SIZE); return (PVOID)BootStack;
} }
XTAPI XTAPI
@@ -73,7 +73,7 @@ AR::ProcSup::IdentifyProcessor(VOID)
/* Get CPU vendor by issueing CPUID instruction */ /* Get CPU vendor by issueing CPUID instruction */
RtlZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS)); RtlZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_VENDOR_STRING; CpuRegisters.Leaf = CPUID_GET_VENDOR_STRING;
AR::CpuFunc::CpuId(&CpuRegisters); CpuFunc::CpuId(&CpuRegisters);
/* Store CPU vendor in processor control block */ /* Store CPU vendor in processor control block */
Prcb->CpuId.Vendor = (CPU_VENDOR)CpuRegisters.Ebx; Prcb->CpuId.Vendor = (CPU_VENDOR)CpuRegisters.Ebx;
@@ -85,7 +85,7 @@ AR::ProcSup::IdentifyProcessor(VOID)
/* Get CPU standard features */ /* Get CPU standard features */
RtlZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS)); RtlZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_STANDARD1_FEATURES; CpuRegisters.Leaf = CPUID_GET_STANDARD1_FEATURES;
AR::CpuFunc::CpuId(&CpuRegisters); CpuFunc::CpuId(&CpuRegisters);
/* Store CPU signature in processor control block */ /* Store CPU signature in processor control block */
CpuSignature = *(PCPUID_SIGNATURE)&CpuRegisters.Eax; CpuSignature = *(PCPUID_SIGNATURE)&CpuRegisters.Eax;
@@ -97,23 +97,23 @@ AR::ProcSup::IdentifyProcessor(VOID)
if(Prcb->CpuId.Vendor == CPU_VENDOR_AMD) if(Prcb->CpuId.Vendor == CPU_VENDOR_AMD)
{ {
/* AMD CPU */ /* AMD CPU */
if(CpuSignature.Family == 0xF) if(Prcb->CpuId.Family >= 0xF)
{ {
Prcb->CpuId.Family += CpuSignature.ExtendedFamily; Prcb->CpuId.Family = Prcb->CpuId.Family + CpuSignature.ExtendedFamily;
Prcb->CpuId.Model += (CpuSignature.ExtendedModel << 4); Prcb->CpuId.Model = Prcb->CpuId.Model + (CpuSignature.ExtendedModel << 4);
} }
} }
else if(Prcb->CpuId.Vendor == CPU_VENDOR_INTEL) else if(Prcb->CpuId.Vendor == CPU_VENDOR_INTEL)
{ {
/* Intel CPU */ /* Intel CPU */
if(CpuSignature.Family == 0xF) if(Prcb->CpuId.Family == 0xF)
{ {
Prcb->CpuId.Family += CpuSignature.ExtendedFamily; Prcb->CpuId.Family = Prcb->CpuId.Family + CpuSignature.ExtendedFamily;
} }
if((CpuSignature.Family == 0x6) || (CpuSignature.Family == 0xF)) if((Prcb->CpuId.Family == 0x6) || (Prcb->CpuId.Family == 0xF))
{ {
Prcb->CpuId.Model += (CpuSignature.ExtendedModel << 4); Prcb->CpuId.Model = Prcb->CpuId.Model + (CpuSignature.ExtendedModel << 4);
} }
} }
else else
@@ -136,8 +136,8 @@ XTAPI
VOID VOID
AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures) AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
{ {
PVOID KernelBootStack, KernelFaultStack, KernelNmiStack;
KDESCRIPTOR GdtDescriptor, IdtDescriptor; KDESCRIPTOR GdtDescriptor, IdtDescriptor;
PVOID KernelBootStack, KernelFaultStack;
PKPROCESSOR_BLOCK ProcessorBlock; PKPROCESSOR_BLOCK ProcessorBlock;
PKGDTENTRY Gdt; PKGDTENTRY Gdt;
PKIDTENTRY Idt; PKIDTENTRY Idt;
@@ -148,7 +148,7 @@ AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
{ {
/* Assign CPU structures from provided buffer */ /* Assign CPU structures from provided buffer */
InitializeProcessorStructures(ProcessorStructures, &Gdt, &Tss, &ProcessorBlock, InitializeProcessorStructures(ProcessorStructures, &Gdt, &Tss, &ProcessorBlock,
&KernelBootStack, &KernelFaultStack, &KernelNmiStack); &KernelBootStack, &KernelFaultStack);
/* Use global IDT */ /* Use global IDT */
Idt = InitialIdt; Idt = InitialIdt;
@@ -159,9 +159,8 @@ AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
Gdt = InitialGdt; Gdt = InitialGdt;
Idt = InitialIdt; Idt = InitialIdt;
Tss = &InitialTss; Tss = &InitialTss;
KernelBootStack = (PVOID)((ULONG_PTR)&BootStack + KERNEL_STACK_SIZE); KernelBootStack = &BootStack;
KernelFaultStack = (PVOID)((ULONG_PTR)&FaultStack + KERNEL_STACK_SIZE); KernelFaultStack = &FaultStack;
KernelNmiStack = (PVOID)((ULONG_PTR)&NmiStack + KERNEL_STACK_SIZE);
ProcessorBlock = &InitialProcessorBlock; ProcessorBlock = &InitialProcessorBlock;
} }
@@ -171,7 +170,7 @@ AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
/* Initialize GDT, IDT and TSS */ /* Initialize GDT, IDT and TSS */
InitializeGdt(ProcessorBlock); InitializeGdt(ProcessorBlock);
InitializeIdt(ProcessorBlock); InitializeIdt(ProcessorBlock);
InitializeTss(ProcessorBlock, KernelBootStack, KernelFaultStack, KernelNmiStack); InitializeTss(ProcessorBlock, KernelBootStack, KernelFaultStack);
/* Set GDT and IDT descriptors */ /* Set GDT and IDT descriptors */
GdtDescriptor.Base = Gdt; GdtDescriptor.Base = Gdt;
@@ -180,9 +179,9 @@ AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
IdtDescriptor.Limit = (IDT_ENTRIES * sizeof(KIDTENTRY)) - 1; IdtDescriptor.Limit = (IDT_ENTRIES * sizeof(KIDTENTRY)) - 1;
/* Load GDT, IDT and TSS */ /* Load GDT, IDT and TSS */
AR::CpuFunc::LoadGlobalDescriptorTable(&GdtDescriptor.Limit); CpuFunc::LoadGlobalDescriptorTable(&GdtDescriptor.Limit);
AR::CpuFunc::LoadInterruptDescriptorTable(&IdtDescriptor.Limit); CpuFunc::LoadInterruptDescriptorTable(&IdtDescriptor.Limit);
AR::CpuFunc::LoadTaskRegister((UINT)KGDT_SYS_TSS); CpuFunc::LoadTaskRegister((UINT)KGDT_SYS_TSS);
/* Enter passive IRQ level */ /* Enter passive IRQ level */
HL::RunLevel::SetRunLevel(PASSIVE_LEVEL); HL::RunLevel::SetRunLevel(PASSIVE_LEVEL);
@@ -191,8 +190,8 @@ AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
InitializeSegments(); InitializeSegments();
/* Set GS base */ /* Set GS base */
AR::CpuFunc::WriteModelSpecificRegister(X86_MSR_GSBASE, (ULONGLONG)ProcessorBlock); CpuFunc::WriteModelSpecificRegister(X86_MSR_GSBASE, (ULONGLONG)ProcessorBlock);
AR::CpuFunc::WriteModelSpecificRegister(X86_MSR_KERNEL_GSBASE, (ULONGLONG)ProcessorBlock); CpuFunc::WriteModelSpecificRegister(X86_MSR_KERNEL_GSBASE, (ULONGLONG)ProcessorBlock);
/* Initialize processor registers */ /* Initialize processor registers */
InitializeProcessorRegisters(); InitializeProcessorRegisters();
@@ -250,35 +249,34 @@ AR::ProcSup::InitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
for(Vector = 0; Vector < IDT_ENTRIES; Vector++) for(Vector = 0; Vector < IDT_ENTRIES; Vector++)
{ {
/* Set the IDT to handle unexpected interrupts */ /* Set the IDT to handle unexpected interrupts */
SetIdtGate(ProcessorBlock->IdtBase, Vector, (PVOID)ArInterruptEntry[Vector], KGDT_R0_CODE, SetIdtGate(ProcessorBlock->IdtBase, Vector, (PVOID)ArTrap0xFF, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
} }
/* Setup IDT handlers for known interrupts and traps */ /* Setup IDT handlers for known interrupts and traps */
SetIdtGate(ProcessorBlock->IdtBase, 0x00, (PVOID)ArTrapEntry[0x00], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x00, (PVOID)ArTrap0x00, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x01, (PVOID)ArTrapEntry[0x01], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x01, (PVOID)ArTrap0x01, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x02, (PVOID)ArTrapEntry[0x02], KGDT_R0_CODE, KIDT_IST_NMI, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x02, (PVOID)ArTrap0x02, KGDT_R0_CODE, KIDT_IST_PANIC, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x03, (PVOID)ArTrapEntry[0x03], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x03, (PVOID)ArTrap0x03, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x04, (PVOID)ArTrapEntry[0x04], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x04, (PVOID)ArTrap0x04, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x05, (PVOID)ArTrapEntry[0x05], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x05, (PVOID)ArTrap0x05, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x06, (PVOID)ArTrapEntry[0x06], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x06, (PVOID)ArTrap0x06, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x07, (PVOID)ArTrapEntry[0x07], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x07, (PVOID)ArTrap0x07, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x08, (PVOID)ArTrapEntry[0x08], KGDT_R0_CODE, KIDT_IST_PANIC, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x08, (PVOID)ArTrap0x08, KGDT_R0_CODE, KIDT_IST_PANIC, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x09, (PVOID)ArTrapEntry[0x09], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x09, (PVOID)ArTrap0x09, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0A, (PVOID)ArTrapEntry[0x0A], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x0A, (PVOID)ArTrap0x0A, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0B, (PVOID)ArTrapEntry[0x0B], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x0B, (PVOID)ArTrap0x0B, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0C, (PVOID)ArTrapEntry[0x0C], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x0C, (PVOID)ArTrap0x0C, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0D, (PVOID)ArTrapEntry[0x0D], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x0D, (PVOID)ArTrap0x0D, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0E, (PVOID)ArTrapEntry[0x0E], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x0E, (PVOID)ArTrap0x0E, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x10, (PVOID)ArTrapEntry[0x10], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x10, (PVOID)ArTrap0x10, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x11, (PVOID)ArTrapEntry[0x11], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x11, (PVOID)ArTrap0x11, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x12, (PVOID)ArTrapEntry[0x12], KGDT_R0_CODE, KIDT_IST_MCA, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x12, (PVOID)ArTrap0x12, KGDT_R0_CODE, KIDT_IST_MCA, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x13, (PVOID)ArTrapEntry[0x13], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x13, (PVOID)ArTrap0x13, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x1F, (PVOID)ArTrapEntry[0x1F], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x1F, (PVOID)ArTrap0x1F, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x2C, (PVOID)ArTrapEntry[0x2C], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x2C, (PVOID)ArTrap0x2C, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2D, (PVOID)ArTrapEntry[0x2D], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3, AMD64_TRAP_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x2D, (PVOID)ArTrap0x2D, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2F, (PVOID)ArTrapEntry[0x2F], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x2F, (PVOID)ArTrap0x2F, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0xE1, (PVOID)ArInterruptEntry[0xE1], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0xE1, (PVOID)ArTrap0xE1, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
} }
/** /**
@@ -357,45 +355,45 @@ AR::ProcSup::InitializeProcessorRegisters(VOID)
ULONGLONG PatAttributes; ULONGLONG PatAttributes;
/* Enable FXSAVE restore */ /* Enable FXSAVE restore */
AR::CpuFunc::WriteControlRegister(4, AR::CpuFunc::ReadControlRegister(4) | CR4_FXSR); CpuFunc::WriteControlRegister(4, CpuFunc::ReadControlRegister(4) | CR4_FXSR);
/* Enable XMMI exceptions */ /* Enable XMMI exceptions */
AR::CpuFunc::WriteControlRegister(4, AR::CpuFunc::ReadControlRegister(4) | CR4_XMMEXCPT); CpuFunc::WriteControlRegister(4, CpuFunc::ReadControlRegister(4) | CR4_XMMEXCPT);
/* Set debugger extension */ /* Set debugger extension */
AR::CpuFunc::WriteControlRegister(4, AR::CpuFunc::ReadControlRegister(4) | CR4_DE); CpuFunc::WriteControlRegister(4, CpuFunc::ReadControlRegister(4) | CR4_DE);
/* Enable large pages */ /* Enable large pages */
AR::CpuFunc::WriteControlRegister(4, AR::CpuFunc::ReadControlRegister(4) | CR4_PSE); CpuFunc::WriteControlRegister(4, CpuFunc::ReadControlRegister(4) | CR4_PSE);
/* Enable write-protection */ /* Enable write-protection */
AR::CpuFunc::WriteControlRegister(0, AR::CpuFunc::ReadControlRegister(0) | CR0_WP); CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) | CR0_WP);
/* Set alignment mask */ /* Set alignment mask */
AR::CpuFunc::WriteControlRegister(0, AR::CpuFunc::ReadControlRegister(0) | CR0_AM); CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) | CR0_AM);
/* Disable FPU monitoring */ /* Disable FPU monitoring */
AR::CpuFunc::WriteControlRegister(0, AR::CpuFunc::ReadControlRegister(0) & ~CR0_MP); CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) & ~CR0_MP);
/* Disable x87 FPU exceptions */ /* Disable x87 FPU exceptions */
AR::CpuFunc::WriteControlRegister(0, AR::CpuFunc::ReadControlRegister(0) & ~CR0_NE); CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) & ~CR0_NE);
/* Flush the TLB */ /* Flush the TLB */
AR::CpuFunc::FlushTlb(); CpuFunc::FlushTlb();
/* Initialize system call MSRs */ /* Initialize system call MSRs */
AR::Traps::InitializeSystemCallMsrs(); Traps::InitializeSystemCallMsrs();
/* Enable No-Execute (NXE) in EFER MSR */ /* Enable No-Execute (NXE) in EFER MSR */
AR::CpuFunc::WriteModelSpecificRegister(X86_MSR_EFER, CpuFunc::ReadModelSpecificRegister(X86_MSR_EFER) | X86_MSR_EFER_NXE); CpuFunc::WriteModelSpecificRegister(X86_MSR_EFER, CpuFunc::ReadModelSpecificRegister(X86_MSR_EFER) | X86_MSR_EFER_NXE);
/* Initialize Page Attribute Table */ /* Initialize Page Attribute Table */
PatAttributes = (PAT_TYPE_WB << 0) | (PAT_TYPE_USWC << 8) | (PAT_TYPE_WEAK_UC << 16) | (PAT_TYPE_STRONG_UC << 24) | PatAttributes = (PAT_TYPE_WB << 0) | (PAT_TYPE_USWC << 8) | (PAT_TYPE_WEAK_UC << 16) | (PAT_TYPE_STRONG_UC << 24) |
(PAT_TYPE_WB << 32) | (PAT_TYPE_USWC << 40) | (PAT_TYPE_WEAK_UC << 48) | (PAT_TYPE_STRONG_UC << 56); (PAT_TYPE_WB << 32) | (PAT_TYPE_USWC << 40) | (PAT_TYPE_WEAK_UC << 48) | (PAT_TYPE_STRONG_UC << 56);
AR::CpuFunc::WriteModelSpecificRegister(X86_MSR_PAT, PatAttributes); CpuFunc::WriteModelSpecificRegister(X86_MSR_PAT, PatAttributes);
/* Initialize MXCSR register */ /* Initialize MXCSR register */
AR::CpuFunc::LoadMxcsrRegister(INITIAL_MXCSR); CpuFunc::LoadMxcsrRegister(INITIAL_MXCSR);
} }
/** /**
@@ -430,8 +428,7 @@ AR::ProcSup::InitializeProcessorStructures(IN PVOID ProcessorStructures,
OUT PKTSS *Tss, OUT PKTSS *Tss,
OUT PKPROCESSOR_BLOCK *ProcessorBlock, OUT PKPROCESSOR_BLOCK *ProcessorBlock,
OUT PVOID *KernelBootStack, OUT PVOID *KernelBootStack,
OUT PVOID *KernelFaultStack, OUT PVOID *KernelFaultStack)
OUT PVOID *KernelNmiStack)
{ {
UINT_PTR Address; UINT_PTR Address;
@@ -442,12 +439,8 @@ AR::ProcSup::InitializeProcessorStructures(IN PVOID ProcessorStructures,
*KernelBootStack = (PVOID)Address; *KernelBootStack = (PVOID)Address;
Address += KERNEL_STACK_SIZE; Address += KERNEL_STACK_SIZE;
/* Assign a space for kernel fault stack and advance */ /* Assign a space for kernel fault stack, no advance needed as stack grows down */
*KernelFaultStack = (PVOID)Address; *KernelFaultStack = (PVOID)Address;
Address += KERNEL_STACK_SIZE;
/* Assign a space for kernel NMI stack, no advance needed as stack grows down */
*KernelNmiStack = (PVOID)Address;
/* Assign a space for GDT and advance */ /* Assign a space for GDT and advance */
*Gdt = (PKGDTENTRY)(PVOID)Address; *Gdt = (PKGDTENTRY)(PVOID)Address;
@@ -473,12 +466,12 @@ VOID
AR::ProcSup::InitializeSegments(VOID) AR::ProcSup::InitializeSegments(VOID)
{ {
/* Initialize segments */ /* Initialize segments */
AR::CpuFunc::LoadSegment(SEGMENT_CS, KGDT_R0_CODE); CpuFunc::LoadSegment(SEGMENT_CS, KGDT_R0_CODE);
AR::CpuFunc::LoadSegment(SEGMENT_DS, KGDT_R3_DATA | RPL_MASK); CpuFunc::LoadSegment(SEGMENT_DS, KGDT_R3_DATA | RPL_MASK);
AR::CpuFunc::LoadSegment(SEGMENT_ES, KGDT_R3_DATA | RPL_MASK); CpuFunc::LoadSegment(SEGMENT_ES, KGDT_R3_DATA | RPL_MASK);
AR::CpuFunc::LoadSegment(SEGMENT_FS, KGDT_R3_CMTEB | RPL_MASK); CpuFunc::LoadSegment(SEGMENT_FS, KGDT_R3_CMTEB | RPL_MASK);
AR::CpuFunc::LoadSegment(SEGMENT_GS, KGDT_R3_DATA | RPL_MASK); CpuFunc::LoadSegment(SEGMENT_GS, KGDT_R3_DATA | RPL_MASK);
AR::CpuFunc::LoadSegment(SEGMENT_SS, KGDT_R0_DATA); CpuFunc::LoadSegment(SEGMENT_SS, KGDT_R0_DATA);
} }
/** /**
@@ -498,8 +491,7 @@ XTAPI
VOID VOID
AR::ProcSup::InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock, AR::ProcSup::InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelBootStack, IN PVOID KernelBootStack,
IN PVOID KernelFaultStack, IN PVOID KernelFaultStack)
IN PVOID KernelNmiStack)
{ {
/* Fill TSS with zeroes */ /* Fill TSS with zeroes */
RtlZeroMemory(ProcessorBlock->TssBase, sizeof(KTSS)); RtlZeroMemory(ProcessorBlock->TssBase, sizeof(KTSS));
@@ -509,7 +501,6 @@ AR::ProcSup::InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
ProcessorBlock->TssBase->Rsp0 = (ULONG_PTR)KernelBootStack; ProcessorBlock->TssBase->Rsp0 = (ULONG_PTR)KernelBootStack;
ProcessorBlock->TssBase->Ist[KIDT_IST_PANIC] = (ULONG_PTR)KernelFaultStack; ProcessorBlock->TssBase->Ist[KIDT_IST_PANIC] = (ULONG_PTR)KernelFaultStack;
ProcessorBlock->TssBase->Ist[KIDT_IST_MCA] = (ULONG_PTR)KernelFaultStack; ProcessorBlock->TssBase->Ist[KIDT_IST_MCA] = (ULONG_PTR)KernelFaultStack;
ProcessorBlock->TssBase->Ist[KIDT_IST_NMI] = (ULONG_PTR)KernelNmiStack;
} }
/** /**
@@ -645,9 +636,6 @@ AR::ProcSup::SetGdtEntryBase(IN PKGDTENTRY Gdt,
* @param Access * @param Access
* Supplies the gate access rights. * Supplies the gate access rights.
* *
* @param Type
* Supplies the gate type.
*
* @return This routine does not return any value. * @return This routine does not return any value.
* *
* @since XT 1.0 * @since XT 1.0
@@ -659,22 +647,15 @@ AR::ProcSup::SetIdtGate(IN PKIDTENTRY Idt,
IN PVOID Handler, IN PVOID Handler,
IN USHORT Selector, IN USHORT Selector,
IN USHORT Ist, IN USHORT Ist,
IN USHORT Dpl, IN USHORT Access)
IN USHORT Type)
{ {
/* Set the handler's address */ /* Setup the gate */
Idt[Vector].OffsetLow = ((ULONG_PTR)Handler & 0xFFFF); Idt[Vector].OffsetLow = ((ULONG_PTR)Handler & 0xFFFF);
Idt[Vector].OffsetMiddle = (((ULONG_PTR)Handler >> 16) & 0xFFFF); Idt[Vector].OffsetMiddle = (((ULONG_PTR)Handler >> 16) & 0xFFFF);
Idt[Vector].OffsetHigh = (ULONG_PTR)Handler >> 32; Idt[Vector].OffsetHigh = (ULONG_PTR)Handler >> 32;
Idt[Vector].Dpl = Access;
/* Set the code segment selector */
Idt[Vector].Selector = Selector;
/* Initialize the gate's attributes and flags */
Idt[Vector].Access = 0;
Idt[Vector].Dpl = Dpl;
Idt[Vector].IstIndex = Ist; Idt[Vector].IstIndex = Ist;
Idt[Vector].Present = 1; Idt[Vector].Present = 1;
Idt[Vector].Reserved1 = 0; Idt[Vector].Selector = Selector;
Idt[Vector].Type = Type; Idt[Vector].Type = 0xE;
} }

View File

@@ -9,44 +9,6 @@
#include <xtos.hh> #include <xtos.hh>
/**
* Dispatches the interrupt provided by common interrupt handler.
*
* @param TrapFrame
* Supplies a kernel trap frame pushed by common interrupt handler on the stack.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
AR::Traps::DispatchInterrupt(IN PKTRAP_FRAME TrapFrame)
{
PINTERRUPT_HANDLER Handler;
/* Read the handler pointer from the CPU's interrupt dispatch table */
Handler = (PINTERRUPT_HANDLER)AR::CpuFunc::ReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, InterruptDispatchTable) +
(TrapFrame->Vector * sizeof(PINTERRUPT_HANDLER)));
/* Check if the interrupt has a handler registered */
if(Handler != NULLPTR)
{
/* Call the handler */
Handler(TrapFrame);
}
else if(UnhandledInterruptRoutine != NULLPTR)
{
/* Call the unhandled interrupt routine */
UnhandledInterruptRoutine(TrapFrame);
}
else
{
/* Dispatcher not initialized, print a debug message */
DebugPrint(L"ERROR: Caught unhandled interrupt: 0x%.2llX\n", TrapFrame->Vector);
}
}
/** /**
* Dispatches the trap provided by common trap handler. * Dispatches the trap provided by common trap handler.
* *
@@ -265,6 +227,7 @@ VOID
AR::Traps::HandleTrap02(IN PKTRAP_FRAME TrapFrame) AR::Traps::HandleTrap02(IN PKTRAP_FRAME TrapFrame)
{ {
DebugPrint(L"Handled Non-Maskable-Interrupt (0x02)!\n"); DebugPrint(L"Handled Non-Maskable-Interrupt (0x02)!\n");
KE::Crash::Panic(0x02);
} }
/** /**
@@ -682,19 +645,19 @@ AR::Traps::InitializeSystemCallMsrs(VOID)
} }
/** /**
* Sets the unhandled interrupt routine used for vectors that have no handler registered. * C-linkage wrapper for dispatching the trap provided by common trap handler.
* *
* @param Handler * @param TrapFrame
* Supplies the pointer to the interrupt handler routine. * Supplies a kernel trap frame pushed by common trap handler on the stack.
* *
* @return This routine does not return any value. * @return This routine does not return any value.
* *
* @since XT 1.0 * @since XT 1.0
*/ */
XTAPI XTCLINK
XTCDECL
VOID VOID
AR::Traps::SetUnhandledInterruptRoutine(PINTERRUPT_HANDLER Handler) ArDispatchTrap(IN PKTRAP_FRAME TrapFrame)
{ {
/* Set the unhandled interrupt routine */ AR::Traps::DispatchTrap(TrapFrame);
UnhandledInterruptRoutine = Handler;
} }

View File

@@ -4,69 +4,31 @@
* FILE: xtoskrnl/ar/i686/archsup.S * FILE: xtoskrnl/ar/i686/archsup.S
* DESCRIPTION: Provides i686 architecture features not implementable in C. * DESCRIPTION: Provides i686 architecture features not implementable in C.
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org> * DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <harraiken91@gmail.com>
*/ */
#include <xtkmapi.h> #include <ar/i686/asmsup.h>
#include <xtadk.h>
.altmacro .altmacro
.text .text
/** /**
* Creates a task, trap or interrupt handler for the specified vector. * This macro creates a trap handler for the specified vector.
* *
* @param Vector * @param Vector
* Supplies a vector number. * Supplies a trap vector number.
*
* @param Type
* Specifies whether the handler is designed to handle an interrupt, a task or a trap.
* *
* @return This macro does not return any value. * @return This macro does not return any value.
* *
* @since XT 1.0 * @since XT 1.0
*/ */
.macro ArCreateHandler Vector Type .macro ArCreateTrapHandler Vector
.global _Ar\Type\Vector .global _ArTrap\Vector
_Ar\Type\Vector: _ArTrap\Vector:
/* Check handler type */ /* Push fake error code for non-error vectors */
.ifc \Type,Task
_Ar\Type\Vector\()Start:
/* Clear the Task Switch flag */
clts
/* Allocate the trap frame and inject the hardware vector for the dispatcher */
sub $KTRAP_FRAME_SIZE, %esp
movl $\Vector, KTRAP_FRAME_Vector(%esp)
/* Pass the trap frame pointer as an argument and clear the direction flag */
push %esp
cld
/* Pass control to the trap dispatcher */
call _ArDispatchTrap
/* Discard the argument and deallocate the trap frame */
add $4, %esp
add $KTRAP_FRAME_SIZE, %esp
/* Hardware task return */
iretl
/* Spin back to the entry point to rearm the task gate */
jmp _Ar\Type\Vector\()Start
.else
/* Check handler type */
.ifc \Type,Trap
/* Push fake error code for non-error vector traps */
.if \Vector != 8 && \Vector != 10 && \Vector != 11 && \Vector != 12 && \Vector != 13 && \Vector != 14 && \Vector != 17 && \Vector != 30 .if \Vector != 8 && \Vector != 10 && \Vector != 11 && \Vector != 12 && \Vector != 13 && \Vector != 14 && \Vector != 17 && \Vector != 30
push $0 push $0
.endif .endif
.else
/* Push fake error code for interrupts */
push $0
.endif
/* Push vector number */ /* Push vector number */
push $\Vector push $\Vector
@@ -81,81 +43,66 @@ _Ar\Type\Vector\()Start:
push %eax push %eax
/* Reserve space for other registers and point RBP to the trap frame */ /* Reserve space for other registers and point RBP to the trap frame */
sub $(KTRAP_FRAME_SIZE - KTRAP_FRAME_REGISTERS_SIZE), %esp sub $(TRAP_FRAME_SIZE - TRAP_REGISTERS_SIZE), %esp
lea (%esp), %ebp lea (%esp), %ebp
/* Store segment selectors */ /* Store segment selectors */
mov %gs, KTRAP_FRAME_SegGs(%ebp) mov %gs, TrapSegGs(%ebp)
mov %fs, KTRAP_FRAME_SegFs(%ebp) mov %fs, TrapSegFs(%ebp)
mov %es, KTRAP_FRAME_SegEs(%ebp) mov %es, TrapSegEs(%ebp)
mov %ds, KTRAP_FRAME_SegDs(%ebp) mov %ds, TrapSegDs(%ebp)
/* Store debug registers */ /* Store debug registers */
mov %dr7, %eax mov %dr7, %eax
mov %eax, KTRAP_FRAME_Dr7(%ebp) mov %eax, TrapDr7(%ebp)
mov %dr6, %eax mov %dr6, %eax
mov %eax, KTRAP_FRAME_Dr6(%ebp) mov %eax, TrapDr6(%ebp)
mov %dr3, %eax mov %dr3, %eax
mov %eax, KTRAP_FRAME_Dr3(%ebp) mov %eax, TrapDr3(%ebp)
mov %dr2, %eax mov %dr2, %eax
mov %eax, KTRAP_FRAME_Dr2(%ebp) mov %eax, TrapDr2(%ebp)
mov %dr1, %eax mov %dr1, %eax
mov %eax, KTRAP_FRAME_Dr1(%ebp) mov %eax, TrapDr1(%ebp)
mov %dr0, %eax mov %dr0, %eax
mov %eax, KTRAP_FRAME_Dr0(%ebp) mov %eax, TrapDr0(%ebp)
/* Store CR2 and CR3 */ /* Store CR2 and CR3 */
mov %cr3, %eax mov %cr3, %eax
mov %eax, KTRAP_FRAME_Cr3(%ebp) mov %eax, TrapCr3(%ebp)
mov %cr2, %eax mov %cr2, %eax
mov %eax, KTRAP_FRAME_Cr2(%ebp) mov %eax, TrapCr2(%ebp)
/* Test previous mode */ /* Test previous mode and swap GS if needed */
movl $0, KTRAP_FRAME_PreviousMode(%ebp) movl $0, TrapPreviousMode(%ebp)
mov KTRAP_FRAME_SegCs(%ebp), %ax mov %cs, %ax
and $3, %al and $1, %al
mov %al, KTRAP_FRAME_PreviousMode(%ebp) mov %al, TrapPreviousMode(%ebp)
jz Dispatch\Type\Vector jz KernelMode$\Vector
swapgs
/* Load Kernel PB selector into FS */ KernelMode$\Vector:
mov $KGDT_R0_PB, %ax /* Push Frame Pointer, clear direction flag and pass to trap dispatcher */
mov %ax, %fs
/* Set sane data segment selectors */
mov $(KGDT_R3_DATA | RPL_MASK), %ax
mov %ax, %ds
mov %ax, %es
Dispatch\Type\Vector:
/* Push Frame Pointer and clear direction flag */
push %esp push %esp
cld cld
.ifc \Type,Trap
/* Pass to the trap dispatcher */
call _ArDispatchTrap call _ArDispatchTrap
.else
/* Pass to the interrupt dispatcher */
call _ArDispatchInterrupt
.endif
/* Clean up the stack */ /* Clean up the stack */
add $4, %esp add $4, %esp
/* Test previous mode and disable interrupts before user mode return */ /* Test previous mode and swapgs if needed */
testb $1, KTRAP_FRAME_PreviousMode(%ebp) testb $1, TrapPreviousMode(%ebp)
jz RestoreState\Type\Vector jz KernelModeReturn$\Vector
cli cli
swapgs
RestoreState\Type\Vector: KernelModeReturn$\Vector:
/* Restore segment selectors */ /* Restore segment selectors */
mov KTRAP_FRAME_SegDs(%ebp), %ds mov TrapSegDs(%ebp), %ds
mov KTRAP_FRAME_SegEs(%ebp), %es mov TrapSegEs(%ebp), %es
mov KTRAP_FRAME_SegFs(%ebp), %fs mov TrapSegFs(%ebp), %fs
mov KTRAP_FRAME_SegGs(%ebp), %gs
/* Free stack space */ /* Free stack space */
add $(KTRAP_FRAME_SIZE - KTRAP_FRAME_REGISTERS_SIZE), %esp add $(TRAP_FRAME_SIZE - TRAP_REGISTERS_SIZE), %esp
/* Pop General Purpose Registers */ /* Pop General Purpose Registers */
pop %eax pop %eax
@@ -169,79 +116,11 @@ RestoreState\Type\Vector:
/* Skip error code and vector number, then return */ /* Skip error code and vector number, then return */
add $(2 * 4), %esp add $(2 * 4), %esp
iretl iretl
.endif
.endm .endm
/* Populate common interrupt, task and trap handlers */ /* Populate common trap handlers */
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F .irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F .irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
ArCreateHandler 0x\i\j Interrupt ArCreateTrapHandler 0x\i\j
.if 0x\i\j == 0x02 || 0x\i\j == 0x08
ArCreateHandler 0x\i\j Task
.else
ArCreateHandler 0x\i\j Trap
.endif
.endr .endr
.endr .endr
/* Define array of pointers to the interrupt handlers */
.global _ArInterruptEntry
_ArInterruptEntry:
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.long _ArInterrupt0x\i\j
.endr
.endr
/* Define array of pointers to the trap handlers */
.global _ArTrapEntry
_ArTrapEntry:
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.if 0x\i\j == 0x02 || 0x\i\j == 0x08
.long _ArTask0x\i\j
.else
.long _ArTrap0x\i\j
.endif
.endr
.endr
/**
* Enables eXtended Physical Addressing (XPA). On i386, this is just a stub.
*
* @param PageMap
* Supplies a pointer to the page map to be used.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global ArEnableExtendedPhysicalAddressing
ArEnableExtendedPhysicalAddressing:
.global ArEnableExtendedPhysicalAddressingEnd
ArEnableExtendedPhysicalAddressingEnd:
/**
* Handles a spurious interrupt allowing it to end up.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global _ArHandleSpuriousInterrupt
_ArHandleSpuriousInterrupt:
iret
/**
* Starts an application processor (AP). This is just a stub.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global _ArStartApplicationProcessor
_ArStartApplicationProcessor:
.global _ArStartApplicationProcessorEnd
_ArStartApplicationProcessorEnd:

26
xtoskrnl/ar/i686/boot.S Normal file
View File

@@ -0,0 +1,26 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/i686/boot.S
* DESCRIPTION: i686-specific boot code for setting up the low-level CPU environment
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <ar/amd64/asmsup.h>
.altmacro
.text
/**
* Starts an application processor (AP). This is just a stub.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global _ArStartApplicationProcessor
_ArStartApplicationProcessor:
.global _ArStartApplicationProcessorEnd
_ArStartApplicationProcessorEnd:

View File

@@ -543,33 +543,6 @@ AR::CpuFunc::ReadTimeStampCounter(VOID)
return Value; return Value;
} }
/**
* Reads the current value of the CPU's time-stamp counter and processor ID.
*
* @param TscAux
* Supplies a pointer to a variable that receives the auxiliary TSC information (IA32_TSC_AUX).
*
* @return This routine returns the current instruction cycle count since the processor was last reset.
*
* @since XT 1.0
*/
XTCDECL
ULONGLONG
AR::CpuFunc::ReadTimeStampCounterProcessor(OUT PULONG TscAux)
{
ULONG Low, High;
/* Execute the RDTSCP instruction */
__asm__ volatile("rdtscp"
: "=a" (Low),
"=d" (High),
"=c" (*TscAux)
);
/* Combine the two 32-bit registers into a single 64-bit unsigned integer and return the value */
return ((ULONGLONG)High << 32) | Low;
}
/** /**
* Orders memory accesses as seen by other processors, without fence. * Orders memory accesses as seen by other processors, without fence.
* *

View File

@@ -30,11 +30,5 @@ KPROCESSOR_BLOCK AR::ProcSup::InitialProcessorBlock;
/* Initial TSS */ /* Initial TSS */
KTSS AR::ProcSup::InitialTss; KTSS AR::ProcSup::InitialTss;
/* Initial kernel NMI stack */
UCHAR AR::ProcSup::NmiStack[KERNEL_STACK_SIZE] = {};
/* NMI task gate */ /* NMI task gate */
UCHAR AR::ProcSup::NonMaskableInterruptTss[KTSS_IO_MAPS]; UCHAR AR::ProcSup::NonMaskableInterruptTss[KTSS_IO_MAPS];
/* Unhandled interrupt routine */
PINTERRUPT_HANDLER AR::Traps::UnhandledInterruptRoutine = NULLPTR;

View File

@@ -20,7 +20,7 @@ XTAPI
PVOID PVOID
AR::ProcSup::GetBootStack(VOID) AR::ProcSup::GetBootStack(VOID)
{ {
return (PVOID)((ULONG_PTR)BootStack + KERNEL_STACK_SIZE); return (PVOID)BootStack;
} }
XTAPI XTAPI
@@ -68,7 +68,7 @@ AR::ProcSup::IdentifyProcessor(VOID)
/* Get CPU vendor by issueing CPUID instruction */ /* Get CPU vendor by issueing CPUID instruction */
RtlZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS)); RtlZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_VENDOR_STRING; CpuRegisters.Leaf = CPUID_GET_VENDOR_STRING;
AR::CpuFunc::CpuId(&CpuRegisters); CpuFunc::CpuId(&CpuRegisters);
/* Store CPU vendor in processor control block */ /* Store CPU vendor in processor control block */
Prcb->CpuId.Vendor = (CPU_VENDOR)CpuRegisters.Ebx; Prcb->CpuId.Vendor = (CPU_VENDOR)CpuRegisters.Ebx;
@@ -80,7 +80,7 @@ AR::ProcSup::IdentifyProcessor(VOID)
/* Get CPU standard features */ /* Get CPU standard features */
RtlZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS)); RtlZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_STANDARD1_FEATURES; CpuRegisters.Leaf = CPUID_GET_STANDARD1_FEATURES;
AR::CpuFunc::CpuId(&CpuRegisters); CpuFunc::CpuId(&CpuRegisters);
/* Store CPU signature in processor control block */ /* Store CPU signature in processor control block */
CpuSignature = *(PCPUID_SIGNATURE)&CpuRegisters.Eax; CpuSignature = *(PCPUID_SIGNATURE)&CpuRegisters.Eax;
@@ -92,23 +92,23 @@ AR::ProcSup::IdentifyProcessor(VOID)
if(Prcb->CpuId.Vendor == CPU_VENDOR_AMD) if(Prcb->CpuId.Vendor == CPU_VENDOR_AMD)
{ {
/* AMD CPU */ /* AMD CPU */
if(CpuSignature.Family == 0xF) if(Prcb->CpuId.Family >= 0xF)
{ {
Prcb->CpuId.Family += CpuSignature.ExtendedFamily; Prcb->CpuId.Family = Prcb->CpuId.Family + CpuSignature.ExtendedFamily;
Prcb->CpuId.Model += (CpuSignature.ExtendedModel << 4); Prcb->CpuId.Model = Prcb->CpuId.Model + (CpuSignature.ExtendedModel << 4);
} }
} }
else if(Prcb->CpuId.Vendor == CPU_VENDOR_INTEL) else if(Prcb->CpuId.Vendor == CPU_VENDOR_INTEL)
{ {
/* Intel CPU */ /* Intel CPU */
if(CpuSignature.Family == 0xF) if(Prcb->CpuId.Family == 0xF)
{ {
Prcb->CpuId.Family += CpuSignature.ExtendedFamily; Prcb->CpuId.Family = Prcb->CpuId.Family + CpuSignature.ExtendedFamily;
} }
if((CpuSignature.Family == 0x6) || (CpuSignature.Family == 0xF)) if((Prcb->CpuId.Family == 0x6) || (Prcb->CpuId.Family == 0xF))
{ {
Prcb->CpuId.Model += (CpuSignature.ExtendedModel << 4); Prcb->CpuId.Model = Prcb->CpuId.Model + (CpuSignature.ExtendedModel << 4);
} }
} }
else else
@@ -132,7 +132,7 @@ VOID
AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures) AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
{ {
KDESCRIPTOR GdtDescriptor, IdtDescriptor; KDESCRIPTOR GdtDescriptor, IdtDescriptor;
PVOID KernelBootStack, KernelFaultStack, KernelNmiStack; PVOID KernelBootStack, KernelFaultStack;
PKPROCESSOR_BLOCK ProcessorBlock; PKPROCESSOR_BLOCK ProcessorBlock;
PKGDTENTRY Gdt; PKGDTENTRY Gdt;
PKIDTENTRY Idt; PKIDTENTRY Idt;
@@ -143,7 +143,7 @@ AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
{ {
/* Assign CPU structures from provided buffer */ /* Assign CPU structures from provided buffer */
InitializeProcessorStructures(ProcessorStructures, &Gdt, &Tss, &ProcessorBlock, InitializeProcessorStructures(ProcessorStructures, &Gdt, &Tss, &ProcessorBlock,
&KernelBootStack, &KernelFaultStack, &KernelNmiStack); &KernelBootStack, &KernelFaultStack);
/* Use global IDT */ /* Use global IDT */
Idt = InitialIdt; Idt = InitialIdt;
@@ -154,9 +154,8 @@ AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
Gdt = InitialGdt; Gdt = InitialGdt;
Idt = InitialIdt; Idt = InitialIdt;
Tss = &InitialTss; Tss = &InitialTss;
KernelBootStack = (PVOID)((ULONG_PTR)&BootStack + KERNEL_STACK_SIZE); KernelBootStack = &BootStack;
KernelFaultStack = (PVOID)((ULONG_PTR)&FaultStack + KERNEL_STACK_SIZE); KernelFaultStack = &FaultStack;
KernelNmiStack = (PVOID)((ULONG_PTR)&NmiStack + KERNEL_STACK_SIZE);
ProcessorBlock = &InitialProcessorBlock; ProcessorBlock = &InitialProcessorBlock;
} }
@@ -166,7 +165,7 @@ AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
/* Initialize GDT, IDT and TSS */ /* Initialize GDT, IDT and TSS */
InitializeGdt(ProcessorBlock); InitializeGdt(ProcessorBlock);
InitializeIdt(ProcessorBlock); InitializeIdt(ProcessorBlock);
InitializeTss(ProcessorBlock, KernelBootStack, KernelFaultStack, KernelNmiStack); InitializeTss(ProcessorBlock, KernelBootStack, KernelFaultStack);
/* Set GDT and IDT descriptors */ /* Set GDT and IDT descriptors */
GdtDescriptor.Base = Gdt; GdtDescriptor.Base = Gdt;
@@ -175,9 +174,9 @@ AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
IdtDescriptor.Limit = (IDT_ENTRIES * sizeof(KIDTENTRY)) - 1; IdtDescriptor.Limit = (IDT_ENTRIES * sizeof(KIDTENTRY)) - 1;
/* Load GDT, IDT and TSS */ /* Load GDT, IDT and TSS */
AR::CpuFunc::LoadGlobalDescriptorTable(&GdtDescriptor.Limit); CpuFunc::LoadGlobalDescriptorTable(&GdtDescriptor.Limit);
AR::CpuFunc::LoadInterruptDescriptorTable(&IdtDescriptor.Limit); CpuFunc::LoadInterruptDescriptorTable(&IdtDescriptor.Limit);
AR::CpuFunc::LoadTaskRegister((UINT)KGDT_SYS_TSS); CpuFunc::LoadTaskRegister((UINT)KGDT_SYS_TSS);
/* Enter passive IRQ level */ /* Enter passive IRQ level */
HL::RunLevel::SetRunLevel(PASSIVE_LEVEL); HL::RunLevel::SetRunLevel(PASSIVE_LEVEL);
@@ -216,9 +215,9 @@ AR::ProcSup::InitializeGdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_PB, (ULONG_PTR)ProcessorBlock, sizeof(KPROCESSOR_BLOCK), KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 2); SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_PB, (ULONG_PTR)ProcessorBlock, sizeof(KPROCESSOR_BLOCK), KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 2);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_TEB, 0x0, 0xFFF, KGDT_TYPE_DATA | KGDT_DESCRIPTOR_ACCESSED, KGDT_DPL_USER, 2); SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R3_TEB, 0x0, 0xFFF, KGDT_TYPE_DATA | KGDT_DESCRIPTOR_ACCESSED, KGDT_DPL_USER, 2);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_VDM_TILE, 0x0400, 0xFFFF, KGDT_TYPE_DATA, KGDT_DPL_USER, 0); SetGdtEntry(ProcessorBlock->GdtBase, KGDT_VDM_TILE, 0x0400, 0xFFFF, KGDT_TYPE_DATA, KGDT_DPL_USER, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_LDT, 0x0, 0x0, I686_LDT, KGDT_DPL_SYSTEM, 0); SetGdtEntry(ProcessorBlock->GdtBase, KGDT_R0_LDT, 0x0, 0x0, KGDT_TYPE_NONE, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_DF_TSS, 0x20000, 0xFFFF, I686_TSS, KGDT_DPL_SYSTEM, 0); SetGdtEntry(ProcessorBlock->GdtBase, KGDT_DF_TSS, 0x20000, 0xFFFF, I686_TSS, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_NMI_TSS, 0x20000, 0xFFFF, I686_TSS, KGDT_DPL_SYSTEM, 0); SetGdtEntry(ProcessorBlock->GdtBase, KGDT_NMI_TSS, 0x20000, 0xFFFF, KGDT_TYPE_CODE, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_VDBS, 0xB8000, 0x3FFF, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 0); SetGdtEntry(ProcessorBlock->GdtBase, KGDT_VDBS, 0xB8000, 0x3FFF, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 0);
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_ALIAS, (ULONG_PTR)ProcessorBlock->GdtBase, (GDT_ENTRIES * sizeof(KGDTENTRY)) - 1, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 0); SetGdtEntry(ProcessorBlock->GdtBase, KGDT_ALIAS, (ULONG_PTR)ProcessorBlock->GdtBase, (GDT_ENTRIES * sizeof(KGDTENTRY)) - 1, KGDT_TYPE_DATA, KGDT_DPL_SYSTEM, 0);
} }
@@ -243,35 +242,34 @@ AR::ProcSup::InitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
for(Vector = 0; Vector < IDT_ENTRIES; Vector++) for(Vector = 0; Vector < IDT_ENTRIES; Vector++)
{ {
/* Set the IDT to handle unexpected interrupts */ /* Set the IDT to handle unexpected interrupts */
SetIdtGate(ProcessorBlock->IdtBase, Vector, (PVOID)ArInterruptEntry[Vector], SetIdtGate(ProcessorBlock->IdtBase, Vector, (PVOID)ArTrap0xFF, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE);
} }
/* Setup IDT handlers for known interrupts and traps */ /* Setup IDT handlers for known interrupts and traps */
SetIdtGate(ProcessorBlock->IdtBase, 0x00, (PVOID)ArTrapEntry[0x00], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x00, (PVOID)ArTrap0x00, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x01, (PVOID)ArTrapEntry[0x01], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x01, (PVOID)ArTrap0x01, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x02, (PVOID)ArTrapEntry[0x02], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_TASK_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x02, (PVOID)ArTrap0x02, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x03, (PVOID)ArTrapEntry[0x03], KGDT_R0_CODE, 0, KIDT_ACCESS_RING3, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x03, (PVOID)ArTrap0x03, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x04, (PVOID)ArTrapEntry[0x04], KGDT_R0_CODE, 0, KIDT_ACCESS_RING3, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x04, (PVOID)ArTrap0x04, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x05, (PVOID)ArTrapEntry[0x05], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x05, (PVOID)ArTrap0x05, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x06, (PVOID)ArTrapEntry[0x06], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x06, (PVOID)ArTrap0x06, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x07, (PVOID)ArTrapEntry[0x07], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x07, (PVOID)ArTrap0x07, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x08, (PVOID)ArTrapEntry[0x08], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_TASK_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x08, (PVOID)ArTrap0x08, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x09, (PVOID)ArTrapEntry[0x09], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x09, (PVOID)ArTrap0x09, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0A, (PVOID)ArTrapEntry[0x0A], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x0A, (PVOID)ArTrap0x0A, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0B, (PVOID)ArTrapEntry[0x0B], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x0B, (PVOID)ArTrap0x0B, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0C, (PVOID)ArTrapEntry[0x0C], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x0C, (PVOID)ArTrap0x0C, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0D, (PVOID)ArTrapEntry[0x0D], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x0D, (PVOID)ArTrap0x0D, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0E, (PVOID)ArTrapEntry[0x0E], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x0E, (PVOID)ArTrap0x0E, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x10, (PVOID)ArTrapEntry[0x10], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x10, (PVOID)ArTrap0x10, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x11, (PVOID)ArTrapEntry[0x11], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x11, (PVOID)ArTrap0x11, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x12, (PVOID)ArTrapEntry[0x12], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x12, (PVOID)ArTrap0x12, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x13, (PVOID)ArTrapEntry[0x13], KGDT_R0_CODE, 0, KIDT_ACCESS_RING0, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x13, (PVOID)ArTrap0x13, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x2A, (PVOID)ArTrapEntry[0x2A], KGDT_R0_CODE, 0, KIDT_ACCESS_RING3, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x2A, (PVOID)ArTrap0x2A, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2B, (PVOID)ArTrapEntry[0x2B], KGDT_R0_CODE, 0, KIDT_ACCESS_RING3, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x2B, (PVOID)ArTrap0x2B, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2C, (PVOID)ArTrapEntry[0x2C], KGDT_R0_CODE, 0, KIDT_ACCESS_RING3, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x2C, (PVOID)ArTrap0x2C, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2D, (PVOID)ArTrapEntry[0x2D], KGDT_R0_CODE, 0, KIDT_ACCESS_RING3, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x2D, (PVOID)ArTrap0x2D, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2E, (PVOID)ArTrapEntry[0x2E], KGDT_R0_CODE, 0, KIDT_ACCESS_RING3, I686_INTERRUPT_GATE); SetIdtGate(ProcessorBlock->IdtBase, 0x2E, (PVOID)ArTrap0x2E, KGDT_R0_CODE, 0, KIDT_INTERRUPT | KIDT_ACCESS_RING3);
} }
/** /**
@@ -344,10 +342,10 @@ VOID
AR::ProcSup::InitializeProcessorRegisters(VOID) AR::ProcSup::InitializeProcessorRegisters(VOID)
{ {
/* Clear EFLAGS register */ /* Clear EFLAGS register */
AR::CpuFunc::WriteEflagsRegister(0); CpuFunc::WriteEflagsRegister(0);
/* Enable write-protection */ /* Enable write-protection */
AR::CpuFunc::WriteControlRegister(0, AR::CpuFunc::ReadControlRegister(0) | CR0_WP); CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) | CR0_WP);
} }
/** /**
@@ -382,8 +380,7 @@ AR::ProcSup::InitializeProcessorStructures(IN PVOID ProcessorStructures,
OUT PKTSS *Tss, OUT PKTSS *Tss,
OUT PKPROCESSOR_BLOCK *ProcessorBlock, OUT PKPROCESSOR_BLOCK *ProcessorBlock,
OUT PVOID *KernelBootStack, OUT PVOID *KernelBootStack,
OUT PVOID *KernelFaultStack, OUT PVOID *KernelFaultStack)
OUT PVOID *KernelNmiStack)
{ {
UINT_PTR Address; UINT_PTR Address;
@@ -394,12 +391,8 @@ AR::ProcSup::InitializeProcessorStructures(IN PVOID ProcessorStructures,
*KernelBootStack = (PVOID)Address; *KernelBootStack = (PVOID)Address;
Address += KERNEL_STACK_SIZE; Address += KERNEL_STACK_SIZE;
/* Assign a space for kernel fault stack and advance */ /* Assign a space for kernel fault stack, no advance needed as stack grows down */
*KernelFaultStack = (PVOID)Address; *KernelFaultStack = (PVOID)Address;
Address += KERNEL_STACK_SIZE;
/* Assign a space for kernel NMI stack, no advance needed as stack grows down */
*KernelNmiStack = (PVOID)Address;
/* Assign a space for GDT and advance */ /* Assign a space for GDT and advance */
*Gdt = (PKGDTENTRY)(PVOID)Address; *Gdt = (PKGDTENTRY)(PVOID)Address;
@@ -425,12 +418,10 @@ VOID
AR::ProcSup::InitializeSegments(VOID) AR::ProcSup::InitializeSegments(VOID)
{ {
/* Initialize segments */ /* Initialize segments */
AR::CpuFunc::LoadSegment(SEGMENT_CS, KGDT_R0_CODE); CpuFunc::LoadSegment(SEGMENT_CS, KGDT_R0_CODE);
AR::CpuFunc::LoadSegment(SEGMENT_DS, KGDT_R3_DATA | RPL_MASK); CpuFunc::LoadSegment(SEGMENT_DS, KGDT_R3_DATA | RPL_MASK);
AR::CpuFunc::LoadSegment(SEGMENT_ES, KGDT_R3_DATA | RPL_MASK); CpuFunc::LoadSegment(SEGMENT_ES, KGDT_R3_DATA | RPL_MASK);
AR::CpuFunc::LoadSegment(SEGMENT_FS, KGDT_R0_PB); CpuFunc::LoadSegment(SEGMENT_FS, KGDT_R0_PB);
AR::CpuFunc::LoadSegment(SEGMENT_GS, 0);
AR::CpuFunc::LoadSegment(SEGMENT_SS, KGDT_R0_DATA);
} }
/** /**
@@ -447,19 +438,8 @@ XTAPI
VOID VOID
AR::ProcSup::InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock, AR::ProcSup::InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelBootStack, IN PVOID KernelBootStack,
IN PVOID KernelFaultStack, IN PVOID KernelFaultStack)
IN PVOID KernelNmiStack)
{ {
PKGDTENTRY TssEntry;
/* Setup System TSS entry in Global Descriptor Table */
TssEntry = (PKGDTENTRY)(&(ProcessorBlock->GdtBase[KGDT_SYS_TSS / sizeof(KGDTENTRY)]));
TssEntry->LimitLow = sizeof(KTSS) - 1;
TssEntry->Bits.LimitHigh = 0;
TssEntry->Bits.Dpl = 0;
TssEntry->Bits.Present = 1;
TssEntry->Bits.Type = I686_TSS;
/* Clear I/O map */ /* Clear I/O map */
RtlSetMemory(ProcessorBlock->TssBase->IoMaps[0].IoMap, 0xFF, IOPM_FULL_SIZE); RtlSetMemory(ProcessorBlock->TssBase->IoMaps[0].IoMap, 0xFF, IOPM_FULL_SIZE);
@@ -481,16 +461,16 @@ AR::ProcSup::InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
/* Set I/O map base and disable traps */ /* Set I/O map base and disable traps */
ProcessorBlock->TssBase->IoMapBase = sizeof(KTSS); ProcessorBlock->TssBase->IoMapBase = sizeof(KTSS);
ProcessorBlock->TssBase->Esp0 = (ULONG_PTR)KernelBootStack;
ProcessorBlock->TssBase->Flags = 0; ProcessorBlock->TssBase->Flags = 0;
/* Set CR3, LDT and SS */ /* Set LDT and SS */
ProcessorBlock->TssBase->CR3 = AR::CpuFunc::ReadControlRegister(3); ProcessorBlock->TssBase->LDT = KGDT_R0_LDT;
ProcessorBlock->TssBase->LDT = 0;
ProcessorBlock->TssBase->Ss0 = KGDT_R0_DATA; ProcessorBlock->TssBase->Ss0 = KGDT_R0_DATA;
/* Initialize task gates for DoubleFault and NMI traps */ /* Initialize task gates for DoubleFault and NMI traps */
SetDoubleFaultTssEntry(ProcessorBlock, KernelFaultStack); SetDoubleFaultTssEntry(ProcessorBlock, KernelFaultStack);
SetNonMaskableInterruptTssEntry(ProcessorBlock, KernelNmiStack); SetNonMaskableInterruptTssEntry(ProcessorBlock, KernelFaultStack);
} }
/** /**
@@ -522,24 +502,24 @@ AR::ProcSup::SetDoubleFaultTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
Tss = (PKTSS)DoubleFaultTss; Tss = (PKTSS)DoubleFaultTss;
Tss->IoMapBase = sizeof(KTSS); Tss->IoMapBase = sizeof(KTSS);
Tss->Flags = 0; Tss->Flags = 0;
Tss->LDT = 0; Tss->LDT = KGDT_R0_LDT;
Tss->CR3 = AR::CpuFunc::ReadControlRegister(3); Tss->CR3 = CpuFunc::ReadControlRegister(3);
Tss->Esp = (ULONG_PTR)KernelFaultStack; Tss->Esp = (ULONG_PTR)KernelFaultStack;
Tss->Esp0 = (ULONG_PTR)KernelFaultStack; Tss->Esp0 = (ULONG_PTR)KernelFaultStack;
Tss->Eip = (ULONG)(ULONG_PTR)ArTrapEntry[0x08]; Tss->Eip = PtrToUlong(ArTrap0x08);
Tss->Cs = KGDT_R0_CODE; Tss->Cs = KGDT_R0_CODE;
Tss->Ds = KGDT_R3_DATA | RPL_MASK; Tss->Ds = KGDT_R3_DATA | RPL_MASK;
Tss->Es = KGDT_R3_DATA | RPL_MASK; Tss->Es = KGDT_R3_DATA | RPL_MASK;
Tss->Fs = KGDT_R0_PB; Tss->Fs = KGDT_R0_PB;
Tss->Ss = KGDT_R0_DATA;
Tss->Ss0 = KGDT_R0_DATA; Tss->Ss0 = KGDT_R0_DATA;
CpuFunc::StoreSegment(SEGMENT_SS, (PVOID)&Tss->Ss);
/* Setup DoubleFault TSS entry in Global Descriptor Table */ /* Setup DoubleFault TSS entry in Global Descriptor Table */
TssEntry = (PKGDTENTRY)(&(ProcessorBlock->GdtBase[KGDT_DF_TSS / sizeof(KGDTENTRY)])); TssEntry = (PKGDTENTRY)(&(ProcessorBlock->GdtBase[KGDT_DF_TSS / sizeof(KGDTENTRY)]));
TssEntry->BaseLow = ((ULONG_PTR)Tss & 0xFFFF); TssEntry->BaseLow = ((ULONG_PTR)Tss & 0xFFFF);
TssEntry->Bytes.BaseMiddle = ((ULONG_PTR)Tss >> 16); TssEntry->Bytes.BaseMiddle = ((ULONG_PTR)Tss >> 16);
TssEntry->Bytes.BaseHigh = ((ULONG_PTR)Tss >> 24); TssEntry->Bytes.BaseHigh = ((ULONG_PTR)Tss >> 24);
TssEntry->LimitLow = 0x68; TssEntry->LimitLow = sizeof(KTSS) - 1;
TssEntry->Bits.LimitHigh = 0; TssEntry->Bits.LimitHigh = 0;
TssEntry->Bits.Dpl = 0; TssEntry->Bits.Dpl = 0;
TssEntry->Bits.Present = 1; TssEntry->Bits.Present = 1;
@@ -676,9 +656,6 @@ AR::ProcSup::SetGdtEntryBase(IN PKGDTENTRY Gdt,
* @param Access * @param Access
* Supplies the gate access rights. * Supplies the gate access rights.
* *
* @param Type
* Supplies the gate type.
*
* @return This routine does not return any value. * @return This routine does not return any value.
* *
* @since XT 1.0 * @since XT 1.0
@@ -690,21 +667,13 @@ AR::ProcSup::SetIdtGate(IN PKIDTENTRY Idt,
IN PVOID Handler, IN PVOID Handler,
IN USHORT Selector, IN USHORT Selector,
IN USHORT Ist, IN USHORT Ist,
IN USHORT Dpl, IN USHORT Access)
IN USHORT Type)
{ {
/* Set the handler's address */ /* Setup the gate */
Idt[Vector].Offset = (USHORT)((ULONG)Handler & 0xFFFF); Idt[Vector].Offset = (USHORT)((ULONG)Handler & 0xFFFF);
Idt[Vector].ExtendedOffset = (USHORT)((ULONG)Handler >> 16); Idt[Vector].ExtendedOffset = (USHORT)((ULONG)Handler >> 16);
Idt[Vector].Access = 0x8000 | (Access << 8);
/* Set the code segment selector */
Idt[Vector].Selector = Selector; Idt[Vector].Selector = Selector;
/* Initialize the gate's attributes and flags */
Idt[Vector].Access = 0;
Idt[Vector].Dpl = Dpl;
Idt[Vector].Present = 1;
Idt[Vector].Type = Type;
} }
/** /**
@@ -720,7 +689,7 @@ AR::ProcSup::SetIdtGate(IN PKIDTENTRY Idt,
XTAPI XTAPI
VOID VOID
AR::ProcSup::SetNonMaskableInterruptTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock, AR::ProcSup::SetNonMaskableInterruptTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelNmiStack) IN PVOID KernelFaultStack)
{ {
PKGDTENTRY TaskGateEntry, TssEntry; PKGDTENTRY TaskGateEntry, TssEntry;
PKTSS Tss; PKTSS Tss;
@@ -736,24 +705,23 @@ AR::ProcSup::SetNonMaskableInterruptTssEntry(IN PKPROCESSOR_BLOCK ProcessorBlock
Tss = (PKTSS)NonMaskableInterruptTss; Tss = (PKTSS)NonMaskableInterruptTss;
Tss->IoMapBase = sizeof(KTSS); Tss->IoMapBase = sizeof(KTSS);
Tss->Flags = 0; Tss->Flags = 0;
Tss->LDT = 0; Tss->LDT = KGDT_R0_LDT;
Tss->CR3 = AR::CpuFunc::ReadControlRegister(3); Tss->CR3 = CpuFunc::ReadControlRegister(3);
Tss->Esp = (ULONG_PTR)KernelNmiStack; Tss->Esp = (ULONG_PTR)KernelFaultStack;
Tss->Esp0 = (ULONG_PTR)KernelNmiStack; Tss->Esp0 = (ULONG_PTR)KernelFaultStack;
Tss->Eip = (ULONG)(ULONG_PTR)ArTrapEntry[0x02]; Tss->Eip = PtrToUlong(ArTrap0x02);
Tss->Cs = KGDT_R0_CODE; Tss->Cs = KGDT_R0_CODE;
Tss->Ds = KGDT_R3_DATA | RPL_MASK; Tss->Ds = KGDT_R3_DATA | RPL_MASK;
Tss->Es = KGDT_R3_DATA | RPL_MASK; Tss->Es = KGDT_R3_DATA | RPL_MASK;
Tss->Fs = KGDT_R0_PB; Tss->Fs = KGDT_R0_PB;
Tss->Ss = KGDT_R0_DATA; CpuFunc::StoreSegment(SEGMENT_SS, (PVOID)&Tss->Ss);
Tss->Ss0 = KGDT_R0_DATA;
/* Setup NMI TSS entry in Global Descriptor Table */ /* Setup NMI TSS entry in Global Descriptor Table */
TssEntry = (PKGDTENTRY)(&(ProcessorBlock->GdtBase[KGDT_NMI_TSS / sizeof(KGDTENTRY)])); TssEntry = (PKGDTENTRY)(&(ProcessorBlock->GdtBase[KGDT_NMI_TSS / sizeof(KGDTENTRY)]));
TssEntry->BaseLow = ((ULONG_PTR)Tss & 0xFFFF); TssEntry->BaseLow = ((ULONG_PTR)Tss & 0xFFFF);
TssEntry->Bytes.BaseMiddle = ((ULONG_PTR)Tss >> 16); TssEntry->Bytes.BaseMiddle = ((ULONG_PTR)Tss >> 16);
TssEntry->Bytes.BaseHigh = ((ULONG_PTR)Tss >> 24); TssEntry->Bytes.BaseHigh = ((ULONG_PTR)Tss >> 24);
TssEntry->LimitLow = 0x68; TssEntry->LimitLow = sizeof(KTSS) - 1;
TssEntry->Bits.LimitHigh = 0; TssEntry->Bits.LimitHigh = 0;
TssEntry->Bits.Dpl = 0; TssEntry->Bits.Dpl = 0;
TssEntry->Bits.Present = 1; TssEntry->Bits.Present = 1;

View File

@@ -9,44 +9,6 @@
#include <xtos.hh> #include <xtos.hh>
/**
* Dispatches the interrupt provided by common interrupt handler.
*
* @param TrapFrame
* Supplies a kernel trap frame pushed by common interrupt handler on the stack.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
AR::Traps::DispatchInterrupt(IN PKTRAP_FRAME TrapFrame)
{
PINTERRUPT_HANDLER Handler;
/* Read the handler pointer from the CPU's interrupt dispatch table */
Handler = (PINTERRUPT_HANDLER)AR::CpuFunc::ReadFSDualWord(FIELD_OFFSET(KPROCESSOR_BLOCK, InterruptDispatchTable) +
(TrapFrame->Vector * sizeof(PINTERRUPT_HANDLER)));
/* Check if the interrupt has a handler registered */
if(Handler != NULLPTR)
{
/* Call the handler */
Handler(TrapFrame);
}
else if(UnhandledInterruptRoutine != NULLPTR)
{
/* Call the unhandled interrupt routine */
UnhandledInterruptRoutine(TrapFrame);
}
else
{
/* Dispatcher not initialized, print a debug message */
DebugPrint(L"ERROR: Caught unhandled interrupt: 0x%.2lX\n", TrapFrame->Vector);
}
}
/** /**
* Dispatches the trap provided by common trap handler. * Dispatches the trap provided by common trap handler.
* *
@@ -233,6 +195,7 @@ VOID
AR::Traps::HandleTrap02(IN PKTRAP_FRAME TrapFrame) AR::Traps::HandleTrap02(IN PKTRAP_FRAME TrapFrame)
{ {
DebugPrint(L"Handled Non-Maskable-Interrupt (0x02)!\n"); DebugPrint(L"Handled Non-Maskable-Interrupt (0x02)!\n");
KE::Crash::Panic(0x02);
} }
/** /**
@@ -629,19 +592,19 @@ AR::Traps::HandleTrapFF(IN PKTRAP_FRAME TrapFrame)
} }
/** /**
* Sets the unhandled interrupt routine used for vectors that have no handler registered. * C-linkage wrapper for dispatching the trap provided by common trap handler.
* *
* @param Handler * @param TrapFrame
* Supplies the pointer to the interrupt handler routine. * Supplies a kernel trap frame pushed by common trap handler on the stack.
* *
* @return This routine does not return any value. * @return This routine does not return any value.
* *
* @since XT 1.0 * @since XT 1.0
*/ */
XTCLINK
XTCDECL XTCDECL
VOID VOID
AR::Traps::SetUnhandledInterruptRoutine(PINTERRUPT_HANDLER Handler) ArDispatchTrap(IN PKTRAP_FRAME TrapFrame)
{ {
/* Set the unhandled interrupt routine */ AR::Traps::DispatchTrap(TrapFrame);
UnhandledInterruptRoutine = Handler;
} }

View File

@@ -4,7 +4,6 @@
* FILE: xtoskrnl/hl/x86/acpi.cc * FILE: xtoskrnl/hl/x86/acpi.cc
* DESCRIPTION: Advanced Configuration and Power Interface (ACPI) support * DESCRIPTION: Advanced Configuration and Power Interface (ACPI) support
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org> * DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <harraiken91@gmail.com>
*/ */
#include <xtos.hh> #include <xtos.hh>
@@ -26,21 +25,8 @@ HL::Acpi::CacheAcpiTable(IN PACPI_DESCRIPTION_HEADER AcpiTable)
{ {
PACPI_CACHE_LIST AcpiCache; PACPI_CACHE_LIST AcpiCache;
/* Check if there are free slots in static early-boot cache array */ /* Create new ACPI table cache entry */
if(CacheCount >= ACPI_MAX_CACHED_TABLES) AcpiCache = CONTAIN_RECORD(AcpiTable, ACPI_CACHE_LIST, Header);
{
/* Cache is full, the table is mapped but not cached */
return;
}
/* Get the next available static cache entry */
AcpiCache = &CacheEntries[CacheCount];
CacheCount++;
/* Store the pointer to the mapped ACPI table */
AcpiCache->Table = AcpiTable;
/* Insert entry into the global ACPI cache list */
RTL::LinkedList::InsertTailList(&CacheList, &AcpiCache->ListEntry); RTL::LinkedList::InsertTailList(&CacheList, &AcpiCache->ListEntry);
} }
@@ -105,28 +91,6 @@ HL::Acpi::GetAcpiTable(IN ULONG Signature,
return STATUS_SUCCESS; return STATUS_SUCCESS;
} }
/**
* Retrieves the ACPI timer information.
*
* @param AcpiTimerInfo
* Supplies a pointer to memory area, where ACPI timer information will be stored.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
HL::Acpi::GetAcpiTimerInfo(OUT PACPI_TIMER_INFO *AcpiTimerInfo)
{
/* Check if ACPI timer info is available */
if(AcpiTimerInfo)
{
/* Return ACPI timer info */
*AcpiTimerInfo = &TimerInfo;
}
}
/** /**
* Performs an initialization of the ACPI subsystem. * Performs an initialization of the ACPI subsystem.
* *
@@ -232,23 +196,14 @@ HL::Acpi::InitializeAcpiSystemDescriptionTable(OUT PACPI_DESCRIPTION_HEADER *Acp
AcpiResource = (PSYSTEM_RESOURCE_ACPI)ResourceHeader; AcpiResource = (PSYSTEM_RESOURCE_ACPI)ResourceHeader;
RsdpAddress.QuadPart = (LONGLONG)AcpiResource->Header.PhysicalAddress; RsdpAddress.QuadPart = (LONGLONG)AcpiResource->Header.PhysicalAddress;
/* Map RSDP using hardware memory pool */ /* Map RSDP and mark it as CD/WT to avoid delays in write-back cache */
Status = MM::HardwarePool::MapHardwareMemory(RsdpAddress, 1, TRUE, (PVOID *)&RsdpStructure); Status = MM::HardwarePool::MapHardwareMemory(RsdpAddress, 1, TRUE, (PVOID *)&RsdpStructure);
if(Status != STATUS_SUCCESS)
{
/* Failed to map RSDP, return error */
return Status;
}
/* Mark RSDP as CD/WT to avoid delays in write-back cache */
MM::HardwarePool::MarkHardwareMemoryWriteThrough(RsdpStructure, 1); MM::HardwarePool::MarkHardwareMemoryWriteThrough(RsdpStructure, 1);
/* Validate RSDP signature */ /* Validate RSDP signature */
if(RsdpStructure->Signature != ACPI_RSDP_SIGNATURE) if(Status != STATUS_SUCCESS || RsdpStructure->Signature != ACPI_RSDP_SIGNATURE)
{ {
/* Invalid RSDP signature, unmap and return error */ /* Not mapped correctly or invalid RSDP signature, return error */
MM::HardwarePool::UnmapHardwareMemory(RsdpStructure, 1, TRUE);
RsdpStructure = NULLPTR;
return STATUS_INVALID_PARAMETER; return STATUS_INVALID_PARAMETER;
} }
@@ -264,40 +219,34 @@ HL::Acpi::InitializeAcpiSystemDescriptionTable(OUT PACPI_DESCRIPTION_HEADER *Acp
RsdtAddress.QuadPart = (LONGLONG)RsdpStructure->RsdtAddress; RsdtAddress.QuadPart = (LONGLONG)RsdpStructure->RsdtAddress;
} }
/* Map RSDT/XSDT using hardware memory pool */ /* Map RSDT/XSDT as CD/WT */
Status = MM::HardwarePool::MapHardwareMemory(RsdtAddress, 2, TRUE, (PVOID *)&Rsdt); Status = MM::HardwarePool::MapHardwareMemory(RsdtAddress, 2, TRUE, (PVOID *)&Rsdt);
if(Status != STATUS_SUCCESS)
{
/* Failed to map RSDT/XSDT, return error */
return Status;
}
/* Mark RSDT/XSDT as CD/WT */
MM::HardwarePool::MarkHardwareMemoryWriteThrough(Rsdt, 2); MM::HardwarePool::MarkHardwareMemoryWriteThrough(Rsdt, 2);
/* Validate RSDT/XSDT signature */ /* Validate RSDT/XSDT signature */
if(Rsdt->Header.Signature != ACPI_RSDT_SIGNATURE && Rsdt->Header.Signature != ACPI_XSDT_SIGNATURE) if((Status != STATUS_SUCCESS) ||
(Rsdt->Header.Signature != ACPI_RSDT_SIGNATURE &&
Rsdt->Header.Signature != ACPI_XSDT_SIGNATURE))
{ {
/* Not mapped correctly or invalid RSDT/XSDT signature, unmap and return error */ /* Not mapped correctly or invalid RSDT/XSDT signature, return error */
MM::HardwarePool::UnmapHardwareMemory(Rsdt, 2, TRUE);
return STATUS_INVALID_PARAMETER; return STATUS_INVALID_PARAMETER;
} }
/* Calculate the length of all available ACPI tables and remap it if needed */ /* Calculate the length of all available ACPI tables and remap it if needed */
RsdtPages = (((RsdtAddress.LowPart & (MM_PAGE_SIZE - 1)) + Rsdt->Header.Length + (MM_PAGE_SIZE - 1)) >> MM_PAGE_SHIFT); RsdtPages = ((RsdtAddress.LowPart & (MM_PAGE_SIZE - 1)) + Rsdt->Header.Length + (MM_PAGE_SIZE - 1)) >> MM_PAGE_SHIFT;
if(RsdtPages != 2) if(RsdtPages != 2)
{ {
/* RSDT/XSDT needs less or more than 2 pages, remap it */ /* RSDT/XSDT needs less or more than 2 pages, remap it */
MM::HardwarePool::UnmapHardwareMemory(Rsdt, 2, TRUE); MM::HardwarePool::UnmapHardwareMemory(Rsdt, 2, TRUE);
Status = MM::HardwarePool::MapHardwareMemory(RsdtAddress, RsdtPages, TRUE, (PVOID *)&Rsdt); Status = MM::HardwarePool::MapHardwareMemory(RsdtAddress, RsdtPages, TRUE, (PVOID *)&Rsdt);
MM::HardwarePool::MarkHardwareMemoryWriteThrough(Rsdt, RsdtPages);
/* Make sure remapping was successful */
if(Status != STATUS_SUCCESS) if(Status != STATUS_SUCCESS)
{ {
/* Remapping failed, return error */ /* Remapping failed, return error */
return STATUS_INSUFFICIENT_RESOURCES; return STATUS_INSUFFICIENT_RESOURCES;
} }
/* Mark remapped RSDT/XSDT as CD/WT */
MM::HardwarePool::MarkHardwareMemoryWriteThrough(Rsdt, RsdtPages);
} }
/* Get ACPI table header and return success */ /* Get ACPI table header and return success */
@@ -318,7 +267,6 @@ HL::Acpi::InitializeAcpiSystemInformation(VOID)
{ {
PACPI_MADT_LOCAL_X2APIC LocalX2Apic; PACPI_MADT_LOCAL_X2APIC LocalX2Apic;
PACPI_MADT_LOCAL_APIC LocalApic; PACPI_MADT_LOCAL_APIC LocalApic;
PACPI_SUBTABLE_HEADER SubTable;
ULONG_PTR MadtTable; ULONG_PTR MadtTable;
PACPI_MADT Madt; PACPI_MADT Madt;
XTSTATUS Status; XTSTATUS Status;
@@ -345,20 +293,11 @@ HL::Acpi::InitializeAcpiSystemInformation(VOID)
CpuCount = 0; CpuCount = 0;
/* Traverse all MADT tables to get system information */ /* Traverse all MADT tables to get system information */
while(MadtTable < ((ULONG_PTR)Madt + Madt->Header.Length)) while(MadtTable <= ((ULONG_PTR)Madt + Madt->Header.Length))
{ {
/* Get current MADT subtable header */
SubTable = (PACPI_SUBTABLE_HEADER)MadtTable;
/* Prevent infinite loops if BIOS provides 0 length */
if(SubTable->Length == 0)
{
/* Broken ACPI table, abort traversal */
break;
}
/* Check if this is a local APIC subtable */ /* Check if this is a local APIC subtable */
if(SubTable->Type == ACPI_MADT_TYPE_LOCAL_APIC && SubTable->Length >= sizeof(ACPI_MADT_LOCAL_APIC)) if((((PACPI_SUBTABLE_HEADER)MadtTable)->Type == ACPI_MADT_TYPE_LOCAL_APIC) &&
(((PACPI_SUBTABLE_HEADER)MadtTable)->Length == sizeof(ACPI_MADT_LOCAL_APIC)))
{ {
/* Get local APIC subtable */ /* Get local APIC subtable */
LocalApic = (PACPI_MADT_LOCAL_APIC)MadtTable; LocalApic = (PACPI_MADT_LOCAL_APIC)MadtTable;
@@ -374,8 +313,12 @@ HL::Acpi::InitializeAcpiSystemInformation(VOID)
/* Increment number of CPUs */ /* Increment number of CPUs */
CpuCount++; CpuCount++;
} }
/* Go to the next MADT table */
MadtTable += ((PACPI_SUBTABLE_HEADER)MadtTable)->Length;
} }
else if(SubTable->Type == ACPI_MADT_TYPE_LOCAL_X2APIC && SubTable->Length >= sizeof(ACPI_MADT_LOCAL_X2APIC)) else if((((PACPI_SUBTABLE_HEADER)MadtTable)->Type == ACPI_MADT_TYPE_LOCAL_X2APIC) &&
(((PACPI_SUBTABLE_HEADER)MadtTable)->Length == sizeof(ACPI_MADT_LOCAL_X2APIC)))
{ {
/* Get local X2APIC subtable */ /* Get local X2APIC subtable */
LocalX2Apic = (PACPI_MADT_LOCAL_X2APIC)MadtTable; LocalX2Apic = (PACPI_MADT_LOCAL_X2APIC)MadtTable;
@@ -391,10 +334,15 @@ HL::Acpi::InitializeAcpiSystemInformation(VOID)
/* Increment number of CPUs */ /* Increment number of CPUs */
CpuCount++; CpuCount++;
} }
}
/* Safely advance pointer using proper subtable length */ /* Go to the next MADT table */
MadtTable += SubTable->Length; MadtTable += ((PACPI_SUBTABLE_HEADER)MadtTable)->Length;
}
else
{
/* Any other MADT table, try to go to the next one byte-by-byte */
MadtTable += 1;
}
} }
/* Store number of CPUs */ /* Store number of CPUs */
@@ -416,7 +364,6 @@ XTSTATUS
HL::Acpi::InitializeAcpiSystemStructure(VOID) HL::Acpi::InitializeAcpiSystemStructure(VOID)
{ {
PHYSICAL_ADDRESS PhysicalAddress; PHYSICAL_ADDRESS PhysicalAddress;
PACPI_SUBTABLE_HEADER SubTable;
PFN_NUMBER PageCount; PFN_NUMBER PageCount;
ULONG_PTR MadtTable; ULONG_PTR MadtTable;
PACPI_MADT Madt; PACPI_MADT Madt;
@@ -436,19 +383,11 @@ HL::Acpi::InitializeAcpiSystemStructure(VOID)
CpuCount = 0; CpuCount = 0;
/* Traverse all MADT tables to get number of processors */ /* Traverse all MADT tables to get number of processors */
while(MadtTable < ((ULONG_PTR)Madt + Madt->Header.Length)) while(MadtTable <= ((ULONG_PTR)Madt + Madt->Header.Length))
{ {
SubTable = (PACPI_SUBTABLE_HEADER)MadtTable;
/* Prevent infinite loops if BIOS provides 0 length */
if(SubTable->Length == 0)
{
/* Broken ACPI table, abort traversal */
break;
}
/* Check if this is a local APIC subtable */ /* Check if this is a local APIC subtable */
if(SubTable->Type == ACPI_MADT_TYPE_LOCAL_APIC && SubTable->Length >= sizeof(ACPI_MADT_LOCAL_APIC)) if((((PACPI_SUBTABLE_HEADER)MadtTable)->Type == ACPI_MADT_TYPE_LOCAL_APIC) &&
(((PACPI_SUBTABLE_HEADER)MadtTable)->Length == sizeof(ACPI_MADT_LOCAL_APIC)))
{ {
/* Make sure, this CPU can be enabled */ /* Make sure, this CPU can be enabled */
if(((PACPI_MADT_LOCAL_APIC)MadtTable)->Flags & ACPI_MADT_PLAOC_ENABLED) if(((PACPI_MADT_LOCAL_APIC)MadtTable)->Flags & ACPI_MADT_PLAOC_ENABLED)
@@ -456,8 +395,12 @@ HL::Acpi::InitializeAcpiSystemStructure(VOID)
/* Increment number of CPUs */ /* Increment number of CPUs */
CpuCount++; CpuCount++;
} }
/* Go to the next MADT table */
MadtTable += ((PACPI_SUBTABLE_HEADER)MadtTable)->Length;
} }
else if(SubTable->Type == ACPI_MADT_TYPE_LOCAL_X2APIC && SubTable->Length >= sizeof(ACPI_MADT_LOCAL_X2APIC)) else if((((PACPI_SUBTABLE_HEADER)MadtTable)->Type == ACPI_MADT_TYPE_LOCAL_X2APIC) &&
(((PACPI_SUBTABLE_HEADER)MadtTable)->Length == sizeof(ACPI_MADT_LOCAL_X2APIC)))
{ {
/* Make sure, this CPU can be enabled */ /* Make sure, this CPU can be enabled */
if(((PACPI_MADT_LOCAL_X2APIC)MadtTable)->Flags & ACPI_MADT_PLAOC_ENABLED) if(((PACPI_MADT_LOCAL_X2APIC)MadtTable)->Flags & ACPI_MADT_PLAOC_ENABLED)
@@ -465,10 +408,15 @@ HL::Acpi::InitializeAcpiSystemStructure(VOID)
/* Increment number of CPUs */ /* Increment number of CPUs */
CpuCount++; CpuCount++;
} }
}
/* Safely advance pointer using proper subtable length */ /* Go to the next MADT table */
MadtTable += SubTable->Length; MadtTable += ((PACPI_SUBTABLE_HEADER)MadtTable)->Length;
}
else
{
/* Any other MADT table, try to go to the next one byte-by-byte */
MadtTable += 1;
}
} }
/* Zero the ACPI system information structure */ /* Zero the ACPI system information structure */
@@ -574,10 +522,10 @@ HL::Acpi::QueryAcpiCache(IN ULONG Signature,
AcpiCache = CONTAIN_RECORD(ListEntry, ACPI_CACHE_LIST, ListEntry); AcpiCache = CONTAIN_RECORD(ListEntry, ACPI_CACHE_LIST, ListEntry);
/* Check if ACPI table signature matches */ /* Check if ACPI table signature matches */
if(AcpiCache->Table->Signature == Signature) if(AcpiCache->Header.Signature == Signature)
{ {
/* ACPI table found in cache, return it */ /* ACPI table found in cache, return it */
TableHeader = AcpiCache->Table; TableHeader = &AcpiCache->Header;
break; break;
} }
@@ -648,30 +596,17 @@ HL::Acpi::QueryAcpiTables(IN ULONG Signature,
/* Check if DSDT or FACS table requested */ /* Check if DSDT or FACS table requested */
if(Signature == ACPI_DSDT_SIGNATURE) if(Signature == ACPI_DSDT_SIGNATURE)
{ {
/* Prefer 64-bit address on ACPI 2.0+ */ /* Get DSDT address */
if(Fadt->Header.Revision >= 2 && Fadt->XDsdt.QuadPart != 0)
{
TableAddress.QuadPart = Fadt->XDsdt.QuadPart;
}
else
{
TableAddress.LowPart = Fadt->Dsdt; TableAddress.LowPart = Fadt->Dsdt;
TableAddress.HighPart = 0;
}
}
else
{
/* Prefer 64-bit address on ACPI 2.0+ */
if(Fadt->Header.Revision >= 2 && Fadt->XFirmwareCtrl.QuadPart != 0)
{
TableAddress.QuadPart = Fadt->XFirmwareCtrl.QuadPart;
} }
else else
{ {
/* Get FACS address */
TableAddress.LowPart = Fadt->FirmwareCtrl; TableAddress.LowPart = Fadt->FirmwareCtrl;
}
/* Fill in high part of ACPI table address */
TableAddress.HighPart = 0; TableAddress.HighPart = 0;
}
}
/* Map table using hardware memory pool */ /* Map table using hardware memory pool */
Status = MM::HardwarePool::MapHardwareMemory(TableAddress, 2, TRUE, (PVOID*)&TableHeader); Status = MM::HardwarePool::MapHardwareMemory(TableAddress, 2, TRUE, (PVOID*)&TableHeader);
@@ -683,12 +618,11 @@ HL::Acpi::QueryAcpiTables(IN ULONG Signature,
} }
else else
{ {
/* Query cache for XSDT table */ /* Query cache for XSDP table */
Status = QueryAcpiCache(ACPI_XSDT_SIGNATURE, (PACPI_DESCRIPTION_HEADER*)&Xsdt); Status = QueryAcpiCache(ACPI_XSDT_SIGNATURE, (PACPI_DESCRIPTION_HEADER*)&Xsdt);
if(Status != STATUS_SUCCESS) if(Status != STATUS_SUCCESS)
{ {
/* XSDT not found, query cache for RSDT table */ /* XSDP not found, query cache for RSDP table */
Xsdt = NULLPTR;
Status = QueryAcpiCache(ACPI_RSDT_SIGNATURE, (PACPI_DESCRIPTION_HEADER*)&Rsdt); Status = QueryAcpiCache(ACPI_RSDT_SIGNATURE, (PACPI_DESCRIPTION_HEADER*)&Rsdt);
} }
@@ -699,22 +633,22 @@ HL::Acpi::QueryAcpiTables(IN ULONG Signature,
return Status; return Status;
} }
/* Get table count depending on root table type securely */ /* Get table count depending on root table type */
if(Xsdt != NULLPTR) if(Xsdt != NULLPTR)
{ {
if(Xsdt->Header.Length < sizeof(ACPI_DESCRIPTION_HEADER)) return STATUS_INVALID_PARAMETER; /* Get table count from XSDT */
TableCount = (Xsdt->Header.Length - sizeof(ACPI_DESCRIPTION_HEADER)) / 8; TableCount = (Xsdt->Header.Length - sizeof(ACPI_DESCRIPTION_HEADER)) / 8;
} }
else else
{ {
if(Rsdt->Header.Length < sizeof(ACPI_DESCRIPTION_HEADER)) return STATUS_INVALID_PARAMETER; /* Get table count from RSDT */
TableCount = (Rsdt->Header.Length - sizeof(ACPI_DESCRIPTION_HEADER)) / 4; TableCount = (Rsdt->Header.Length - sizeof(ACPI_DESCRIPTION_HEADER)) / 4;
} }
/* Iterate over all ACPI tables */ /* Iterate over all ACPI tables */
for(TableIndex = 0; TableIndex < TableCount; TableIndex++) for(TableIndex = 0; TableIndex < TableCount; TableIndex++)
{ {
/* Check if XSDT or RSDT is used */ /* Check if XSDP or RSDT is used */
if(Xsdt != NULLPTR) if(Xsdt != NULLPTR)
{ {
/* Get table header physical address from XSDT */ /* Get table header physical address from XSDT */
@@ -727,6 +661,13 @@ HL::Acpi::QueryAcpiTables(IN ULONG Signature,
TableAddress.HighPart = 0; TableAddress.HighPart = 0;
} }
/* Check whether some table is already mapped */
if(TableHeader != NULLPTR)
{
/* Unmap previous table */
MM::HardwarePool::UnmapHardwareMemory(TableHeader, 2, TRUE);
}
/* Map table using hardware memory pool */ /* Map table using hardware memory pool */
Status = MM::HardwarePool::MapHardwareMemory(TableAddress, 2, TRUE, (PVOID*)&TableHeader); Status = MM::HardwarePool::MapHardwareMemory(TableAddress, 2, TRUE, (PVOID*)&TableHeader);
if(Status != STATUS_SUCCESS) if(Status != STATUS_SUCCESS)
@@ -741,31 +682,25 @@ HL::Acpi::QueryAcpiTables(IN ULONG Signature,
/* Found requested ACPI table */ /* Found requested ACPI table */
break; break;
} }
/* Unmap non-matching table and try next one */
MM::HardwarePool::UnmapHardwareMemory(TableHeader, 2, TRUE);
TableHeader = NULLPTR;
} }
} }
/* Ensure the table was actually found and mapped */ /* Make sure table was found */
if(TableHeader == NULLPTR)
{
/* ACPI table not found, return error */
return STATUS_NOT_FOUND;
}
/* Check if we broke out of the loop with the wrong table (safety check) */
if(TableHeader->Signature != Signature) if(TableHeader->Signature != Signature)
{ {
/* Unmap non-matching ACPI table and return error */ /* ACPI table not found, check if cleanup is needed */
if(TableHeader != NULLPTR)
{
/* Unmap non-matching ACPI table */
MM::HardwarePool::UnmapHardwareMemory(TableHeader, 2, TRUE); MM::HardwarePool::UnmapHardwareMemory(TableHeader, 2, TRUE);
}
/* Return error */
return STATUS_NOT_FOUND; return STATUS_NOT_FOUND;
} }
/* Don't validate FACS and FADT on old, broken firmwares with ACPI 2.0 or older */ /* Don't validate FADT on old, broken firmwares with ACPI 2.0 or older */
if((TableHeader->Signature != ACPI_FADT_SIGNATURE || TableHeader->Revision > 2) && if(TableHeader->Signature != ACPI_FADT_SIGNATURE || TableHeader->Revision > 2)
(TableHeader->Signature != ACPI_FACS_SIGNATURE))
{ {
/* Validate table checksum */ /* Validate table checksum */
if(!ValidateAcpiTable(TableHeader, TableHeader->Length)) if(!ValidateAcpiTable(TableHeader, TableHeader->Length))
@@ -777,7 +712,7 @@ HL::Acpi::QueryAcpiTables(IN ULONG Signature,
} }
/* Calculate the length of ACPI table and remap it if needed */ /* Calculate the length of ACPI table and remap it if needed */
TablePages = (((TableAddress.LowPart & (MM_PAGE_SIZE - 1)) + TableHeader->Length + (MM_PAGE_SIZE - 1)) >> MM_PAGE_SHIFT); TablePages = (((ULONG_PTR)TableHeader & (MM_PAGE_SIZE - 1)) + TableHeader->Length + (MM_PAGE_SIZE - 1)) >> MM_PAGE_SHIFT;
if(TablePages != 2) if(TablePages != 2)
{ {
/* ACPI table needs less or more than 2 pages, remap it */ /* ACPI table needs less or more than 2 pages, remap it */

View File

@@ -1,13 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/hl/amd64/firmware.cc
* DESCRIPTION: UEFI/BIOS Firmware support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtos.hh>
/* Include common Firmware interface */
#include ARCH_COMMON(firmware.cc)

View File

@@ -1,260 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/hl/amd64/irq.cc
* DESCRIPTION: Interrupts support for AMD64 architecture
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <harraiken91@gmail.com>
*/
#include <xtos.hh>
/**
* Begins a system interrupt handler by raising the processor's run level and re-enabling
* hardware interrupts to allow preemption by higher-priority events.
*
* @param RunLevel
* Supplies the target run level to raise the processor to.
*
* @param OldRunLevel
* Receives the previous run level before the elevation.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
HL::Irq::BeginSystemInterrupt(IN KRUNLEVEL RunLevel,
OUT PKRUNLEVEL OldRunLevel)
{
/* Get the current IRQL */
*OldRunLevel = KE::RunLevel::GetCurrentRunLevel();
/* Raise run level */
KE::RunLevel::RaiseRunLevel(RunLevel);
/* Enable interrupts */
AR::CpuFunc::SetInterruptFlag();
}
/**
* Safely concludes an interrupt handler by disabling hardware interrupts.
*
* @param TrapFrame
* Supplies a pointer to the kernel trap frame containing the interrupted execution state.
*
* @param OldRunLevel
* Supplies the previous run level to restore.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
HL::Irq::EndInterrupt(IN PKTRAP_FRAME TrapFrame,
IN KRUNLEVEL OldRunLevel)
{
/* Disable interrupts */
AR::CpuFunc::ClearInterruptFlag();
/* End system interrupt */
EndSystemInterrupt(TrapFrame, OldRunLevel);
}
/**
* Concludes a system interrupt by sending an End of Interrupt (EOI) to the hardware
* controller and restoring the processor's previous run level.
*
* @param TrapFrame
* Supplies a pointer to the kernel trap frame containing the interrupted execution state.
*
* @param OldRunLevel
* Supplies the previous run level to restore.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
HL::Irq::EndSystemInterrupt(IN PKTRAP_FRAME TrapFrame,
IN KRUNLEVEL OldRunLevel)
{
/* Send EOI */
HL::Pic::SendEoi();
/* Restore previous run level */
KE::RunLevel::LowerRunLevel(OldRunLevel);
}
/**
* Handles profiling interrupt.
*
* @param TrapFrame
* Supplies a kernel trap frame pushed by common interrupt handler.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HL::Irq::HandleProfileInterrupt(IN PKTRAP_FRAME TrapFrame)
{
/* Send EOI */
HL::Pic::SendEoi();
}
/**
* Handles unexpected or unmapped system interrupts.
*
* @param TrapFrame
* Supplies a kernel trap frame pushed by common interrupt handler.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
HL::Irq::HandleUnexpectedInterrupt(IN PKTRAP_FRAME TrapFrame)
{
UNIMPLEMENTED;
/* Disable interrupts */
AR::CpuFunc::ClearInterruptFlag();
/* Print debug message and raise kernel panic */
DebugPrint(L"ERROR: Caught unexpected interrupt (0x%.2llX)!\n", TrapFrame->Vector);
KE::Crash::Panic(0x47, TrapFrame->Vector, 0, 0, 0);
}
/**
* Returns the registered interrupt handler for the specified IDT vector.
*
* @param Vector
* Supplies the interrupt vector number.
*
* @return This routine returns the pointer to the IDT interrupt handler routine.
*
* @since XT 1.0
*/
XTAPI
PVOID
HL::Irq::QueryInterruptHandler(IN ULONG Vector)
{
PKPROCESSOR_BLOCK ProcessorBlock;
PKIDTENTRY IdtEntry;
/* Get current processor block and IDT entry */
ProcessorBlock = KE::Processor::GetCurrentProcessorBlock();
IdtEntry = &ProcessorBlock->IdtBase[Vector];
/* Return address of the interrupt handler */
return (PVOID)((ULONGLONG)IdtEntry->OffsetHigh << 32 |
(ULONGLONG)IdtEntry->OffsetMiddle << 16 |
(ULONGLONG)IdtEntry->OffsetLow);
}
/**
* Returns the registered interrupt handler for the specified vector.
*
* @param Vector
* Supplies the interrupt vector number.
*
* @return This routine returns the pointer to the interrupt handler routine.
*
* @since XT 1.0
*/
XTAPI
PVOID
HL::Irq::QuerySystemInterruptHandler(IN ULONG Vector)
{
PKPROCESSOR_BLOCK ProcessorBlock;
/* Get current processor block */
ProcessorBlock = KE::Processor::GetCurrentProcessorBlock();
return (PVOID)ProcessorBlock->InterruptDispatchTable[Vector];
}
/**
* Registers new interrupt handler for the existing IDT entry.
*
* @param HalVector
* Supplies the interrupt vector number.
*
* @param Handler
* Supplies the pointer to the interrupt handler routine.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
HL::Irq::RegisterInterruptHandler(IN ULONG Vector,
IN PVOID Handler)
{
PKPROCESSOR_BLOCK ProcessorBlock;
/* Get current processor block */
ProcessorBlock = KE::Processor::GetCurrentProcessorBlock();
/* Update interrupt handler */
AR::ProcSup::SetIdtGate(ProcessorBlock->IdtBase,
Vector,
Handler,
KGDT_R0_CODE,
0,
KIDT_ACCESS_RING0,
AMD64_INTERRUPT_GATE);
}
/**
* Registers the interrupt handler for the specified vector.
*
* @param HalVector
* Supplies the interrupt vector number.
*
* @param Handler
* Supplies the pointer to the interrupt handler routine.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
HL::Irq::RegisterSystemInterruptHandler(IN ULONG Vector,
IN PINTERRUPT_HANDLER Handler)
{
PKPROCESSOR_BLOCK ProcessorBlock;
/* Get current processor block */
ProcessorBlock = KE::Processor::GetCurrentProcessorBlock();
/* Update interrupt handler in the processor's interrupt dispatch table */
ProcessorBlock->InterruptDispatchTable[Vector] = Handler;
}
/**
* Requests a software interrupt by sending a Self-IPI mapped to the specified run level.
*
* @param RunLevel
* Supplies the target run level for the software interrupt.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTFASTCALL
VOID
HL::Irq::SendSoftwareInterrupt(IN KRUNLEVEL RunLevel)
{
/* Request a software interrupt */
HL::Pic::SendSelfIpi(HL::RunLevel::TransformRunLevelToSoftwareVector(RunLevel));
}

View File

@@ -1,13 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/hl/amd64/rtc.cc
* DESCRIPTION: Hardware Real-Time Clock (RTC) support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtos.hh>
/* Include common RTC interface */
#include ARCH_COMMON(rtc.cc)

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