xt-sys/exectos
3
5
Fork 2
Code Issues 5 Pull Requests Actions Projects 1 Releases Wiki Activity

Compare commits

base: xt-sys:threads
Branches Tags
xt-sys:master xt-sys:threads
..
compare: xt-sys:356c221e23cdbf9d9a4601159a53f3af2f84f55e
Branches Tags
xt-sys:threads xt-sys:master

1 Commits
threads ... 356c221e23

Author SHA1 Message Date
PerikiyoXD
356c221e23 Add support for WHPX accelerator on Windows and introduce OVMF Pure EFI firmware 2025-10-09 16:25:52 +02:00
356 changed files with 3409 additions and 43723 deletions
Expand all files Collapse all files

3
CMakeLists.txt
View File

@@ -55,9 +55,6 @@ add_definitions(-D__XTOS__)
add_definitions(-DXTOS_SOURCE_DIR="${EXECTOS_SOURCE_DIR}")
add_definitions(-DXTOS_BINARY_DIR="${EXECTOS_BINARY_DIR}")
# Add assembler flags
add_compiler_asmflags(-D__XTOS_ASSEMBLER__)
# Compute __FILE__ definition
file(RELATIVE_PATH _PATH_PREFIX ${EXECTOS_BINARY_DIR} ${EXECTOS_SOURCE_DIR})
add_compiler_flags(-D__RELFILE__="&__FILE__[__FILE__[0] == '.' ? sizeof \\\"${_PATH_PREFIX}\\\" - 1 : sizeof XTOS_SOURCE_DIR]")

5
README.md
View File

@@ -53,9 +53,8 @@ implement any environment subsystem to support applications that are strictly wr
* NT drivers compatibility layer
# Requirements
ExectOS is currently in a very early stage of development, so its specific requirements are not fully defined yet.
However, based on the current design, it requires modern EFI hardware. You cannot boot ExectOS on a legacy BIOS
right now, but there are plans to add BIOS support in the future.
ExectOS is in very early development stage, thus its requirements have been not specified yet. However according to its
design, it requires a modern EFI enabled hardware. It is not possible currently to boot ExectOS on a legacy BIOS.
# Source structure
| Directory | Description |

2
boot/bootsect/CMakeLists.txt
View File

@@ -1,8 +1,6 @@
# XT Boot Sector
PROJECT(BOOTSECT)
add_definitions("-DARCH_ESP_SOURCE=\\\"${ARCH}/cpu.S\\\"")
# Compile boot sectors
compile_bootsector(mbrboot ${BOOTSECT_SOURCE_DIR}/mbrboot.S 0x7C00 Start)
compile_bootsector(espboot ${BOOTSECT_SOURCE_DIR}/espboot.S 0x7C00 Start)

144
boot/bootsect/amd64/cpu.S
View File

@@ -1,144 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: boot/bootsect/amd64/cpu.S
* DESCRIPTION: Low-level support for CPU initialization
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
BuildPageMap:
/* Generate page map for first 1GB of memory */
pushaw
pushw %es
cld
movw $(0x1000 / 16), %ax
movw %ax, %es
xorw %di, %di
movl $(0x2000 | 0x07), %eax
stosl
xorl %eax, %eax
movw $1021, %cx
rep stosl
movw $(0x2000 / 16), %ax
movw %ax, %es
xorw %di, %di
movl $(0x3000 | 0x07), %eax
stosl
xorl %eax, %eax
movw $1021, %cx
rep stosl
movw $(0x3000 / 16), %ax
movw %ax, %es
xorw %di, %di
movw $512, %cx
movl $0x00000083, %eax
.BuildPageMapLoop:
/* Identity map 512 pages of 2MB */
movl %eax, %es:(%di)
addl $2097152, %eax
addw $0x08, %di
loop .BuildPageMapLoop
popw %es
popaw
ret
InitializeCpu:
/* Check if CPU supports CPUID, long mode and PAE */
pushal
pushfl
popl %eax
movl %eax, %ebx
xorl $0x00200000, %eax
pushl %eax
popfl
pushfl
popl %eax
cmpl %ebx, %eax
je CpuUnsupported
movl $0x01, %eax
cpuid
testl $0x40, %edx
jz CpuUnsupported
movl $0x80000000, %eax
cpuid
cmpl $0x80000000, %eax
jbe CpuUnsupported
movl $0x80000001, %eax
cpuid
testl $0x20000000, %edx
jz CpuUnsupported
popal
call LoadGdt
ret
LoadGdt:
/* Load Global Descriptor Table */
lgdt .GdtPointer
ret
RunStage2:
/* Switch to long mode and pass control to Stage 2 */
call BuildPageMap
call ParseExecutableHeader
xorl %edx, %edx
pushl %edx
pushl %eax
cli
xorw %ax, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %fs
movw %ax, %gs
movw %ax, %ss
movl %cr4, %eax
orl $0x00A0, %eax
movl %eax, %cr4
movl $0x00001000, %eax
movl %eax, %cr3
movl $0xC0000080, %ecx
rdmsr
orl $0x00000100, %eax
wrmsr
movl %cr0, %eax
orl $0x80000001, %eax
movl %eax, %cr0
ljmp $0x10, $.Stage2LongMode
.code64
.Stage2LongMode:
/* Set segments and stack, then jump to Stage 2 */
movw $0x18, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
xorw %ax, %ax
movw %ax, %fs
movw %ax, %gs
popq %rax
xorq %rbx, %rbx
xorq %rcx, %rcx
xorq %rdx, %rdx
xorq %rsi, %rsi
xorq %rdi, %rdi
xorq %rbp, %rbp
jmp *%rax
.code16
.GdtDescriptor:
/* Global Descriptor Table */
.quad 0x0000000000000000
.quad 0x0000000000000000
.quad 0x00AF9A000000FFFF
.quad 0x00CF92000000FFFF
.quad 0x00009E000000FFFF
.quad 0x000092000000FFFF
.quad 0x00CF9B000000FFFF
.GdtPointer:
/* Pointer to Global Descriptor Table */
.word .GdtPointer - .GdtDescriptor - 1
.long .GdtDescriptor
.Stage2FileName:
/* Name of Stage 2 executable file */
.ascii "BOOTX64 EFI"

322
boot/bootsect/espboot.S
View File

@@ -121,15 +121,15 @@ VerifyBiosParameterBlock:
ja FsError
ReadExtraCode:
/* Read second VBR sector with extra boot code (3 sectors starting from sector 2) */
/* Read second VBR sector with extra boot code */
movl HiddenSectors - Start(%bp), %eax
addl $0x02, %eax
movw $0x03, %cx
movw $0x01, %cx
xorw %bx, %bx
movw %bx, %es
movw $0x7E00, %bx
call ReadSectors
jmp StartExtraCode
jmp StartSectors
ReadSectors:
/* Check for extended BIOS functions and use it only if available */
@@ -139,23 +139,19 @@ ReadSectors:
movw $0x55AA, %bx
movb DriveNumber - Start(%bp), %dl
int $0x13
jc .ReadCHS
jc ReadCHS
cmpw $0xAA55, %bx
jne .ReadCHS
jne ReadCHS
testb $0x01, %cl
jz .ReadCHS
jz ReadCHS
/* Verify drive size and determine whether to use CHS or LBA */
cmpl %edi, %eax
jnb .ReadLBA
jnb ReadLBA
.ReadCHS:
ReadCHS:
/* Read sectors using CHS */
popal
.CHSLoop:
/* Read sector by sector using CHS */
pushw %cx
pushal
xorl %edx, %edx
movzwl SectorsPerTrack - Start(%bp), %ecx
@@ -173,18 +169,17 @@ ReadSectors:
orb %ah, %cl
movw $0x0201, %ax
int $0x13
popal
popw %cx
jc DiskError
popal
incl %eax
movw %es, %dx
addw $0x20, %dx
movw %dx, %es
loop .CHSLoop
loop ReadCHS
popw %es
ret
.ReadLBA:
ReadLBA:
/* Prepare DAP packet and read sectors using LBA */
popal
pushw %cx
@@ -213,19 +208,19 @@ ReadSectors:
movw %dx, %es
popw %bx
subw %si, %cx
jnz .ReadLBA
jnz ReadLBA
popw %es
ret
DiskError:
/* Display disk error message and reboot */
movw $.MsgDiskError, %si
movw $msgDiskError, %si
call Print
jmp Reboot
FsError:
/* Display FS error message and reboot */
movw $.MsgFsError, %si
movw $msgFsError, %si
call Print
jmp Reboot
@@ -233,297 +228,48 @@ Print:
/* Simple routine to print messages */
lodsb
orb %al, %al
jz .DonePrint
jz DonePrint
movb $0x0E, %ah
movw $0x07, %bx
int $0x10
jmp Print
.DonePrint:
DonePrint:
retw
Reboot:
/* Display a message, wait for a key press and reboot */
movw $.MsgAnyKey, %si
movw $msgAnyKey, %si
call Print
xorw %ax, %ax
int $0x16
int $0x19
.MsgAnyKey:
.ascii "Press any key to restart...\r\n\0"
msgAnyKey:
.ascii "Press any key to restart\r\n"
.MsgDiskError:
.ascii "Disk error!\r\n\0"
msgDiskError:
.ascii "Disk error\r\n"
.MsgFsError:
.ascii "File system error!\r\n\0"
msgFsError:
.ascii "File system error\r\n"
/* Fill the rest of the VBR with zeros and add VBR signature at the end */
.fill (510 - (. - Start)), 1, 0
.word 0xAA55
StartExtraCode:
/* Load XTLDR file from disk */
call LoadStage2
/* Enable A20 gate */
call EnableA20
/* Call architecture specific initialization code */
call InitializeCpu
/* Jump to Stage2 */
call RunStage2
Clear8042:
/* Clear 8042 PS/2 buffer */
nop
nop
nop
nop
inb $0x64, %al
cmpb $0xff, %al
je .Clear8042_Done
testb $0x02, %al
jnz Clear8042
.Clear8042_Done:
ret
EnableA20:
/* Enable A20 gate */
pushaw
call Clear8042
movb $0xD1, %al
outb %al, $0x64
call Clear8042
movb $0xDF, %al
outb %al, $0x60
call Clear8042
movb $0xFF, %al
outb %al, $0x64
call Clear8042
popaw
ret
FindFatEntry:
/* Find a file or directory in the FAT table */
pushw %bx
pushw %cx
pushw %dx
pushw %si
pushw %di
.FindFatCluster:
/* Find FAT32 cluster holding the entry */
cmp $0x0FFFFFF8, %eax
jae .FindEntryFail
pushl %eax
movw $0x0200, %bx
movw %bx, %es
call ReadCluster
popl %eax
movb SectorsPerCluster - Start(%bp), %cl
shlw $0x04, %cx
xorw %di, %di
.FindEntryLoop:
/* Find the entry */
movb %es:(%di), %al
cmpb $0x00, %al
je .FindEntryFail
cmpb $0xE5, %al
je .FindSkipEntry
movb %es:0x0B(%di), %ah
cmpb $0x0F, %ah
je .FindSkipEntry
pushw %di
pushw %si
pushw %cx
movw $0x0B, %cx
repe cmpsb
popw %cx
popw %si
popw %di
jnz .FindSkipEntry
movw %es:0x1A(%di), %ax
movw %es:0x14(%di), %dx
shll $0x10, %edx
orl %edx, %eax
clc
jmp .FindEntryDone
.FindSkipEntry:
/* Skip to the next entry */
addw $0x20, %di
decw %cx
jnz .FindEntryLoop
call GetFatEntry
jmp .FindFatCluster
.FindEntryFail:
/* Error, file/directory not found */
stc
.FindEntryDone:
/* Clean up the stack */
popw %di
popw %si
popw %dx
popw %cx
popw %bx
ret
GetFatEntry:
/* Get FAT32 sector and offset from FAT table */
shll $0x02, %eax
movl %eax, %ecx
xorl %edx, %edx
movzwl BytesPerSector - Start(%bp), %ebx
pushl %ebx
divl %ebx
movzwl ReservedSectors - Start(%bp), %ebx
addl %ebx, %eax
movl HiddenSectors - Start(%bp), %ebx
addl %ebx, %eax
popl %ebx
decl %ebx
andl %ebx, %ecx
movzwl ExtendedFlags - Start(%bp), %ebx
andw $0x0F, %bx
jz LoadFatSector
cmpb FatCopies - Start(%bp), %bl
jae FsError
pushl %eax
movl BigSectorsPerFat - Start(%bp), %eax
mull %ebx
popl %edx
addl %edx, %eax
LoadFatSector:
/* Load FAT32 sector from disk */
pushl %ecx
movw $0x9000, %bx
movw %bx, %es
cmpl %esi, %eax
je .LoadFatSectorDone
movl %eax, %esi
xorw %bx, %bx
movw $0x01, %cx
call ReadSectors
.LoadFatSectorDone:
/* Clean up the stack */
popl %ecx
movl %es:(%ecx), %eax
andl $0x0FFFFFFF, %eax
ret
LoadStage2:
/* Load Stage2 executable, first find file in the path */
movl $0xFFFFFFFF, %esi
pushl %esi
movl 0x7C2C, %eax
movw $.EfiDirName, %si
call FindFatEntry
jc Stage2NotLoaded
movw $.BootDirName, %si
call FindFatEntry
jc Stage2NotLoaded
movw $.Stage2FileName, %si
call FindFatEntry
jc Stage2NotLoaded
popl %esi
/* Load XTLDR file from disk */
cmpl $0x02, %eax
jb FileNotFound
cmpl $0x0FFFFFF8, %eax
jae FileNotFound
movw $(0xF800 / 16), %bx
movw %bx, %es
.LoadStage2Loop:
/* Load file data from disk */
pushl %eax
xorw %bx, %bx
pushw %es
call ReadCluster
popw %es
xorw %bx, %bx
movb SectorsPerCluster - Start(%bp), %bl
shlw $0x05, %bx
movw %es, %ax
addw %bx, %ax
movw %ax, %es
popl %eax
pushw %es
call GetFatEntry
popw %es
cmpl $0x0FFFFFF8, %eax
jb .LoadStage2Loop
ret
ParseExecutableHeader:
/* Parse Stage2 PE/COFF executable header */
pushw %es
movw $(0xF800 / 16), %ax
movw %ax, %es
movl %es:60, %eax
addl $(4 + 20), %eax
movl %es:16(%eax), %eax
addl $0xF800, %eax
popw %es
ret
ReadCluster:
/* Read FAT32 cluster from disk */
decl %eax
decl %eax
xorl %edx, %edx
movzbl SectorsPerCluster - Start(%bp), %ebx
mull %ebx
pushl %eax
xorl %edx, %edx
movzbl FatCopies - Start(%bp), %eax
mull BigSectorsPerFat - Start(%bp)
movzwl ReservedSectors - Start(%bp), %ebx
addl %ebx, %eax
addl HiddenSectors - Start(%bp), %eax
popl %ebx
addl %ebx, %eax
xorw %bx, %bx
movzbw SectorsPerCluster - Start(%bp), %cx
call ReadSectors
ret
/* Include architecture specific code */
.include ARCH_ESP_SOURCE
CpuUnsupported:
/* Display CPU unsupported message and reboot */
popal
movw $.MsgCpuUnsupported, %si
StartSectors:
/* Print message */
movw $msgUnavailable, %si
call Print
jmp Reboot
FileNotFound:
/* Display XTLDR not found message and reboot */
movw $.MsgXtLdrNotFound, %si
call Print
jmp Reboot
/* Wait for key press and reboot */
xorw %ax, %ax
int $0x16
int $0x19
Stage2NotLoaded:
/* Clean up the stack and display XTLDR not found message and reboot */
popl %esi
jmp FileNotFound
msgUnavailable:
.ascii "XTLDR requires EFI-based system!\r\nPress any key to restart\r\n"
.BootDirName:
/* Boot directory name */
.ascii "BOOT "
.EfiDirName:
/* EFI directory name */
.ascii "EFI "
.MsgCpuUnsupported:
.ascii "CPU not supported!\r\n\0"
.MsgXtLdrNotFound:
.ascii "XTLDR Stage2 not found!\r\n\0"
/* Fill the rest of the extra VBR with zeros and add signature */
.fill (2043 - (. - Start)), 1, 0
.ascii "XTLDR"
/* Fill the rest of the extra VBR with zeros */
.fill (1024 - (. - Start)), 1, 0

124
boot/bootsect/i686/cpu.S
View File

@@ -1,124 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: boot/bootsect/i686/cpu.S
* DESCRIPTION: Low-level support for CPU initialization
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
BuildPageMap:
/* Generate page map for first 16MB of memory */
pushaw
pushw %es
cld
movw $(0x1000 >> 0x04), %ax
movw %ax, %es
xorw %di, %di
movl $(0x2000 | 0x03), %eax
stosl
movl $(0x3000 | 0x03), %eax
stosl
movl $(0x4000 | 0x03), %eax
stosl
movl $(0x5000 | 0x03), %eax
stosl
xorl %eax, %eax
movw $(1024 - 4), %cx
rep stosl
movl $0x00000003, %eax
movl $4, %edx
movw $(0x2000 >> 0x04), %bx
.BuildPageMapLoop:
/* Identity map 1024 pages of 4KB */
movw %bx, %es
xorw %di, %di
pushl %edx
movw $1024, %cx
.FillPageMapTable:
/* Fill the page table */
movl %eax, %es:(%di)
addl $4096, %eax
addw $0x04, %di
loop .FillPageMapTable
popl %edx
addw $(0x1000 >> 0x04), %bx
decl %edx
jnz .BuildPageMapLoop
popw %es
popaw
ret
InitializeCpu:
/* Check if CPU supports CPUID */
pushal
pushfl
popl %eax
movl %eax, %ebx
xorl $0x00200000, %eax
pushl %eax
popfl
pushfl
popl %eax
cmpl %ebx, %eax
je CpuUnsupported
popal
call LoadGdt
ret
LoadGdt:
/* Load Global Descriptor Table */
lgdt .GdtPointer
ret
RunStage2:
/* Switch to protected mode and pass control to Stage 2 */
call BuildPageMap
call ParseExecutableHeader
pushl %eax
cli
movl %cr0, %eax
orl $0x01, %eax
movl %eax, %cr0
ljmp $0x08, $.Stage2ProtectedMode
.code32
.Stage2ProtectedMode:
/* Set segments and stack, then jump to Stage 2 */
movw $0x10, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
xorw %ax, %ax
movw %ax, %fs
movw %ax, %gs
popl %eax
xorl %ebx, %ebx
xorl %ecx, %ecx
xorl %edx, %edx
xorl %esi, %esi
xorl %edi, %edi
xorl %ebp, %ebp
movl $0x1000, %ebx
movl %ebx, %cr3
movl %cr0, %ebx
orl $0x80000000, %ebx
movl %ebx, %cr0
jmp *%eax
.code16
.GdtDescriptor:
/* Global Descriptor Table */
.quad 0x0000000000000000
.quad 0x00CF9A000000FFFF
.quad 0x00CF92000000FFFF
.quad 0x00009E000000FFFF
.quad 0x000092000000FFFF
.GdtPointer:
/* Pointer to Global Descriptor Table */
.word .GdtPointer - .GdtDescriptor - 1
.long .GdtDescriptor
.Stage2FileName:
/* Name of Stage 2 executable file */
.ascii "BOOTIA32EFI"

17
boot/bootsect/mbrboot.S
View File

@@ -4,7 +4,6 @@
* FILE: boot/bootsect/amd64/mbrboot.S
* DESCRIPTION: XT Boot Loader MBR boot code
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <aiken@codingworkshop.eu.org>
*/
.text
@@ -42,7 +41,7 @@ RealStart:
movw %ax, %ss
/* Print welcome message */
leaw .MsgXtosBoot, %si
leaw msgXtosBoot, %si
call Print
/* Get BIOS boot drive and partition table offset */
@@ -91,19 +90,19 @@ PartitionFound:
InvalidSignature:
/* Invalid signature error */
leaw .MsgInvalidSignature, %si
leaw msgInvalidSignature, %si
call Print
jmp HaltSystem
PartitionNotFound:
/* Active partition not found error */
leaw .MsgPartitionNotFound, %si
leaw msgPartitionNotFound, %si
call Print
jmp HaltSystem
VbrReadFail:
/* VBR read failed error */
leaw .MsgVbrReadFail, %si
leaw msgVbrReadFail, %si
call Print
jmp HaltSystem
@@ -137,16 +136,16 @@ DonePrint:
/* Storage for the LBA start */
.long 0
.MsgInvalidSignature:
msgInvalidSignature:
.asciz "Invalid partition signature!"
.MsgPartitionNotFound:
msgPartitionNotFound:
.asciz "Bootable partition not found!"
.MsgVbrReadFail:
msgVbrReadFail:
.asciz "VBR read failed!"
.MsgXtosBoot:
msgXtosBoot:
.asciz "Starting XTOS boot loader...\r\n"
/* Fill the rest of the MBR with zeros and add MBR signature at the end */

5
boot/xtldr/CMakeLists.txt
View File

@@ -16,7 +16,6 @@ list(APPEND LIBXTLDR_SOURCE
# Specify list of source code files
list(APPEND XTLDR_SOURCE
${XTLDR_SOURCE_DIR}/arch/${ARCH}/memory.cc
${XTLDR_SOURCE_DIR}/biosutil.cc
${XTLDR_SOURCE_DIR}/bootutil.cc
${XTLDR_SOURCE_DIR}/config.cc
${XTLDR_SOURCE_DIR}/console.cc
@@ -39,9 +38,6 @@ add_executable(xtldr ${XTLDR_SOURCE})
# Add linker libraries
target_link_libraries(xtldr libxtos)
# Add linker options
target_link_options(xtldr PRIVATE /ALIGN:512)
# Set proper binary name and install target
if(ARCH STREQUAL "i686")
set(BINARY_NAME "bootia32")
@@ -53,6 +49,5 @@ set_install_target(xtldr efi/boot)
# Set loader entrypoint and subsystem
set_entrypoint(xtldr "BlStartXtLoader")
set_imagebase(xtldr ${BASEADDRESS_XTLDR})
set_linker_map(xtldr TRUE)
set_subsystem(xtldr efi_application)

49
boot/xtldr/arch/amd64/memory.cc
View File

@@ -28,12 +28,13 @@ EFI_STATUS
Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONG_PTR SelfMapAddress)
{
PLIST_ENTRY ModulesList, ModulesListEntry;
PLIST_ENTRY ListEntry, ModulesList, ModulesListEntry;
PXTBL_MEMORY_MAPPING Mapping;
PXTBL_MODULE_INFO ModuleInfo;
EFI_PHYSICAL_ADDRESS Address;
PVOID LoaderBase;
ULONGLONG LoaderSize;
EFI_STATUS Status;
PVOID LoaderBase;
/* Allocate pages for the Page Map */
Status = AllocatePages(AllocateAnyPages, 1, &Address);
@@ -43,14 +44,6 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Add new memory mapping for the page map itself */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
return Status;
}
/* Assign and zero-fill memory used by page mappings */
PageMap->PtePointer = (PVOID)(UINT_PTR)Address;
RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE);
@@ -64,7 +57,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
}
/* Map the trampoline code area */
Status = MapVirtualMemory(PageMap, MM_TRAMPOLINE_ADDRESS, MM_TRAMPOLINE_ADDRESS,
Status = MapVirtualMemory(PageMap, (PVOID)MM_TRAMPOLINE_ADDRESS,(PVOID)MM_TRAMPOLINE_ADDRESS,
1, LoaderFirmwareTemporary);
if(Status != STATUS_EFI_SUCCESS)
{
@@ -81,7 +74,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
ModuleInfo = CONTAIN_RECORD(ModulesListEntry, XTBL_MODULE_INFO, Flink);
/* Map module code */
Status = MapVirtualMemory(PageMap, (ULONGLONG)ModuleInfo->ModuleBase, (ULONGLONG)ModuleInfo->ModuleBase,
Status = MapVirtualMemory(PageMap, ModuleInfo->ModuleBase, ModuleInfo->ModuleBase,
EFI_SIZE_TO_PAGES(ModuleInfo->ModuleSize), LoaderFirmwareTemporary);
/* Check if mapping succeeded */
@@ -102,7 +95,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
if(LoaderBase && LoaderSize)
{
/* Map boot loader code as well */
Status = MapVirtualMemory(PageMap, (ULONGLONG)LoaderBase, (ULONGLONG)LoaderBase,
Status = MapVirtualMemory(PageMap, LoaderBase, LoaderBase,
EFI_SIZE_TO_PAGES(LoaderSize), LoaderFirmwareTemporary);
if(Status != STATUS_EFI_SUCCESS)
{
@@ -116,28 +109,6 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return STATUS_EFI_PROTOCOL_ERROR;
}
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Iterates through the memory map and physically maps all virtual addresses to page tables.
*
* @param PageMap
* Supplies a pointer to the page mapping structure.
*
* @return This routine returns a status code.
*
* @since XT 1.0
*/
XTCDECL
EFI_STATUS
Memory::CommitPageMap(IN PXTBL_PAGE_MAPPING PageMap)
{
PXTBL_MEMORY_MAPPING Mapping;
PLIST_ENTRY ListEntry;
EFI_STATUS Status;
/* Iterate through and map all the mappings*/
Debug::Print(L"Mapping and dumping EFI memory:\n");
ListEntry = PageMap->MemoryMap.Flink;
@@ -222,7 +193,7 @@ Memory::GetNextPageTable(IN PXTBL_PAGE_MAPPING PageMap,
}
/* Add new memory mapping */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)(UINT_PTR)Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
@@ -268,9 +239,9 @@ Memory::GetNextPageTable(IN PXTBL_PAGE_MAPPING PageMap,
XTCDECL
EFI_STATUS
Memory::MapPage(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONGLONG VirtualAddress,
IN ULONGLONG PhysicalAddress,
IN ULONGLONG NumberOfPages)
IN ULONG_PTR VirtualAddress,
IN ULONG_PTR PhysicalAddress,
IN ULONG NumberOfPages)
{
PVOID Pml1, Pml2, Pml3, Pml4, Pml5;
SIZE_T Pml1Entry, Pml2Entry, Pml3Entry, Pml4Entry, Pml5Entry;

73
boot/xtldr/arch/i686/memory.cc
View File

@@ -25,12 +25,13 @@ EFI_STATUS
Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONG_PTR SelfMapAddress)
{
PLIST_ENTRY ListEntry, ModulesList, ModulesListEntry;
EFI_PHYSICAL_ADDRESS Address, DirectoryAddress;
PLIST_ENTRY ModulesList, ModulesListEntry;
PXTBL_MODULE_INFO ModuleInfo;
PXTBL_MEMORY_MAPPING Mapping;
PVOID LoaderBase;
ULONGLONG LoaderSize;
EFI_STATUS Status;
PVOID LoaderBase;
ULONG Index;
/* Check the page map level to determine which paging structure to create */
@@ -44,14 +45,6 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Add new memory mapping for the page map itself */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
return Status;
}
/* Assign the allocated page to the page map and zero it out */
PageMap->PtePointer = (PVOID)(UINT_PTR)Address;
RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE);
@@ -64,14 +57,6 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Add new memory mapping for the Page Directories (PDs) */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, DirectoryAddress, 4, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
return Status;
}
/* Zero-fill the allocated memory for the Page Directories */
RTL::Memory::ZeroMemory((PVOID)DirectoryAddress, EFI_PAGE_SIZE * 4);
@@ -94,14 +79,6 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Add new memory mapping for the page map itself */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
return Status;
}
/* Assign the allocated page to the page map and zero it out */
PageMap->PtePointer = (PVOID)(UINT_PTR)Address;
RTL::Memory::ZeroMemory(PageMap->PtePointer, EFI_PAGE_SIZE);
@@ -116,7 +93,8 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
}
/* Map the trampoline code area */
Status = MapVirtualMemory(PageMap, MM_TRAMPOLINE_ADDRESS, MM_TRAMPOLINE_ADDRESS, 1, LoaderFirmwareTemporary);
Status = MapVirtualMemory(PageMap, (PVOID)MM_TRAMPOLINE_ADDRESS,(PVOID)MM_TRAMPOLINE_ADDRESS,
1, LoaderFirmwareTemporary);
if(Status != STATUS_EFI_SUCCESS)
{
/* Mapping trampoline code failed */
@@ -132,7 +110,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
ModuleInfo = CONTAIN_RECORD(ModulesListEntry, XTBL_MODULE_INFO, Flink);
/* Map module code */
Status = MapVirtualMemory(PageMap, (ULONGLONG)ModuleInfo->ModuleBase, (ULONGLONG)ModuleInfo->ModuleBase,
Status = MapVirtualMemory(PageMap, ModuleInfo->ModuleBase, ModuleInfo->ModuleBase,
EFI_SIZE_TO_PAGES(ModuleInfo->ModuleSize), LoaderFirmwareTemporary);
/* Check if mapping succeeded */
@@ -153,7 +131,7 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
if(LoaderBase && LoaderSize)
{
/* Map boot loader code as well */
Status = MapVirtualMemory(PageMap, (ULONGLONG)LoaderBase, (ULONGLONG)LoaderBase,
Status = MapVirtualMemory(PageMap, LoaderBase, LoaderBase,
EFI_SIZE_TO_PAGES(LoaderSize), LoaderFirmwareTemporary);
if(Status != STATUS_EFI_SUCCESS)
{
@@ -167,28 +145,6 @@ Memory::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
return STATUS_EFI_PROTOCOL_ERROR;
}
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Iterates through the memory map and physically maps all virtual addresses to page tables.
*
* @param PageMap
* Supplies a pointer to the page mapping structure.
*
* @return This routine returns a status code.
*
* @since XT 1.0
*/
XTCDECL
EFI_STATUS
Memory::CommitPageMap(IN PXTBL_PAGE_MAPPING PageMap)
{
PXTBL_MEMORY_MAPPING Mapping;
PLIST_ENTRY ListEntry;
EFI_STATUS Status;
/* Iterate through and map all the mappings*/
Debug::Print(L"Mapping and dumping EFI memory:\n");
ListEntry = PageMap->MemoryMap.Flink;
@@ -201,9 +157,8 @@ Memory::CommitPageMap(IN PXTBL_PAGE_MAPPING PageMap)
if(Mapping->VirtualAddress)
{
/* Dump memory mapping */
Debug::Print(L" Type=%02lu, PhysicalBase=0x%.8llX, VirtualBase=0x%.8llX, Pages=%llu\n",
Mapping->MemoryType, Mapping->PhysicalAddress,
Mapping->VirtualAddress, Mapping->NumberOfPages);
Debug::Print(L" Type=%02lu, PhysicalBase=%.8P, VirtualBase=%.8P, Pages=%llu\n", Mapping->MemoryType,
Mapping->PhysicalAddress, Mapping->VirtualAddress, Mapping->NumberOfPages);
/* Map memory */
Status = MapPage(PageMap, (UINT_PTR)Mapping->VirtualAddress,
@@ -297,7 +252,7 @@ Memory::GetNextPageTable(IN PXTBL_PAGE_MAPPING PageMap,
}
/* Add new memory mapping */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)(UINT_PTR)Address, 1, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory mapping failure */
@@ -358,11 +313,11 @@ Memory::GetNextPageTable(IN PXTBL_PAGE_MAPPING PageMap,
XTCDECL
EFI_STATUS
Memory::MapPage(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONGLONG VirtualAddress,
IN ULONGLONG PhysicalAddress,
IN ULONGLONG NumberOfPages)
IN ULONG_PTR VirtualAddress,
IN ULONG_PTR PhysicalAddress,
IN ULONG NumberOfPages)
{
ULONGLONG PageFrameNumber;
SIZE_T PageFrameNumber;
PVOID Pml1, Pml2, Pml3;
SIZE_T Pml1Entry, Pml2Entry, Pml3Entry;
PHARDWARE_LEGACY_PTE LegacyPmlTable;

190
boot/xtldr/biosutil.cc
View File

@@ -1,190 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtldr/biosutil.cc
* DESCRIPTION: Legacy BIOS support
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtldr.hh>
/**
* Clears the entire screen and moves the cursor to the top-left corner.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
BiosUtils::ClearScreen()
{
VOLATILE PUSHORT VgaBuffer = (PUSHORT)0xB8000;
USHORT Blank;
UINT Index;
/* Set blank character */
Blank = (0x0F << 8) | L' ';
/* Fill the entire screen with blank characters */
for(Index = 0; Index < VgaWidth * VgaHeight; Index++)
{
VgaBuffer[Index] = Blank;
}
/* Reset cursor position to the top-left corner */
CursorX = 0;
CursorY = 0;
/* Update the hardware cursor position */
UpdateCursor();
}
/**
* Formats the input string and prints it out to the screen.
*
* @param Format
* The formatted string that is to be written to the output.
*
* @param ...
* Depending on the format string, this routine might expect a sequence of additional arguments.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
BiosUtils::Print(IN PCWSTR Format,
IN ...)
{
RTL_PRINT_CONTEXT PrintContext;
VA_LIST Arguments;
/* Initialise the print contexts */
PrintContext.WriteWideCharacter = PutChar;
/* Initialise the va_list */
VA_START(Arguments, Format);
/* Format and print the string to the stdout */
RTL::WideString::FormatWideString(&PrintContext, (PWCHAR)Format, Arguments);
/* Clean up the va_list */
VA_END(Arguments);
}
/**
* Writes a single wide character to the screen using legacy BIOS VGA text mode.
*
* @param Character
* The wide character to be printed.
*
* @return This routine returns a status code.
*
* @since XT 1.0
*/
XTCDECL
XTSTATUS
BiosUtils::PutChar(IN WCHAR Character)
{
VOLATILE PUSHORT VgaBuffer = (PUSHORT)0xB8000;
USHORT VgaCharacter;
/* Handle special characters */
if(Character == L'\n')
{
/* Move to the next line */
CursorX = 0;
CursorY++;
}
else if(Character == L'\r')
{
/* Move to the beginning of the current line */
CursorX = 0;
}
else
{
/* Print character and move cursor to the right */
VgaCharacter = (0x0F << 8) | (Character & 0xFF);
VgaBuffer[CursorY * VgaWidth + CursorX] = VgaCharacter;
CursorX++;
}
/* Handle moving to the next line if cursor is at the end of the line */
if(CursorX >= VgaWidth)
{
CursorX = 0;
CursorY++;
}
/* Handle scrolling if cursor is at the end of the screen */
if(CursorY >= VgaHeight)
{
ScrollScreen();
CursorY = VgaHeight - 1;
}
/* Update the hardware cursor position */
UpdateCursor();
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Scrolls the entire screen content up by one line and clears the last line.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
BiosUtils::ScrollScreen()
{
VOLATILE PUSHORT VgaBuffer = (PUSHORT)0xB8000;
USHORT Blank;
UINT Index;
/* Set blank character */
Blank = (0x0F << 8) | L' ';
/* Move every line up by one */
for(Index = 0; Index < (VgaHeight - 1) * VgaWidth; Index++)
{
VgaBuffer[Index] = VgaBuffer[Index + VgaWidth];
}
/* Clear the last line */
for(Index = (VgaHeight - 1) * VgaWidth; Index < VgaHeight * VgaWidth; Index++)
{
VgaBuffer[Index] = Blank;
}
}
/**
* Updates the hardware cursor position on the screen.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
BiosUtils::UpdateCursor()
{
USHORT Position;
/* Calculate cursor position */
Position = CursorY * VgaWidth + CursorX;
/* Send command to set the high byte of the cursor position */
HL::IoPort::WritePort8(0x3D4, 0x0E);
HL::IoPort::WritePort8(0x3D5, (UCHAR)((Position >> 8) & 0xFF));
/* Send command to set the low byte of the cursor position */
HL::IoPort::WritePort8(0x3D4, 0x0F);
HL::IoPort::WritePort8(0x3D5, (UCHAR)(Position & 0xFF));
}

9
boot/xtldr/console.cc
View File

@@ -221,15 +221,10 @@ Console::QueryMode(OUT PUINT_PTR ResX,
* @since XT 1.0
*/
XTCDECL
EFI_STATUS
VOID
Console::ReadKeyStroke(OUT PEFI_INPUT_KEY Key)
{
/* Clear the key structure to prevent ghost keystrokes */
Key->ScanCode = 0;
Key->UnicodeChar = 0;
/* Read the keystroke from the EFI input console */
return XtLoader::GetEfiSystemTable()->ConIn->ReadKeyStroke(XtLoader::GetEfiSystemTable()->ConIn, Key);
XtLoader::GetEfiSystemTable()->ConIn->ReadKeyStroke(XtLoader::GetEfiSystemTable()->ConIn, Key);
}
/**

27
boot/xtldr/data.cc
View File

@@ -10,18 +10,6 @@
#include <xtldr.hh>
/* Legacy BIOS cursor X position */
USHORT BiosUtils::CursorX = 0;
/* Legacy BIOS cursor Y position */
USHORT BiosUtils::CursorY = 0;
/* Legacy BIOS screen height */
CONST USHORT BiosUtils::VgaHeight = 25;
/* Legacy BIOS screen width */
CONST USHORT BiosUtils::VgaWidth = 80;
/* XT Boot Loader menu list */
PLIST_ENTRY Configuration::BootMenuList = NULLPTR;
@@ -56,21 +44,6 @@ XTBL_LOADER_PROTOCOL Protocol::LoaderProtocol;
/* XT Boot Loader loaded modules list */
LIST_ENTRY Protocol::LoadedModules;
/* XT Boot Loader shell exit flag */
BOOLEAN Shell::ExitRequest;
/* XT Boot Loader shell history buffer */
WCHAR Shell::History[XTBL_SH_HISTORY_ENTRIES][XTBL_SH_MAX_LINE_LENGTH];
/* XT Boot Loader shell history count */
ULONG Shell::HistoryCount = 0;
/* XT Boot Loader shell history index */
ULONG Shell::HistoryIndex = 0;
/* XT Boot Loader shell commands list */
LIST_ENTRY Shell::ShellCommands;
/* List of available block devices */
LIST_ENTRY Volume::EfiBlockDevices;

6
boot/xtldr/includes/libxtos.hh
View File

@@ -15,7 +15,7 @@
/* Minimal forward references for AR classes used by XTLDR */
namespace AR
{
class CpuFunctions
class CpuFunc
{
public:
STATIC XTCDECL BOOLEAN CpuId(IN OUT PCPUID_REGISTERS Registers);
@@ -25,12 +25,12 @@ namespace AR
IN UINT_PTR Value);
};
class ProcessorSupport
class ProcSup
{
public:
STATIC XTAPI VOID GetTrampolineInformation(IN TRAMPOLINE_TYPE TrampolineType,
OUT PVOID *TrampolineCode,
OUT PULONG TrampolineSize);
OUT PULONG_PTR TrampolineSize);
};
}

71
boot/xtldr/includes/xtldr.hh
View File

@@ -15,25 +15,6 @@
#include <libxtos.hh>
class BiosUtils
{
private:
STATIC USHORT CursorX;
STATIC USHORT CursorY;
STATIC CONST USHORT VgaHeight;
STATIC CONST USHORT VgaWidth;
public:
STATIC XTCDECL VOID ClearScreen();
STATIC XTCDECL VOID Print(IN PCWSTR Format,
IN ...);
STATIC XTCDECL XTSTATUS PutChar(IN WCHAR Character);
private:
STATIC XTCDECL VOID ScrollScreen();
STATIC XTCDECL VOID UpdateCursor();
};
class BootUtils
{
public:
@@ -93,7 +74,7 @@ class Console
STATIC XTCDECL XTSTATUS PutChar(IN WCHAR Character);
STATIC XTCDECL VOID QueryMode(OUT PUINT_PTR ResX,
OUT PUINT_PTR ResY);
STATIC XTCDECL EFI_STATUS ReadKeyStroke(OUT PEFI_INPUT_KEY Key);
STATIC XTCDECL VOID ReadKeyStroke(OUT PEFI_INPUT_KEY Key);
STATIC XTCDECL VOID ResetInputBuffer();
STATIC XTCDECL VOID SetAttributes(IN ULONGLONG Attributes);
STATIC XTCDECL VOID SetCursorPosition(IN ULONGLONG PosX,
@@ -165,7 +146,6 @@ class Memory
OUT PVOID *Memory);
STATIC XTCDECL EFI_STATUS BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONG_PTR SelfMapAddress);
STATIC XTCDECL EFI_STATUS CommitPageMap(IN PXTBL_PAGE_MAPPING PageMap);
STATIC XTCDECL EFI_STATUS FreePages(IN ULONGLONG NumberOfPages,
IN EFI_PHYSICAL_ADDRESS Memory);
STATIC XTCDECL EFI_STATUS FreePool(IN PVOID Memory);
@@ -178,16 +158,15 @@ class Memory
IN SHORT PageMapLevel,
IN PAGE_SIZE PageSize);
STATIC XTCDECL EFI_STATUS MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
IN OUT PVOID *BaseAddress,
IN BOOLEAN IdentityMapping,
IN OUT PVOID *MemoryMapAddress,
IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine);
STATIC XTCDECL EFI_STATUS MapPage(IN PXTBL_PAGE_MAPPING PageMap,
IN ULONGLONG VirtualAddress,
IN ULONGLONG PhysicalAddress,
IN ULONGLONG NumberOfPages);
IN ULONG_PTR VirtualAddress,
IN ULONG_PTR PhysicalAddress,
IN ULONG NumberOfPages);
STATIC XTCDECL EFI_STATUS MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
IN ULONGLONG VirtualAddress,
IN ULONGLONG PhysicalAddress,
IN PVOID VirtualAddress,
IN PVOID PhysicalAddress,
IN ULONGLONG NumberOfPages,
IN LOADER_MEMORY_TYPE MemoryType);
STATIC XTCDECL PVOID PhysicalAddressToVirtual(IN PVOID PhysicalAddress,
@@ -253,47 +232,11 @@ class Protocol
class Shell
{
private:
STATIC BOOLEAN ExitRequest;
STATIC WCHAR History[XTBL_SH_HISTORY_ENTRIES][XTBL_SH_MAX_LINE_LENGTH];
STATIC ULONG HistoryCount;
STATIC ULONG HistoryIndex;
STATIC LIST_ENTRY ShellCommands;
public:
STATIC XTCDECL EFI_STATUS RegisterCommand(IN PCWSTR Command,
IN PCWSTR Description,
IN PBL_SHELL_COMMAND Handler);
STATIC XTCDECL VOID StartLoaderShell();
private:
STATIC XTCDECL VOID CommandExit(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID CommandHelp(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID CommandInsmod(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID CommandLsmod(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID CommandPoweroff(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID CommandReboot(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID CommandVersion(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL VOID ExecuteCommand(IN ULONG Argc,
IN PWCHAR *Argv);
STATIC XTCDECL EFI_STATUS ParseCommand(IN PWCHAR CommandLine,
OUT PULONG Argc,
OUT PWCHAR **Argv);
STATIC XTCDECL VOID PrintPrompt();
STATIC XTCDECL VOID PrintPromptLine(IN PWCHAR Buffer,
IN ULONG BufferLength,
IN ULONG CursorPosition,
IN ULONG PreviousBufferLength);
STATIC XTCDECL VOID ReadCommand(OUT PWCHAR Buffer,
IN ULONG BufferSize);
STATIC XTCDECL VOID RegisterBuiltinCommands();
};
class TextUi

141
boot/xtldr/memory.cc
View File

@@ -314,12 +314,9 @@ Memory::InitializePageMap(OUT PXTBL_PAGE_MAPPING PageMap,
* @param PageMap
* Supplies a pointer to the page mapping structure.
*
* @param BaseAddress
* @param MemoryMapAddress
* Supplies a virtual address, where EFI memory will be mapped.
*
* @param IdentityMapping
* Specifies whether EFI non-free memory should be mapped by identity or sequential mapping.
*
* @param GetMemoryTypeRoutine
* Supplies a pointer to the routine which will be used to match EFI memory type to the OS memory type.
*
@@ -330,20 +327,19 @@ Memory::InitializePageMap(OUT PXTBL_PAGE_MAPPING PageMap,
XTCDECL
EFI_STATUS
Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
IN OUT PVOID *BaseAddress,
IN BOOLEAN IdentityMapping,
IN OUT PVOID *MemoryMapAddress,
IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine)
{
ULONGLONG MaxAddress, VirtualAddress;
PEFI_MEMORY_DESCRIPTOR Descriptor;
LOADER_MEMORY_TYPE MemoryType;
PEFI_MEMORY_MAP MemoryMap;
SIZE_T DescriptorCount;
PUCHAR VirtualAddress;
EFI_STATUS Status;
SIZE_T Index;
/* Set virtual address as specified in argument */
VirtualAddress = (ULONGLONG)*BaseAddress;
VirtualAddress = (PUCHAR)*MemoryMapAddress;
/* Check if custom memory type routine is specified */
if(GetMemoryTypeRoutine == NULLPTR)
@@ -371,37 +367,8 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
/* Iterate through all descriptors from the memory map */
for(Index = 0; Index < DescriptorCount; Index++)
{
/* Check page map level */
if(PageMap->PageMapLevel == 2)
{
/* Limit physical address to 4GB in legacy mode */
MaxAddress = 0xFFFFFFFF;
}
else if(PageMap->PageMapLevel == 3)
{
/* Limit physical address to 64GB in PAE mode */
MaxAddress = 0xFFFFFFFFFULL;
}
/* Check page map level */
if(PageMap->PageMapLevel == 2 || PageMap->PageMapLevel == 3)
{
/* Check if physical address starts beyond limit */
if(Descriptor->PhysicalStart >= MaxAddress)
{
/* Go to the next descriptor */
Descriptor = (PEFI_MEMORY_DESCRIPTOR)((PUCHAR)Descriptor + MemoryMap->DescriptorSize);
continue;
}
/* Check if memory descriptor exceeds the lowest physical page */
if(Descriptor->PhysicalStart + (Descriptor->NumberOfPages << EFI_PAGE_SHIFT) > MaxAddress)
{
/* Truncate memory descriptor to the lowest supported physical page */
Descriptor->NumberOfPages = (MaxAddress - Descriptor->PhysicalStart) >> EFI_PAGE_SHIFT;
}
}
/* Make sure descriptor does not start beyond lowest physical page */
if(Descriptor->PhysicalStart <= MAXUINT_PTR)
{
/* Skip EFI reserved memory */
if(Descriptor->Type == EfiReservedMemoryType)
@@ -411,6 +378,25 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
continue;
}
/* Check if preparing page map level 2 (non-PAE i686) */
if(PageMap->PageMapLevel == 2)
{
/* Check if physical address starts beyond 4GB */
if(Descriptor->PhysicalStart > 0xFFFFFFFF)
{
/* Go to the next descriptor */
Descriptor = (PEFI_MEMORY_DESCRIPTOR)((PUCHAR)Descriptor + MemoryMap->DescriptorSize);
continue;
}
/* Check if memory descriptor exceeds the lowest physical page */
if(Descriptor->PhysicalStart + (Descriptor->NumberOfPages << EFI_PAGE_SHIFT) > MAXULONG)
{
/* Truncate memory descriptor to the 4GB */
Descriptor->NumberOfPages = (((ULONGLONG)MAXULONG + 1) - Descriptor->PhysicalStart) >> EFI_PAGE_SHIFT;
}
}
/* Convert EFI memory type into XTLDR memory type */
MemoryType = GetMemoryTypeRoutine((EFI_MEMORY_TYPE)Descriptor->Type);
@@ -418,32 +404,22 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
if(MemoryType == LoaderFirmwareTemporary)
{
/* Map EFI firmware code */
Status = MapVirtualMemory(PageMap, Descriptor->PhysicalStart,
Descriptor->PhysicalStart, Descriptor->NumberOfPages, MemoryType);
Status = MapVirtualMemory(PageMap, (PVOID)Descriptor->PhysicalStart,
(PVOID)Descriptor->PhysicalStart, Descriptor->NumberOfPages, MemoryType);
}
else if(MemoryType != LoaderFree)
{
/* Check mapping strategy */
if(IdentityMapping)
{
/* Add any non-free memory using identity mapping */
Status = MapVirtualMemory(PageMap, Descriptor->PhysicalStart + KSEG0_BASE, Descriptor->PhysicalStart,
Descriptor->NumberOfPages, MemoryType);
}
else
{
/* Add any non-free memory using sequential mapping */
Status = MapVirtualMemory(PageMap, VirtualAddress, Descriptor->PhysicalStart,
Descriptor->NumberOfPages, MemoryType);
/* Add any non-free memory mapping */
Status = MapVirtualMemory(PageMap, VirtualAddress, (PVOID)Descriptor->PhysicalStart,
Descriptor->NumberOfPages, MemoryType);
/* Update virtual address */
VirtualAddress = VirtualAddress + (Descriptor->NumberOfPages * MM_PAGE_SIZE);
}
/* Calculate next valid virtual address */
VirtualAddress += Descriptor->NumberOfPages * EFI_PAGE_SIZE;
}
else
{
/* Map all other memory as loader free */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Descriptor->PhysicalStart,
Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)Descriptor->PhysicalStart,
Descriptor->NumberOfPages, LoaderFree);
}
@@ -460,7 +436,7 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
}
/* Always map first page */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, 0, 1, LoaderFirmwarePermanent);
Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)0, 1, LoaderFirmwarePermanent);
if(Status != STATUS_EFI_SUCCESS)
{
/* Mapping failed */
@@ -468,7 +444,7 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
}
/* Map BIOS ROM and VRAM */
Status = MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, 0xA0000, 0x60, LoaderFirmwarePermanent);
Status = MapVirtualMemory(PageMap, NULLPTR, (PVOID)0xA0000, 0x60, LoaderFirmwarePermanent);
if(Status != STATUS_EFI_SUCCESS)
{
/* Mapping failed */
@@ -476,7 +452,7 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
}
/* Store next valid virtual address and return success */
*BaseAddress = (PVOID)VirtualAddress;
*MemoryMapAddress = VirtualAddress;
return STATUS_EFI_SUCCESS;
}
@@ -505,13 +481,13 @@ Memory::MapEfiMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
XTCDECL
EFI_STATUS
Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
IN ULONGLONG VirtualAddress,
IN ULONGLONG PhysicalAddress,
IN PVOID VirtualAddress,
IN PVOID PhysicalAddress,
IN ULONGLONG NumberOfPages,
IN LOADER_MEMORY_TYPE MemoryType)
{
PXTBL_MEMORY_MAPPING Mapping1, Mapping2, Mapping3;
ULONGLONG PhysicalAddressEnd, PhysicalAddress2End;
PVOID PhysicalAddressEnd, PhysicalAddress2End;
PLIST_ENTRY ListEntry, MappingListEntry;
SIZE_T NumberOfMappedPages;
EFI_STATUS Status;
@@ -531,7 +507,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
Mapping1->MemoryType = MemoryType;
/* Calculate the end of the physical address */
PhysicalAddressEnd = PhysicalAddress + (NumberOfPages * EFI_PAGE_SIZE) - 1;
PhysicalAddressEnd = (PVOID)((ULONG_PTR)PhysicalAddress + (NumberOfPages * EFI_PAGE_SIZE) - 1);
/* Iterate through all the mappings already set to insert new mapping at the correct place */
ListEntry = PageMap->MemoryMap.Flink;
@@ -539,7 +515,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
{
/* Take a mapping from the list and calculate its end of physical address */
Mapping2 = CONTAIN_RECORD(ListEntry, XTBL_MEMORY_MAPPING, ListEntry);
PhysicalAddress2End = Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1;
PhysicalAddress2End = (PVOID)((ULONG_PTR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1);
/* Check if new mapping is a subset of an existing mapping */
if(Mapping1->PhysicalAddress >= Mapping2->PhysicalAddress && PhysicalAddressEnd <= PhysicalAddress2End)
@@ -547,8 +523,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
/* Make sure it's memory type is the same */
if(Mapping1->MemoryType == Mapping2->MemoryType)
{
/* Free the unused mapping structure and return success */
FreePool(Mapping1);
/* It is already mapped */
return STATUS_EFI_SUCCESS;
}
}
@@ -564,7 +539,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
}
/* Calculate number of pages for this mapping */
NumberOfMappedPages = (PhysicalAddress2End - PhysicalAddressEnd) / EFI_PAGE_SIZE;
NumberOfMappedPages = ((PUCHAR)PhysicalAddress2End - (PUCHAR)PhysicalAddressEnd) / EFI_PAGE_SIZE;
if(NumberOfMappedPages > 0)
{
/* Pages associated to the mapping, allocate memory for it */
@@ -575,21 +550,18 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Set mapping fields */
Mapping3->PhysicalAddress = PhysicalAddressEnd + 1;
Mapping3->VirtualAddress = (ULONGLONG)NULLPTR;
/* Set mapping fields and insert it on the top */
Mapping3->PhysicalAddress = (PUCHAR)PhysicalAddressEnd + 1;
Mapping3->VirtualAddress = NULLPTR;
Mapping3->NumberOfPages = NumberOfMappedPages;
Mapping3->MemoryType = Mapping2->MemoryType;
/* Insert new mapping in front of the list and increase page map size */
RTL::LinkedList::InsertHeadList(&Mapping2->ListEntry, &Mapping3->ListEntry);
PageMap->MapSize++;
}
/* Calculate number of pages and the end of the physical address */
Mapping2->NumberOfPages = ((PUCHAR)PhysicalAddressEnd + 1 -
(PUCHAR)Mapping2->PhysicalAddress) / EFI_PAGE_SIZE;
PhysicalAddress2End = Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1;
PhysicalAddress2End = (PVOID)((ULONG_PTR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1);
}
/* Check if they overlap */
@@ -614,21 +586,18 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Set mapping fields */
/* Set mapping fields and insert it on the top */
Mapping3->PhysicalAddress = Mapping1->PhysicalAddress;
Mapping3->VirtualAddress = (ULONGLONG)NULLPTR;
Mapping3->VirtualAddress = NULLPTR;
Mapping3->NumberOfPages = NumberOfMappedPages;
Mapping3->MemoryType = Mapping2->MemoryType;
/* Insert new mapping in front of the list and increase page map size */
RTL::LinkedList::InsertHeadList(&Mapping2->ListEntry, &Mapping3->ListEntry);
PageMap->MapSize++;
}
/* Calculate number of pages and the end of the physical address */
Mapping2->NumberOfPages = ((PUCHAR)Mapping1->PhysicalAddress -
(PUCHAR)Mapping2->PhysicalAddress) / EFI_PAGE_SIZE;
PhysicalAddress2End = Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1;
PhysicalAddress2End = (PVOID)((ULONG_PTR)Mapping2->PhysicalAddress + (Mapping2->NumberOfPages * EFI_PAGE_SIZE) - 1);
}
/* Check if mapping is really needed */
@@ -650,19 +619,15 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
Status = FreePool(Mapping2);
ListEntry = MappingListEntry;
/* Decrease page map size and go to the next mapping */
PageMap->MapSize--;
/* Go to the next mapping */
continue;
}
/* Determine physical address order */
if(Mapping2->PhysicalAddress > Mapping1->PhysicalAddress)
{
/* Insert new mapping in front of the list and increase page map size */
/* Insert new mapping in front */
RTL::LinkedList::InsertHeadList(Mapping2->ListEntry.Blink, &Mapping1->ListEntry);
PageMap->MapSize++;
/* Return success */
return STATUS_EFI_SUCCESS;
}
@@ -670,7 +635,7 @@ Memory::MapVirtualMemory(IN OUT PXTBL_PAGE_MAPPING PageMap,
ListEntry = ListEntry->Flink;
}
/* Insert new mapping to the tail of the list and increase page map size */
/* Insert new mapping to the list and increase page map size */
RTL::LinkedList::InsertTailList(&PageMap->MemoryMap, &Mapping1->ListEntry);
PageMap->MapSize++;

2
boot/xtldr/modules/pecoff/pecoff.cc
View File

@@ -729,11 +729,11 @@ PeCoff::RelocateLoadedImage(IN PPECOFF_IMAGE_CONTEXT Image)
}
else
{
/* Check if loaded 32-bit PE32 image should be relocated */
/* Set relocation data directory and image base address */
DataDirectory = &Image->PeHeader->OptionalHeader32.DataDirectory[PECOFF_IMAGE_DIRECTORY_ENTRY_BASERELOC];
ImageBase = Image->PeHeader->OptionalHeader32.ImageBase;
/* Check if loaded 32-bit PE32 image should be relocated */
if(Image->PeHeader->OptionalHeader32.NumberOfRvaAndSizes <= PECOFF_IMAGE_DIRECTORY_ENTRY_BASERELOC ||
DataDirectory->VirtualAddress == 0 || DataDirectory->Size < sizeof(PECOFF_IMAGE_BASE_RELOCATION))
{

78
boot/xtldr/modules/xtos_o/amd64/memory.cc
View File

@@ -10,49 +10,6 @@
#include <xtos.hh>
XTCDECL
EFI_STATUS
Xtos::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap)
{
EFI_STATUS Status;
/* Build page map */
Status = XtLdrProtocol->Memory.BuildPageMap(PageMap, (PageMap->PageMapLevel > 4) ? MM_P5E_LA57_BASE : MM_PXE_BASE);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to build page map */
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Map memory for hardware layer */
Status = MapHardwareMemoryPool(PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to map memory for hardware layer */
XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware leyer (Status code: %zX)\n", Status);
return Status;
}
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Determines the appropriate EFI memory mapping strategy for the AMD64 architecture.
*
* @return This routine returns TRUE, what results in an identity mapping.
*
* @since XT 1.0
*/
XTCDECL
BOOLEAN
Xtos::DetermineMappingStrategy()
{
/* Use an identity mapping strategy */
return TRUE;
}
/**
* Determines the appropriate paging level (PML) for the AMD64 architecture.
*
@@ -116,9 +73,27 @@ Xtos::EnablePaging(IN PXTBL_PAGE_MAPPING PageMap)
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS TrampolineAddress;
PXT_TRAMPOLINE_ENTRY TrampolineEntry;
ULONG TrampolineSize;
ULONG_PTR TrampolineSize;
PVOID TrampolineCode;
/* Build page map */
Status = XtLdrProtocol->Memory.BuildPageMap(PageMap, (PageMap->PageMapLevel > 4) ? MM_P5E_LA57_BASE : MM_PXE_BASE);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to build page map */
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Map memory for hardware layer */
Status = MapHardwareMemoryPool(PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to map memory for hardware layer */
XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware leyer (Status code: %zX)\n", Status);
return Status;
}
/* Check the configured page map level to set the LA57 state accordingly */
if(PageMap->PageMapLevel == 5)
{
@@ -198,7 +173,6 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
PHARDWARE_PTE P5eBase, PdeBase, PpeBase, PxeBase;
EFI_PHYSICAL_ADDRESS Address;
EFI_STATUS Status;
ULONG Index;
if(PageMap->PageMapLevel == 5)
{
@@ -216,9 +190,6 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
return Status;
}
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Zero fill memory used by P5E */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
@@ -253,9 +224,6 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
return Status;
}
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Zero fill memory used by PXE */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
@@ -284,9 +252,6 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
return Status;
}
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Zero fill memory used by PPE */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
@@ -305,7 +270,7 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
}
/* Loop through 2 PDE entries */
for(Index = 0 ; Index < 2 ; Index++)
for(UINT Index = 0 ; Index < 2 ; Index++)
{
/* Check if PDE entry already exists */
if(!PdeBase[((MM_HARDWARE_VA_START >> MM_PDI_SHIFT) & 0x1FF) + Index].Valid)
@@ -318,9 +283,6 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
return Status;
}
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Zero fill memory used by PDE */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);

77
boot/xtldr/modules/xtos_o/i686/memory.cc
View File

@@ -9,62 +9,6 @@
#include <xtos.hh>
XTCDECL
EFI_STATUS
Xtos::BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap)
{
ULONG_PTR SelfMapAddress;
EFI_STATUS Status;
/* Initialize self map address */
if(PageMap->PageMapLevel == 3)
{
/* For PML3 (PAE) use PTE base address */
SelfMapAddress = MM_PTE_BASE;
}
else
{
/* For PML2 (PAE disabled) use legacy PDE base address */
SelfMapAddress = MM_PDE_LEGACY_BASE;
}
/* Build page map */
Status = XtLdrProtocol->Memory.BuildPageMap(PageMap, SelfMapAddress);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to build page map */
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Map memory for hardware layer */
Status = MapHardwareMemoryPool(PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to map memory for hardware layer */
XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware layer (Status code: %zX)\n", Status);
return Status;
}
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Determines the appropriate EFI memory mapping strategy for the i686 architecture.
*
* @return This routine returns FALSE, what results in a sequential mapping.
*
* @since XT 1.0
*/
XTCDECL
BOOLEAN
Xtos::DetermineMappingStrategy()
{
/* Use a sequential mapping strategy */
return FALSE;
}
/**
* Determines the appropriate paging level (PML) for the i686 architecture.
*
@@ -116,6 +60,24 @@ Xtos::EnablePaging(IN PXTBL_PAGE_MAPPING PageMap)
{
EFI_STATUS Status;
/* Build page map */
Status = XtLdrProtocol->Memory.BuildPageMap(PageMap, MM_PTE_BASE);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to build page map */
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Map memory for hardware layer */
Status = MapHardwareMemoryPool(PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to map memory for hardware layer */
XtLdrProtocol->Debug.Print(L"Failed to map memory for hardware layer (Status code: %zX)\n", Status);
return Status;
}
/* Exit EFI Boot Services */
XtLdrProtocol->Debug.Print(L"Exiting EFI boot services\n");
Status = XtLdrProtocol->Utils.ExitBootServices();
@@ -183,9 +145,6 @@ Xtos::MapHardwareMemoryPool(IN PXTBL_PAGE_MAPPING PageMap)
/* Zero fill allocated memory */
XtLdrProtocol->Memory.ZeroMemory((PVOID)Address, EFI_PAGE_SIZE);
/* Map hardware memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)NULLPTR, Address, 1, LoaderMemoryData);
/* Check if PAE is enabled (3-level paging) */
if(PageMap->PageMapLevel == 3)
{

9
boot/xtldr/modules/xtos_o/includes/xtos.hh
View File

@@ -38,9 +38,7 @@ class Xtos
IN PVOID PhysicalAddress,
IN UINT NumberOfPages,
IN LOADER_MEMORY_TYPE MemoryType);
STATIC XTCDECL EFI_STATUS BuildPageMap(IN PXTBL_PAGE_MAPPING PageMap);
STATIC XTCDECL LOADER_MEMORY_TYPE ConvertEfiMemoryType(IN EFI_MEMORY_TYPE EfiMemoryType);
STATIC XTCDECL BOOLEAN DetermineMappingStrategy();
STATIC XTCDECL ULONG DeterminePagingLevel(IN CONST PWCHAR Parameters);
STATIC XTCDECL EFI_STATUS EnablePaging(IN PXTBL_PAGE_MAPPING PageMap);
STATIC XTCDECL VOID GetDisplayInformation(OUT PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource,
@@ -48,13 +46,10 @@ class Xtos
IN PULONG_PTR FrameBufferSize,
IN PXTBL_FRAMEBUFFER_MODE_INFORMATION FrameBufferModeInfo);
STATIC XTCDECL EFI_STATUS GetMemoryDescriptorList(IN PXTBL_PAGE_MAPPING PageMap,
IN EFI_PHYSICAL_ADDRESS PhysicalBase,
IN PVOID VirtualBase,
IN PVOID *VirtualAddress,
OUT PLIST_ENTRY MemoryDescriptorList);
STATIC XTCDECL EFI_STATUS GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
IN EFI_PHYSICAL_ADDRESS PhysicalBase,
IN PVOID VirtualBase,
IN PVOID FrameBufferVirtualBase,
IN PVOID *VirtualAddress,
OUT PLIST_ENTRY SystemResourcesList);
STATIC XTCDECL EFI_STATUS GetVirtualAddress(IN PLIST_ENTRY MemoryMappings,
IN PVOID PhysicalAddress,

270
boot/xtldr/modules/xtos_o/xtos.cc
View File

@@ -191,52 +191,56 @@ Xtos::GetDisplayInformation(OUT PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource
XTCDECL
EFI_STATUS
Xtos::GetMemoryDescriptorList(IN PXTBL_PAGE_MAPPING PageMap,
IN EFI_PHYSICAL_ADDRESS PhysicalBase,
IN PVOID VirtualBase,
IN PVOID *VirtualAddress,
OUT PLIST_ENTRY MemoryDescriptorList)
{
PLOADER_MEMORY_DESCRIPTOR Descriptor;
PXTBL_MEMORY_MAPPING MemoryMapping;
EFI_PHYSICAL_ADDRESS Address;
EFI_STATUS Status;
ULONGLONG Pages;
Pages = (ULONGLONG)EFI_SIZE_TO_PAGES((PageMap->MapSize + 1) * sizeof(LOADER_MEMORY_DESCRIPTOR));
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, Pages, &Address);
if(Status != STATUS_EFI_SUCCESS)
{
return Status;
}
Status = XtLdrProtocol->Memory.MapVirtualMemory(PageMap, *VirtualAddress, (PVOID)Address, Pages, LoaderMemoryData);
if(Status != STATUS_EFI_SUCCESS)
{
XtLdrProtocol->Memory.FreePages(Address, Pages);
return Status;
}
PVOID PhysicalBase = (PVOID)Address;
PLIST_ENTRY ListEntry;
/* Initialize the descriptor pointer to the start of the allocated physical buffer */
Descriptor = (PLOADER_MEMORY_DESCRIPTOR)PhysicalBase;
/* Get the first entry from the internal boot loader memory map */
ListEntry = PageMap->MemoryMap.Flink;
/* Iterate through the internal memory map and populate the loader descriptor list */
while(ListEntry != &PageMap->MemoryMap)
{
/* Retrieve the internal memory mapping record from the current list entry */
MemoryMapping = CONTAIN_RECORD(ListEntry, XTBL_MEMORY_MAPPING, ListEntry);
PXTBL_MEMORY_MAPPING MemoryMapping = CONTAIN_RECORD(ListEntry, XTBL_MEMORY_MAPPING, ListEntry);
PLOADER_MEMORY_DESCRIPTOR MemoryDescriptor = (PLOADER_MEMORY_DESCRIPTOR)Address;
/* Transfer memory type and address information to the kernel descriptor */
Descriptor->MemoryType = MemoryMapping->MemoryType;
Descriptor->BasePage = (UINT_PTR)(MemoryMapping->PhysicalAddress / EFI_PAGE_SIZE);
Descriptor->PageCount = (ULONG)MemoryMapping->NumberOfPages;
MemoryDescriptor->MemoryType = MemoryMapping->MemoryType;
MemoryDescriptor->BasePage = (UINT_PTR)MemoryMapping->PhysicalAddress / EFI_PAGE_SIZE;
MemoryDescriptor->PageCount = MemoryMapping->NumberOfPages;
/* Link the entry */
XtLdrProtocol->LinkedList.InsertTail(MemoryDescriptorList, &Descriptor->ListEntry);
XtLdrProtocol->LinkedList.InsertTail(MemoryDescriptorList, &MemoryDescriptor->ListEntry);
/* Move to the next slot in the allocated buffer */
Descriptor++;
Address = Address + sizeof(LOADER_MEMORY_DESCRIPTOR);
ListEntry = ListEntry->Flink;
}
/* Convert all physical link pointers in the list to their corresponding virtual addresses */
XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, MemoryDescriptorList, (PVOID)PhysicalBase, VirtualBase);
XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, MemoryDescriptorList, PhysicalBase, *VirtualAddress);
/* Return success */
return STATUS_EFI_SUCCESS;
}
XTCDECL
EFI_STATUS
Xtos::GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
IN EFI_PHYSICAL_ADDRESS PhysicalBase,
IN PVOID VirtualBase,
IN PVOID FrameBufferVirtualBase,
IN PVOID *VirtualAddress,
OUT PLIST_ENTRY SystemResourcesList)
{
XTSTATUS Status;
@@ -247,18 +251,39 @@ Xtos::GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
PXTBL_FRAMEBUFFER_PROTOCOL FrameBufProtocol;
XTBL_FRAMEBUFFER_MODE_INFORMATION FbModeInfo;
EFI_PHYSICAL_ADDRESS FbAddress;
EFI_PHYSICAL_ADDRESS OriginalPhysicalBase;
ULONG_PTR FbSize;
UINT FrameBufferPages;
PSYSTEM_RESOURCE_FRAMEBUFFER FrameBufferResource;
PSYSTEM_RESOURCE_ACPI AcpiResource;
ULONGLONG Pages;
EFI_PHYSICAL_ADDRESS Address;
PVOID PhysicalBase, VirtualBase;
/* Save original physical base */
OriginalPhysicalBase = PhysicalBase;
Pages = (ULONGLONG)EFI_SIZE_TO_PAGES(sizeof(SYSTEM_RESOURCE_ACPI) + sizeof(SYSTEM_RESOURCE_FRAMEBUFFER));
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, Pages, &Address);
if(Status != STATUS_EFI_SUCCESS)
{
return Status;
}
Status = XtLdrProtocol->Memory.MapVirtualMemory(PageMap, *VirtualAddress, (PVOID)Address, Pages, LoaderFirmwarePermanent);
if(Status != STATUS_EFI_SUCCESS)
{
XtLdrProtocol->Memory.FreePages(Address, Pages);
return Status;
}
PhysicalBase = (PVOID)Address;
VirtualBase = *VirtualAddress;
/* Calculate next valid virtual address */
*VirtualAddress = (PUINT8)*VirtualAddress + (Pages * EFI_PAGE_SIZE);
AcpiResource = (PSYSTEM_RESOURCE_ACPI)Address;
AcpiResource = (PSYSTEM_RESOURCE_ACPI)PhysicalBase;
XtLdrProtocol->Memory.ZeroMemory(AcpiResource, sizeof(SYSTEM_RESOURCE_ACPI));
/* Load ACPI protocol */
/* Load FrameBuffer protocol */
Status = XtLdrProtocol->Protocol.Open(&ProtocolHandle, (PVOID*)&AcpiProtocol, &AcpiGuid);
if(Status != STATUS_EFI_SUCCESS)
{
@@ -277,11 +302,13 @@ Xtos::GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
XtLdrProtocol->LinkedList.InsertTail(SystemResourcesList, &AcpiResource->Header.ListEntry);
/* Close ACPI protocol */
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &AcpiGuid);
/* Close FrameBuffer protocol */
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid);
Address = Address + sizeof(SYSTEM_RESOURCE_ACPI);
FrameBufferResource = (PSYSTEM_RESOURCE_FRAMEBUFFER)Address;
PhysicalBase = PhysicalBase + sizeof(SYSTEM_RESOURCE_ACPI);
FrameBufferResource = (PSYSTEM_RESOURCE_FRAMEBUFFER)PhysicalBase;
XtLdrProtocol->Memory.ZeroMemory(FrameBufferResource, sizeof(SYSTEM_RESOURCE_FRAMEBUFFER));
/* Load FrameBuffer protocol */
@@ -302,16 +329,26 @@ Xtos::GetSystemResourcesList(IN PXTBL_PAGE_MAPPING PageMap,
return Status;
}
/* Assign the pre-mapped virtual address to the resource block */
FrameBufferResource->Header.VirtualAddress = FrameBufferVirtualBase;
/* Calculate pages needed to map framebuffer */
FrameBufferPages = EFI_SIZE_TO_PAGES(FbSize);
/* Rewrite framebuffer address by using virtual address */
FrameBufferResource->Header.VirtualAddress = *VirtualAddress;
/* Map frame buffer memory */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, FrameBufferResource->Header.VirtualAddress,
FrameBufferResource->Header.PhysicalAddress,
FrameBufferPages, LoaderFirmwarePermanent);
/* Close FrameBuffer protocol */
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid);
*VirtualAddress = (PUINT8)*VirtualAddress + (FrameBufferPages * EFI_PAGE_SIZE);
XtLdrProtocol->LinkedList.InsertTail(SystemResourcesList, &FrameBufferResource->Header.ListEntry);
/* Convert list pointers to virtual */
XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, SystemResourcesList, (PVOID)OriginalPhysicalBase, VirtualBase);
XtLdrProtocol->Memory.PhysicalListToVirtual(PageMap, SystemResourcesList, PhysicalBase, VirtualBase);
/* Return success */
return STATUS_EFI_SUCCESS;
}
@@ -352,7 +389,7 @@ Xtos::InitializeApicBase(IN PXTBL_PAGE_MAPPING PageMap)
}
/* Map APIC base address */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, APIC_BASE, (ULONGLONG)ApicBaseAddress, 1, LoaderFirmwarePermanent);
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (PVOID)APIC_BASE, ApicBaseAddress, 1, LoaderFirmwarePermanent);
return STATUS_EFI_SUCCESS;
}
@@ -372,100 +409,34 @@ Xtos::InitializeApicBase(IN PXTBL_PAGE_MAPPING PageMap)
XTCDECL
EFI_STATUS
Xtos::InitializeLoaderBlock(IN PXTBL_PAGE_MAPPING PageMap,
IN OUT PVOID *VirtualAddress,
IN PVOID *VirtualAddress,
IN PXTBL_BOOT_PARAMETERS Parameters)
{
EFI_PHYSICAL_ADDRESS FbPhysicalAddress, PhysicalBlock, PhysicalDescriptor, PhysicalResources;
PVOID FbVirtualAddress, VirtualBlock, VirtualResources, VirtualDescriptor;
UINT BlockPages, DescriptorPages, FbPages, ParametersSize, ResourcesPages;
XTBL_FRAMEBUFFER_MODE_INFORMATION FbModeInfo;
PXTBL_FRAMEBUFFER_PROTOCOL FrameBufProtocol;
PKERNEL_INITIALIZATION_BLOCK LoaderBlock;
EFI_HANDLE ProtocolHandle;
EFI_PHYSICAL_ADDRESS Address;
EFI_STATUS Status;
ULONG_PTR FbSize;
EFI_GUID FrameBufGuid = XT_FRAMEBUFFER_PROTOCOL_GUID;
/* Initialize Framebuffer information */
FbPhysicalAddress = 0;
FbSize = 0;
FbVirtualAddress = NULLPTR;
FbPages = 0;
UINT BlockPages;
UINT ParametersSize;
/* Calculate size of parameters */
ParametersSize = (XtLdrProtocol->WideString.Length(Parameters->Parameters, 0) + 1) * sizeof(WCHAR);
/* Calculate number of pages needed for initialization block */
BlockPages = EFI_SIZE_TO_PAGES(sizeof(KERNEL_INITIALIZATION_BLOCK) + ParametersSize);
ResourcesPages = EFI_SIZE_TO_PAGES(sizeof(SYSTEM_RESOURCE_ACPI) + sizeof(SYSTEM_RESOURCE_FRAMEBUFFER));
/* Query Framebuffer size for allocation */
if(XtLdrProtocol->Protocol.Open(&ProtocolHandle, (PVOID*)&FrameBufProtocol, &FrameBufGuid) == STATUS_EFI_SUCCESS)
{
/* Get FrameBuffer information */
FrameBufProtocol->GetDisplayInformation(&FbPhysicalAddress, &FbSize, &FbModeInfo);
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid);
}
FbPages = EFI_SIZE_TO_PAGES(FbSize);
/* Precommit page map to allocate memory */
XtLdrProtocol->Memory.CommitPageMap(PageMap);
/* Calculate number of pages needed for memory descriptor list */
DescriptorPages = EFI_SIZE_TO_PAGES(PageMap->MapSize * sizeof(LOADER_MEMORY_DESCRIPTOR) * 2);
/* Allocate memory for the kernel initialization block and boot parameters */
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, BlockPages, &PhysicalBlock);
/* Allocate memory for kernel initialization block */
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, BlockPages, &Address);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory allocation failure, return status code */
/* Memory allocation failure */
return Status;
}
/* Allocate memory for the system resources data structures */
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, ResourcesPages, &PhysicalResources);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory allocation failure, return status code */
return Status;
}
/* Allocate memory for the memory descriptor list */
Status = XtLdrProtocol->Memory.AllocatePages(AllocateAnyPages, DescriptorPages, &PhysicalDescriptor);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory allocation failure, return status code */
return Status;
}
/* Map the Kernel Initialization Block into virtual memory and advance the virtual address pointer */
VirtualBlock = *VirtualAddress;
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)VirtualBlock, PhysicalBlock, BlockPages, LoaderSystemBlock);
*VirtualAddress = (PUINT8)*VirtualAddress + (BlockPages * EFI_PAGE_SIZE);
/* Map the system resources physical memory into virtual address space and update the allocation pointer */
VirtualResources = *VirtualAddress;
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)VirtualResources, PhysicalResources, ResourcesPages, LoaderFirmwarePermanent);
*VirtualAddress = (PUINT8)*VirtualAddress + (ResourcesPages * EFI_PAGE_SIZE);
/* Check if a framebuffer was detected and requires memory mapping */
if(FbPages > 0)
{
/* Map the framebuffer physical memory range into virtual address space */
FbVirtualAddress = *VirtualAddress;
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)FbVirtualAddress, FbPhysicalAddress, FbPages, LoaderFirmwarePermanent);
*VirtualAddress = (PUINT8)*VirtualAddress + (FbPages * EFI_PAGE_SIZE);
}
/* Map the allocated physical memory for memory descriptors into the virtual address space */
VirtualDescriptor = *VirtualAddress;
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, (ULONGLONG)VirtualDescriptor, PhysicalDescriptor, DescriptorPages, LoaderMemoryData);
*VirtualAddress = (PUINT8)*VirtualAddress + (DescriptorPages * EFI_PAGE_SIZE);
/* Initialize and zero-fill kernel initialization block */
LoaderBlock = (PKERNEL_INITIALIZATION_BLOCK)(UINT_PTR)Address;
XtLdrProtocol->Memory.ZeroMemory(LoaderBlock, sizeof(KERNEL_INITIALIZATION_BLOCK) + ParametersSize);
/* Set basic loader block properties */
XtLdrProtocol->Memory.ZeroMemory((PVOID)PhysicalBlock, sizeof(KERNEL_INITIALIZATION_BLOCK) + ParametersSize);
LoaderBlock = (PKERNEL_INITIALIZATION_BLOCK)PhysicalBlock;
LoaderBlock->BlockSize = sizeof(KERNEL_INITIALIZATION_BLOCK);
LoaderBlock->BlockVersion = INITIALIZATION_BLOCK_VERSION;
LoaderBlock->ProtocolVersion = BOOT_PROTOCOL_VERSION;
@@ -479,33 +450,24 @@ Xtos::InitializeLoaderBlock(IN PXTBL_PAGE_MAPPING PageMap,
LoaderBlock->FirmwareInformation.EfiFirmware.EfiRuntimeServices = NULLPTR;
/* Copy parameters to kernel initialization block */
LoaderBlock->KernelParameters = (PWCHAR)((UINT_PTR)VirtualBlock + sizeof(KERNEL_INITIALIZATION_BLOCK));
LoaderBlock->KernelParameters = (PWCHAR)((UINT_PTR)*VirtualAddress + sizeof(KERNEL_INITIALIZATION_BLOCK));
XtLdrProtocol->Memory.CopyMemory((PVOID)((UINT_PTR)LoaderBlock + sizeof(KERNEL_INITIALIZATION_BLOCK)),
Parameters->Parameters, ParametersSize);
Parameters->Parameters,
ParametersSize);
/* Commit mappings */
XtLdrProtocol->Memory.CommitPageMap(PageMap);
/* Map kernel initialization block */
XtLdrProtocol->Memory.MapVirtualMemory(PageMap, *VirtualAddress, (PVOID)LoaderBlock,
BlockPages, LoaderSystemBlock);
/* Calculate next valid virtual address */
*VirtualAddress = (PUINT8)*VirtualAddress + (BlockPages * EFI_PAGE_SIZE);
/* Initialize system resources list */
XtLdrProtocol->LinkedList.InitializeHead(&LoaderBlock->SystemResourcesListHead);
Status = GetSystemResourcesList(PageMap, PhysicalResources, VirtualResources, FbVirtualAddress, &LoaderBlock->SystemResourcesListHead);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to initialize system resources list, return status code */
return Status;
}
GetSystemResourcesList(PageMap, VirtualAddress, &LoaderBlock->SystemResourcesListHead);
/* Initialize memory descriptor list */
XtLdrProtocol->LinkedList.InitializeHead(&LoaderBlock->MemoryDescriptorListHead);
Status = GetMemoryDescriptorList(PageMap, PhysicalDescriptor, VirtualDescriptor, &LoaderBlock->MemoryDescriptorListHead);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to initialize memory descriptor list, return status code */
return Status;
}
/* Set boot image size */
LoaderBlock->BootImageSize = (PFN_NUMBER)(((ULONGLONG)*VirtualAddress - KSEG0_BASE) / EFI_PAGE_SIZE);
GetMemoryDescriptorList(PageMap, VirtualAddress, &LoaderBlock->MemoryDescriptorListHead);
/* Return success */
return STATUS_EFI_SUCCESS;
@@ -645,12 +607,11 @@ Xtos::RunBootSequence(IN PEFI_FILE_HANDLE BootDir,
PXTBL_FRAMEBUFFER_PROTOCOL FrameBufProtocol;
PPECOFF_IMAGE_CONTEXT ImageContext = NULLPTR;
PEFI_LOADED_IMAGE_PROTOCOL ImageProtocol;
PVOID VirtualAddress;
PVOID VirtualAddress, VirtualMemoryArea;
PXT_ENTRY_POINT KernelEntryPoint;
EFI_HANDLE ProtocolHandle;
EFI_STATUS Status;
XTBL_PAGE_MAPPING PageMap;
BOOLEAN IdentityMapping;
/* Initialize XTOS startup sequence */
XtLdrProtocol->Debug.Print(L"Initializing XTOS startup sequence\n");
@@ -667,30 +628,19 @@ Xtos::RunBootSequence(IN PEFI_FILE_HANDLE BootDir,
/* Close FrameBuffer protocol */
XtLdrProtocol->Protocol.Close(&ProtocolHandle, &FrameBufGuid);
/* Determine whether to use a sequential or an identity mapping strategy */
IdentityMapping = DetermineMappingStrategy();
/* Set base virtual memory area for the kernel mappings */
VirtualAddress = (PVOID)(KSEG0_BASE);
VirtualMemoryArea = (PVOID)KSEG0_BASE;
VirtualAddress = (PVOID)(KSEG0_BASE + KSEG0_KERNEL_BASE);
/* Initialize virtual memory mappings */
XtLdrProtocol->Memory.InitializePageMap(&PageMap, DeterminePagingLevel(Parameters->Parameters), Size4K);
/* Map all EFI memory regions */
Status = XtLdrProtocol->Memory.MapEfiMemory(&PageMap, &VirtualAddress, IdentityMapping, NULLPTR);
Status = XtLdrProtocol->Memory.MapEfiMemory(&PageMap, &VirtualMemoryArea, NULLPTR);
if(Status != STATUS_EFI_SUCCESS)
{
/* Mapping failed */
return Status;
}
/* Check mapping strategy */
if(IdentityMapping)
{
/* Adjust virtual address to skip the identity-mapped physical range */
VirtualAddress = (PVOID)((ULONGLONG)VirtualAddress + 0x800000000);
}
/* Load the kernel */
Status = LoadModule(BootDir, Parameters->KernelFile, VirtualAddress, LoaderSystemCode, &ImageContext);
if(Status != STATUS_EFI_SUCCESS)
@@ -700,8 +650,8 @@ Xtos::RunBootSequence(IN PEFI_FILE_HANDLE BootDir,
}
/* Add kernel image memory mapping */
Status = XtLdrProtocol->Memory.MapVirtualMemory(&PageMap, (ULONGLONG)ImageContext->VirtualAddress,
(ULONGLONG)ImageContext->PhysicalAddress, ImageContext->ImagePages,
Status = XtLdrProtocol->Memory.MapVirtualMemory(&PageMap, ImageContext->VirtualAddress,
ImageContext->PhysicalAddress, ImageContext->ImagePages,
LoaderSystemCode);
if(Status != STATUS_EFI_SUCCESS)
{
@@ -720,14 +670,6 @@ Xtos::RunBootSequence(IN PEFI_FILE_HANDLE BootDir,
return Status;
}
/* Build page map */
Status = BuildPageMap(&PageMap);
if(Status != STATUS_EFI_SUCCESS)
{
XtLdrProtocol->Debug.Print(L"Failed to build page map (Status code: %zX)\n", Status);
return Status;
}
/* Store virtual address of kernel initialization block for future kernel call */
KernelParameters = (PKERNEL_INITIALIZATION_BLOCK)VirtualAddress;

34
boot/xtldr/protocol.cc
View File

@@ -302,7 +302,6 @@ Protocol::LoadModule(IN PWCHAR ModuleName)
PXTBL_MODULE_DEPS ModuleDependency;
PXTBL_MODULE_INFO ModuleInfo;
WCHAR ModuleFileName[24];
ULONG ModuleNameLength;
USHORT SectionIndex;
PWCHAR SectionData;
SIZE_T ModuleSize;
@@ -329,11 +328,8 @@ Protocol::LoadModule(IN PWCHAR ModuleName)
/* Print debug message */
Debug::Print(L"Loading module '%S' ...\n", ModuleName);
/* Calculate module name length */
ModuleNameLength = RTL::WideString::WideStringLength(ModuleName, 0) + 1;
/* Set module path */
RTL::Memory::CopyMemory(ModuleFileName, ModuleName, ModuleNameLength * sizeof(WCHAR));
RTL::Memory::CopyMemory(ModuleFileName, ModuleName, (RTL::WideString::WideStringLength(ModuleName, 0) + 1) * sizeof(WCHAR));
RTL::WideString::ConcatenateWideString(ModuleFileName, (PWCHAR)L".EFI", 0);
/* Open EFI volume */
@@ -442,8 +438,7 @@ Protocol::LoadModule(IN PWCHAR ModuleName)
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to load module, print error message and return status code */
Debug::Print(L"Failed to load dependency module '%S' (Status Code: 0x%zX)\n",
ModuleDependency->ModuleName, Status);
Debug::Print(L"Failed to load dependency module '%S' (Status Code: 0x%zX)\n", ModuleDependency->ModuleName, Status);
return STATUS_EFI_UNSUPPORTED;
}
@@ -506,19 +501,8 @@ Protocol::LoadModule(IN PWCHAR ModuleName)
XtLoader::GetEfiSystemTable()->BootServices->CloseProtocol(LoadedImage, &LIPGuid, LoadedImage, NULLPTR);
}
/* Allocate memory for module name */
Status = Memory::AllocatePool(ModuleNameLength * sizeof(WCHAR), (PVOID *)&ModuleInfo->ModuleName);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to allocate memory for module name, return error */
Debug::Print(L"ERROR: Failed to allocate memory (Status Code: 0x%zX)\n", Status);
return Status;
}
/* Copy module name */
RTL::Memory::CopyMemory(ModuleInfo->ModuleName, ModuleName, ModuleNameLength * sizeof(WCHAR));
/* Save additional module information, not found in '.modinfo' section */
ModuleInfo->ModuleName = ModuleName;
ModuleInfo->ModuleBase = LoadedImage->ImageBase;
ModuleInfo->ModuleSize = LoadedImage->ImageSize;
ModuleInfo->Revision = LoadedImage->Revision;
@@ -1032,7 +1016,7 @@ Protocol::InstallXtLoaderProtocol()
LoaderProtocol.Boot.RegisterMenu = XtLoader::RegisterBootMenu;
LoaderProtocol.Boot.RegisterProtocol = RegisterBootProtocol;
LoaderProtocol.BootUtils.GetBooleanParameter = BootUtils::GetBooleanParameter;
LoaderProtocol.BootUtils.GetTrampolineInformation = AR::ProcessorSupport::GetTrampolineInformation;
LoaderProtocol.BootUtils.GetTrampolineInformation = AR::ProcSup::GetTrampolineInformation;
LoaderProtocol.Config.GetBooleanValue = Configuration::GetBooleanValue;
LoaderProtocol.Config.GetBootOptionValue = Configuration::GetBootOptionValue;
LoaderProtocol.Config.GetEditableOptions = Configuration::GetEditableOptions;
@@ -1049,10 +1033,10 @@ Protocol::InstallXtLoaderProtocol()
LoaderProtocol.Console.SetAttributes = Console::SetAttributes;
LoaderProtocol.Console.SetCursorPosition = Console::SetCursorPosition;
LoaderProtocol.Console.Write = Console::Write;
LoaderProtocol.Cpu.CpuId = AR::CpuFunctions::CpuId;
LoaderProtocol.Cpu.ReadControlRegister = AR::CpuFunctions::ReadControlRegister;
LoaderProtocol.Cpu.ReadModelSpecificRegister = AR::CpuFunctions::ReadModelSpecificRegister;
LoaderProtocol.Cpu.WriteControlRegister = AR::CpuFunctions::WriteControlRegister;
LoaderProtocol.Cpu.CpuId = AR::CpuFunc::CpuId;
LoaderProtocol.Cpu.ReadControlRegister = AR::CpuFunc::ReadControlRegister;
LoaderProtocol.Cpu.ReadModelSpecificRegister = AR::CpuFunc::ReadModelSpecificRegister;
LoaderProtocol.Cpu.WriteControlRegister = AR::CpuFunc::WriteControlRegister;
LoaderProtocol.Debug.Print = Debug::Print;
LoaderProtocol.Disk.CloseVolume = Volume::CloseVolume;
LoaderProtocol.Disk.OpenVolume = Volume::OpenVolume;
@@ -1070,7 +1054,6 @@ Protocol::InstallXtLoaderProtocol()
LoaderProtocol.Memory.AllocatePages = Memory::AllocatePages;
LoaderProtocol.Memory.AllocatePool = Memory::AllocatePool;
LoaderProtocol.Memory.BuildPageMap = Memory::BuildPageMap;
LoaderProtocol.Memory.CommitPageMap = Memory::CommitPageMap;
LoaderProtocol.Memory.CompareMemory = RTL::Memory::CompareMemory;
LoaderProtocol.Memory.CopyMemory = RTL::Memory::CopyMemory;
LoaderProtocol.Memory.FreePages = Memory::FreePages;
@@ -1093,7 +1076,6 @@ Protocol::InstallXtLoaderProtocol()
LoaderProtocol.Protocol.LocateHandles = LocateProtocolHandles;
LoaderProtocol.Protocol.Open = OpenProtocol;
LoaderProtocol.Protocol.OpenHandle = OpenProtocolHandle;
LoaderProtocol.Shell.RegisterCommand = Shell::RegisterCommand;
LoaderProtocol.String.Compare = RTL::String::CompareString;
LoaderProtocol.String.Length = RTL::String::StringLength;
LoaderProtocol.String.ToWideString = RTL::String::StringToWideString;

899
boot/xtldr/shell.cc
View File

@@ -4,21 +4,13 @@
* FILE: xtldr/shell.cc
* DESCRIPTION: XT Boot Loader shell
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <harraiken91@gmail.com>
*/
#include <xtldr.hh>
/**
* Implements the built-in `exit` command. Sets the exit flag to signal the main
* shell loop to terminate and return control to the boot menu.
*
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
* Starts XTLDR shell.
*
* @return This routine does not return any value.
*
@@ -26,410 +18,14 @@
*/
XTCDECL
VOID
Shell::CommandExit(IN ULONG Argc,
IN PWCHAR *Argv)
Shell::StartLoaderShell()
{
/* Signal the main shell loop to stop and return to the boot menu */
ExitRequest = TRUE;
}
/* Initialize console */
Console::InitializeConsole();
/**
* Implements the built-in `help` command. Prints a list of available commands alongside their descriptions.
*
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::CommandHelp(IN ULONG Argc,
IN PWCHAR *Argv)
{
PXTBL_SHELL_COMMAND CommandEntry;
PLIST_ENTRY ListEntry;
/* Print a header line */
Console::Print(L"Available commands:\n\n");
/* Walk the registered commands list */
ListEntry = ShellCommands.Flink;
while(ListEntry != &ShellCommands)
{
/* Retrieve the current command entry */
CommandEntry = CONTAIN_RECORD(ListEntry, XTBL_SHELL_COMMAND, Flink);
/* Print the command name in a highlighted color */
Console::SetAttributes(EFI_TEXT_BGCOLOR_BLACK | EFI_TEXT_FGCOLOR_WHITE);
Console::Print(L" %-12S", CommandEntry->Command);
/* Print the description in the default color */
Console::SetAttributes(EFI_TEXT_BGCOLOR_BLACK | EFI_TEXT_FGCOLOR_LIGHTGRAY);
Console::Print(L" %S\n", CommandEntry->Description);
/* Advance to the next entry */
ListEntry = ListEntry->Flink;
}
}
/**
* Implements the built-in `insmod` command. Loads an XTLDR module by its name.
*
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::CommandInsmod(IN ULONG Argc,
IN PWCHAR *Argv)
{
EFI_STATUS Status;
/* Check if the module name was provided */
if(Argc != 2)
{
/* Print usage message and return */
Console::Print(L"Usage: insmod <module_name>\n");
return;
}
/* Load the module */
Status = Protocol::LoadModule(Argv[1]);
if(Status != STATUS_EFI_SUCCESS)
{
/* Failed to load module, print error message */
Console::Print(L"ERROR: Failed to load module '%S' (Status: 0x%llx).\n", Argv[1], Status);
}
}
/**
* Implements the built-in `lsmod` command. Lists all loaded XTLDR modules.
*
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::CommandLsmod(IN ULONG Argc,
IN PWCHAR *Argv)
{
PXTBL_MODULE_INFO ModuleInfo;
PLIST_ENTRY ModulesList;
PLIST_ENTRY ListEntry;
/* Print header */
Console::Print(L"Module Name Version Base Address Size\n");
Console::Print(L"----------------------------------------------------------------------\n");
/* Get modules list */
ModulesList = Protocol::GetModulesList();
if(ModulesList == NULLPTR)
{
/* No modules loaded */
return;
}
/* Iterate over all loaded modules */
ListEntry = ModulesList->Flink;
while(ListEntry != ModulesList)
{
/* Retrieve the module information */
ModuleInfo = CONTAIN_RECORD(ListEntry, XTBL_MODULE_INFO, Flink);
/* Print module information */
Console::Print(L"%-16S %-16S 0x%016llx %llu\n",
ModuleInfo->ModuleName, ModuleInfo->Version,
(ULONGLONG)ModuleInfo->ModuleBase, ModuleInfo->ModuleSize);
/* Advance to the next entry */
ListEntry = ListEntry->Flink;
}
}
/**
* Implements the built-in `poweroff` command. Shuts down the machine.
*
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::CommandPoweroff(IN ULONG Argc,
IN PWCHAR *Argv)
{
/* Attempt to power off the machine */
Console::Print(L"Powering off...\n");
EfiUtils::ShutdownSystem();
/* The poweroff call failed, print error message */
Console::Print(L"ERROR: Failed to power off the machine\n");
}
/**
* Implements the built-in `reboot` command. Performs a normal system restart via the EFI runtime services.
* When the '/EFI' parameter is supplied, the routine instead schedules a reboot into the UEFI firmware setup interface.
*
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::CommandReboot(IN ULONG Argc,
IN PWCHAR *Argv)
{
/* Check if the /EFI flag was specified */
if(Argc > 1 && RTL::WideString::CompareWideStringInsensitive(Argv[1], L"/EFI", 0) == 0)
{
/* Attempt to reboot into firmware setup */
Console::Print(L"Rebooting into UEFI firmware setup...\n");
EfiUtils::EnterFirmwareSetup();
/* The firmware does not support this feature, print error message */
Console::Print(L"ERROR: Reboot into firmware setup interface not supported.\n");
}
else
{
/* Perform a standard system reboot */
Console::Print(L"Rebooting...\n");
EfiUtils::RebootSystem();
/* The reboot call failed, print error message */
Console::Print(L"ERROR: Failed to reboot the machine\n");
}
}
/**
* Implements the built-in `ver` command. Prints the bootloader identification string.
*
* @param Argc
* Supplies the number of arguments provided by the user.
*
* @param Argv
* Supplies a list of arguments provided by the user.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::CommandVersion(IN ULONG Argc,
IN PWCHAR *Argv)
{
/* Check if debugging enabled */
if(DEBUG)
{
/* Print debug version of XTLDR version string */
Console::Print(L"XTLDR Boot Loader v%d.%d (%s-%s)\n",
XTLDR_VERSION_MAJOR, XTLDR_VERSION_MINOR, XTOS_VERSION_DATE, XTOS_VERSION_HASH);
}
else
{
/* Print standard XTLDR version string */
Console::Print(L"XTLDR Boot Loader v%d.%d\n", XTLDR_VERSION_MAJOR, XTLDR_VERSION_MINOR);
}
}
/**
* Looks up the given command name in the registered shell commands list and invokes the corresponding handler.
*
* @param Argc
* Supplies the number of arguments in the argument vector, including the command name itself.
*
* @param Argv
* Supplies a pointer to the argument vector. First argument is the command name.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::ExecuteCommand(IN ULONG Argc,
IN PWCHAR *Argv)
{
PXTBL_SHELL_COMMAND CommandEntry;
PLIST_ENTRY ListEntry;
/* Walk through the list of registered shell commands */
ListEntry = ShellCommands.Flink;
while(ListEntry != &ShellCommands)
{
/* Retrieve the shell command entry from the list node */
CommandEntry = CONTAIN_RECORD(ListEntry, XTBL_SHELL_COMMAND, Flink);
/* Perform a case-insensitive comparison against the command name */
if(RTL::WideString::CompareWideStringInsensitive(CommandEntry->Command, Argv[0], 0) == 0)
{
/* Command matches, invoke its handler and return */
CommandEntry->Handler(Argc, Argv);
return;
}
/* Advance to the next registered command */
ListEntry = ListEntry->Flink;
}
/* No matching command was found, print error message */
Console::Print(L"ERROR: '%S' is not recognized as a valid command.\n", Argv[0]);
}
/**
* Splits the supplied raw command line string into an argument count and an argument vector suitable
* for command dispatch. The input string is tokenized by whitespace.
*
* @param CommandLine
* Supplies a mutable wide-character string containing the raw command line.
*
* @param Argc
* Receives the number of arguments found in the command line.
*
* @param Argv
* Receives a pointer to an allocated array of wide-character string pointers, one for each argument.
*
* @return This routine returns a status code.
*
* @since XT 1.0
*/
XTCDECL
EFI_STATUS
Shell::ParseCommand(IN PWCHAR CommandLine,
OUT PULONG Argc,
OUT PWCHAR **Argv)
{
PWCHAR *ArgumentVector, TempLine;
ULONG ArgumentCount;
EFI_STATUS Status;
/* Initialize argument count */
ArgumentCount = 0;
/* Count the tokens to determine the size of the argument vector */
TempLine = CommandLine;
while(*TempLine != L'\0')
{
/* Skip leading spaces */
while(*TempLine == L' ')
{
/* Move to the next character */
TempLine++;
}
/* Check if the end of the string was reached */
if(*TempLine == L'\0')
{
/* End of the string, break the loop */
break;
}
/* One more argument found */
ArgumentCount++;
/* Skip the characters of the token */
while(*TempLine != L'\0' && *TempLine != L' ')
{
/* Move to the next character */
TempLine++;
}
}
/* Check if the command line was empty */
if(ArgumentCount == 0)
{
/* Set argument count and vector to zero and NULL */
*Argc = 0;
*Argv = NULLPTR;
/* Return success */
return STATUS_EFI_SUCCESS;
}
/* Allocate memory for the argument vector */
Status = Memory::AllocatePool(ArgumentCount * sizeof(PWCHAR), (PVOID *)&ArgumentVector);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory allocation failure, return status code */
return Status;
}
/* Reset argument count and temp line */
ArgumentCount = 0;
TempLine = CommandLine;
/* Walk through the command line */
while(*TempLine != L'\0')
{
/* Skip leading whitespace */
while(*TempLine == L' ')
{
/* Move to the next character */
TempLine++;
}
/* Check if the end of the string was reached */
if(*TempLine == L'\0')
{
/* End of string reached, break the loop */
break;
}
/* Record token */
ArgumentVector[ArgumentCount] = TempLine;
ArgumentCount++;
/* Advance past the token characters */
while(*TempLine != L'\0' && *TempLine != L' ')
{
/* Move to the next character */
TempLine++;
}
/* Check if token was NULL-terminated */
if(*TempLine != L'\0')
{
/* NULL-terminate the token and move to the next character */
*TempLine = L'\0';
TempLine++;
}
}
/* Return results to the caller */
*Argc = ArgumentCount;
*Argv = ArgumentVector;
return STATUS_EFI_SUCCESS;
/* Print prompt */
PrintPrompt();
for(;;);
}
/**
@@ -446,486 +42,9 @@ Shell::PrintPrompt()
/* Set prompt color */
Console::SetAttributes(EFI_TEXT_BGCOLOR_BLACK | EFI_TEXT_FGCOLOR_YELLOW);
/* Print prompt at the start of the line */
Console::Print(L"\rXTLDR> ");
/* Print prompt */
Console::Print(L"XTLDR> ");
/* Reset standard shell colors */
Console::SetAttributes(EFI_TEXT_BGCOLOR_BLACK | EFI_TEXT_FGCOLOR_LIGHTGRAY);
}
/**
* Prints the whole prompt line, including the current command line and the cursor position.
*
* @param Buffer
* Supplies a pointer to the buffer containing the command line.
*
* @param BufferLength
* Supplies the buffer text length.
*
* @param CursorPosition
* Supplies the current cursor position.
*
* @param PreviousBufferLength
* Supplies the previous buffer text length to clear artifacts.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::PrintPromptLine(IN PWCHAR Buffer,
IN ULONG BufferLength,
IN ULONG CursorPosition,
IN ULONG PreviousBufferLength)
{
INT32 TargetX, TargetY;
WCHAR SavedChar;
ULONG Index;
/* Print the prompt */
PrintPrompt();
/* Temporarily truncate the string to capture cursor position */
SavedChar = Buffer[CursorPosition];
Buffer[CursorPosition] = L'\0';
/* Print up to the cursor position */
Console::Print(L"%S", Buffer);
/* Capture target cursor coordinates from the EFI text mode structure */
TargetX = XtLoader::GetEfiSystemTable()->ConOut->Mode->CursorColumn;
TargetY = XtLoader::GetEfiSystemTable()->ConOut->Mode->CursorRow;
/* Restore the character and print the remainder of the buffer */
Buffer[CursorPosition] = SavedChar;
Console::Print(L"%S", Buffer + CursorPosition);
/* Check if the previous buffer was longer than the current one */
if(PreviousBufferLength > BufferLength)
{
/* Clear artifacts from the previous longer line */
for(Index = 0; Index < (PreviousBufferLength - BufferLength); Index++)
{
/* Print a white space */
Console::Print(L" ");
}
}
/* Move the cursor back to the correct target position */
Console::SetCursorPosition(TargetX, TargetY);
}
/**
* Reads a complete line of input from the shell console into the supplied buffer.
*
* @param Buffer
* Supplies a pointer to a wide-character buffer that receives the entered command line.
*
* @param BufferSize
* Supplies the capacity of the buffer, in wide characters.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::ReadCommand(OUT PWCHAR Buffer,
IN ULONG BufferSize)
{
ULONG BufferLength, CursorPosition, OldBufferLength;
UINT_PTR EventIndex;
EFI_INPUT_KEY Key;
/* Start with an empty buffer */
CursorPosition = 0;
BufferLength = 0;
Buffer[0] = L'\0';
/* Reset history index */
HistoryIndex = HistoryCount;
/* Read characters until the user submits the command line */
while(TRUE)
{
/* Wait until a key event is available */
EfiUtils::WaitForEfiEvent(1, &(XtLoader::GetEfiSystemTable()->ConIn->WaitForKey), &EventIndex);
/* Read the keystroke from the input device */
Console::ReadKeyStroke(&Key);
/* Capture the previous line length to wipe possible artifacts */
OldBufferLength = BufferLength;
/* Check the keystroke */
if(Key.UnicodeChar == 0x0D)
{
/* ENTER key pressed, terminate the buffer and move to a new line */
Buffer[BufferLength] = L'\0';
Console::Print(L"\n");
/* Check if the buffer is not empty */
if(BufferLength > 0)
{
/* Check if the history is not full */
if(HistoryCount < XTBL_SH_HISTORY_ENTRIES)
{
/* Store command in history and increment history count */
RTL::Memory::CopyMemory(History[HistoryCount], Buffer, (BufferLength + 1) * sizeof(WCHAR));
HistoryCount++;
}
else
{
/* Shift history entries to fit new command */
RTL::Memory::MoveMemory(History[0],
History[1],
(XTBL_SH_HISTORY_ENTRIES - 1) * XTBL_SH_MAX_LINE_LENGTH * sizeof(WCHAR));
RTL::Memory::CopyMemory(History[XTBL_SH_HISTORY_ENTRIES - 1],
Buffer,
(BufferLength + 1) * sizeof(WCHAR));
}
}
/* Return the command line to the caller */
return;
}
else if(Key.ScanCode == 0x01)
{
/* UP key pressed, go back in history */
if(HistoryIndex > 0)
{
/* Decrement history index */
HistoryIndex--;
/* Copy history entry to buffer and update cursor position */
BufferLength = RTL::WideString::WideStringLength(History[HistoryIndex], XTBL_SH_MAX_LINE_LENGTH - 1);
RTL::Memory::CopyMemory(Buffer, History[HistoryIndex], (BufferLength + 1) * sizeof(WCHAR));
CursorPosition = BufferLength;
/* Reprint the prompt line */
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.ScanCode == 0x02)
{
/* DOWN key pressed, go forward in history */
if(HistoryIndex < HistoryCount)
{
/* Increment history index */
HistoryIndex++;
/* Check if we are at the end of history */
if(HistoryIndex == HistoryCount)
{
/* End of history, show empty prompt */
Buffer[0] = L'\0';
BufferLength = 0;
CursorPosition = 0;
}
else
{
/* Copy history entry to buffer and update cursor position */
BufferLength = RTL::WideString::WideStringLength(History[HistoryIndex],
XTBL_SH_MAX_LINE_LENGTH - 1);
RTL::Memory::CopyMemory(Buffer, History[HistoryIndex], (BufferLength + 1) * sizeof(WCHAR));
CursorPosition = BufferLength;
}
/* Reprint the prompt line */
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.ScanCode == 0x03)
{
/* RIGHT key pressed, move cursor right */
if(CursorPosition < BufferLength)
{
/* Increment cursor position */
CursorPosition++;
/* Reprint the prompt line */
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.ScanCode == 0x04)
{
/* LEFT key pressed, move cursor left */
if(CursorPosition > 0)
{
/* Decrement cursor position */
CursorPosition--;
/* Reprint the prompt line */
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.ScanCode == 0x05)
{
/* HOME key pressed, move cursor to beginning */
if (CursorPosition > 0)
{
/* Set cursor position to beginning of the line and reprint the prompt line */
CursorPosition = 0;
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.ScanCode == 0x06)
{
/* END key pressed, move cursor to end */
if (CursorPosition < BufferLength)
{
/* Set cursor position to end of the line and reprint the prompt line */
CursorPosition = BufferLength;
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.ScanCode == 0x17)
{
/* ESC key pressed, discard the current input, move to a new line and reprint the prompt */
Buffer[0] = L'\0';
Console::Print(L"\n");
PrintPrompt();
/* Reset cursor position, buffer length and history index */
CursorPosition = 0;
BufferLength = 0;
HistoryIndex = HistoryCount;
/* Continue reading the command line */
continue;
}
else if(Key.ScanCode == 0x08)
{
/* DELETE key pressed, remove character at cursor */
if(CursorPosition < BufferLength)
{
/* Move memory to remove the character at cursor */
RTL::Memory::MoveMemory(Buffer + CursorPosition,
Buffer + CursorPosition + 1,
(BufferLength - CursorPosition) * sizeof(WCHAR));
/* Decrement buffer length and reprint the prompt line */
BufferLength--;
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue to the next iteration */
continue;
}
else if(Key.UnicodeChar == 0x08)
{
/* BACKSPACE key pressed, delete character before cursor */
if(CursorPosition > 0)
{
/* Move memory to remove the character before cursor */
RTL::Memory::MoveMemory(Buffer + CursorPosition - 1,
Buffer + CursorPosition,
(BufferLength - CursorPosition + 1) * sizeof(WCHAR));
/* Decrement cursor position and buffer length */
CursorPosition--;
BufferLength--;
/* Reprint the prompt line */
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
/* Continue reading the command line */
continue;
}
else if(Key.UnicodeChar == 0)
{
/* Ignore non-printable characters */
continue;
}
/* Make sure there is room in the buffer (reserve one slot for NULL terminator) */
if(BufferLength < BufferSize - 1)
{
/* Insert character in the middle or end of the buffer */
RTL::Memory::MoveMemory(Buffer + CursorPosition + 1,
Buffer + CursorPosition,
(BufferLength - CursorPosition + 1) * sizeof(WCHAR));
Buffer[CursorPosition] = Key.UnicodeChar;
/* Increment cursor position and buffer length */
CursorPosition++;
BufferLength++;
/* Reprint the prompt line */
PrintPromptLine(Buffer, BufferLength, CursorPosition, OldBufferLength);
}
}
}
/**
* Registers a new command in the XTLDR shell.
*
* @param Command
* Supplies the command keyword that the user types at the shell prompt.
*
* @param Description
* Supplies a short help string displayed by the 'help' command.
*
* @param Handler
* Supplies a pointer to the function that implements the command.
*
* @return This routine returns a status code.
*
* @since XT 1.0
*/
XTCDECL
EFI_STATUS
Shell::RegisterCommand(IN PCWSTR Command,
IN PCWSTR Description,
IN PBL_SHELL_COMMAND Handler)
{
PXTBL_SHELL_COMMAND CommandEntry;
PLIST_ENTRY ListEntry;
EFI_STATUS Status;
/* Verify that a command with this name has not already been registered */
ListEntry = ShellCommands.Flink;
while(ListEntry != &ShellCommands)
{
/* Retrieve the existing shell command entry */
CommandEntry = CONTAIN_RECORD(ListEntry, XTBL_SHELL_COMMAND, Flink);
/* Compare command names case-insensitively */
if(RTL::WideString::CompareWideStringInsensitive(CommandEntry->Command, Command, 0) == 0)
{
/* Duplicate command name, return error */
return STATUS_EFI_INVALID_PARAMETER;
}
/* Advance to the next entry */
ListEntry = ListEntry->Flink;
}
/* Allocate memory for the new command entry */
Status = Memory::AllocatePool(sizeof(XTBL_SHELL_COMMAND), (PVOID *)&CommandEntry);
if(Status != STATUS_EFI_SUCCESS)
{
/* Memory allocation failure, return error */
return STATUS_EFI_OUT_OF_RESOURCES;
}
/* Populate the new command entry */
CommandEntry->Command = (PWCHAR)Command;
CommandEntry->Description = (PWCHAR)Description;
CommandEntry->Handler = Handler;
/* Append the command to the global shell commands list */
RTL::LinkedList::InsertTailList(&ShellCommands, &CommandEntry->Flink);
/* Return success */
return STATUS_EFI_SUCCESS;
}
/**
* Registers all built-in shell commands that are provided by the XTLDR.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::RegisterBuiltinCommands()
{
/* Register all built-in shell commands */
RegisterCommand(L"exit", L"Exits the shell and returns to the boot menu", CommandExit);
RegisterCommand(L"help", L"Displays a list of all available shell commands", CommandHelp);
RegisterCommand(L"insmod", L"Loads a specific XTLDR module", CommandInsmod);
RegisterCommand(L"lsmod", L"Displays a list of loaded modules", CommandLsmod);
RegisterCommand(L"poweroff", L"Shuts down the machine", CommandPoweroff);
RegisterCommand(L"reboot", L"Reboots the machine (/EFI to enter firmware setup)", CommandReboot);
RegisterCommand(L"ver", L"Displays the boot loader version information", CommandVersion);
}
/**
* Initializes the command list, registers the built-in commands and enters an interactive XTLDR shell loop.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
Shell::StartLoaderShell()
{
WCHAR CommandLine[XTBL_SH_MAX_LINE_LENGTH];
PWCHAR *ArgumentVector;
ULONG ArgumentCount;
EFI_STATUS Status;
/* Initialize console */
Console::InitializeConsole();
/* Initialize the shell commands list */
RTL::LinkedList::InitializeListHead(&ShellCommands);
/* Register all built-in commands */
RegisterBuiltinCommands();
/* Clear the shell exit request flag */
ExitRequest = FALSE;
/* Main XTLDR shell loop */
while(!ExitRequest)
{
/* Display the shell prompt */
PrintPrompt();
/* Read a command line */
ReadCommand(CommandLine, XTBL_SH_MAX_LINE_LENGTH);
/* Parse the command line into a list of arguments */
Status = ParseCommand(CommandLine, &ArgumentCount, &ArgumentVector);
if(Status != STATUS_EFI_SUCCESS)
{
/* Parsing failed, print error and continue */
Console::Print(L"ERROR: Failed to parse command line (Status: 0x%llx).\n\n", Status);
continue;
}
/* Check if command line is empty */
if(ArgumentCount == 0)
{
/* Skip empty command line */
continue;
}
/* Check if command line starts with a comment symbol (#) */
if(ArgumentVector[0][0] != L'#')
{
/* Dispatch the command */
ExecuteCommand(ArgumentCount, ArgumentVector);
}
/* Free the argument vector */
Memory::FreePool(ArgumentVector);
/* Print a trailing blank line for visual separation */
Console::Print(L"\n");
}
}

6
boot/xtldr/textui.cc
View File

@@ -717,9 +717,9 @@ TextUi::DisplayEditMenu(IN PXTBL_BOOTMENU_ITEM MenuEntry)
RedrawEntries = TRUE;
}
}
else if(Key.ScanCode == 0x14)
else if(Key.UnicodeChar == 0x02)
{
/* F10 key pressed, boot the OS */
/* CTRL-B key pressed, boot the OS */
Console::SetAttributes(Handle.DialogColor | Handle.TextColor);
Console::ClearLine(Handle.PosY + Handle.Height + 4);
Console::SetCursorPosition(4, Handle.PosY + Handle.Height + 4);
@@ -1673,7 +1673,7 @@ TextUi::DrawEditMenu(OUT PXTBL_DIALOG_HANDLE Handle)
Console::SetCursorPosition(0, Handle->PosY + Handle->Height);
Console::SetAttributes(EFI_TEXT_BGCOLOR_BLACK | EFI_TEXT_FGCOLOR_LIGHTGRAY);
Console::Print(L" Use cursors to change the selection. Press ENTER key to edit the chosen\n"
L" option, ESC to return to the main boot menu or F10 to boot.\n");
L" option, ESC to return to the main boot menu or CTRL-B to boot.\n");
}
/**

9
boot/xtldr/xtldr.cc
View File

@@ -236,15 +236,6 @@ BlStartXtLoader(IN EFI_HANDLE ImageHandle,
PWCHAR Modules;
EFI_STATUS Status;
/* Check if system is EFI-based and provided parameters are valid */
if(ImageHandle == NULLPTR || SystemTable == NULLPTR)
{
/* Invalid parameters, print error message using BIOS calls and hang */
BiosUtils::ClearScreen();
BiosUtils::Print(L"XTLDR requires EFI-based system!");
for(;;);
}
/* Initialize XTLDR and */
XtLoader::InitializeBootLoader(ImageHandle, SystemTable);

51
configure.ps1
View File

@@ -4,41 +4,48 @@
# DESCRIPTION: Project configuration script for preparing the build environment
# DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
# Check XTchain
if (-not $env:XTCVER) {
Write-Error "XTChain not detected or corrupted!"
Write-Host "XTChain not detected or corrupted!"
exit 1
}
# Set target architecture defaulting to amd64
$ARCH = if ($env:TARGET) { $env:TARGET } else { "amd64" }
# Set target build type defaulting to Debug
$env:BUILD_TYPE = if ($env:BUILD_TYPE -in @("Debug", "Release")) { $env:BUILD_TYPE } else { "Debug" }
# Set variables
$EXECTOS_SOURCE_DIR = $PSScriptRoot
$EXECTOS_BINARY_DIR = Join-Path $EXECTOS_SOURCE_DIR "build-$ARCH-$($env:BUILD_TYPE.ToLower())"
# Create build directory
if (-not (Test-Path $EXECTOS_BINARY_DIR)) {
Write-Host "Creating build directory: $EXECTOS_BINARY_DIR"
New-Item -ItemType Directory -Path $EXECTOS_BINARY_DIR -Force | Out-Null
# Set target architecture
if ($env:TARGET) {
$ARCH = $env:TARGET
} else {
$ARCH = "amd64"
}
Set-Location $EXECTOS_BINARY_DIR
# Set target build type
if (-not $env:BUILD_TYPE) {
$env:BUILD_TYPE = "DEBUG"
}
# Set variables
$EXECTOS_SOURCE_DIR = (Get-Location).Path
$EXECTOS_BINARY_DIR = "build-$($ARCH)-$($env:BUILD_TYPE.ToLower())"
# Create directories if needed
if ($EXECTOS_SOURCE_DIR -eq (Get-Location).Path) {
Write-Host "Creating directories in $EXECTOS_BINARY_DIR"
New-Item -ItemType Directory -Path $EXECTOS_BINARY_DIR -Force | Out-Null
Set-Location -Path $EXECTOS_BINARY_DIR
}
# Delete old cache
Remove-Item "CMakeCache.txt", "host-tools/CMakeCache.txt" -ErrorAction SilentlyContinue
Remove-Item -Path "CMakeCache.txt" -ErrorAction SilentlyContinue
Remove-Item -Path "host-tools/CMakeCache.txt" -ErrorAction SilentlyContinue
# Configure project using CMake
& cmake -G Ninja "-DARCH:STRING=$ARCH" "-DBUILD_TYPE:STRING=$($env:BUILD_TYPE)" $EXECTOS_SOURCE_DIR
& cmake -G Ninja -DARCH:STRING=$($ARCH) -DBUILD_TYPE:STRING=$($env:BUILD_TYPE) $EXECTOS_SOURCE_DIR
# Check if configuration succeeded
if ($LASTEXITCODE -ne 0) {
Write-Error "Configure script failed."
Write-Host "Configure script failed."
exit 1
} else {
"$($ARCH)" | Out-File -Encoding ASCII -NoNewline build.arch
Write-Host "Configure script completed. Enter '$EXECTOS_BINARY_DIR' directory and execute 'xbuild' to build ExectOS."
}
$ARCH | Out-File -Encoding ASCII -NoNewline "build.arch"
Write-Host "Configure completed. Run 'xbuild' to build ExectOS."

2
sdk/CMakeLists.txt
View File

@@ -1,3 +1 @@
add_subdirectory("xtadk")
set_sdk_target("xtdk/" "include")

1
sdk/cmake/baseaddress/amd64.cmake
View File

@@ -1,3 +1,2 @@
# Set base addresses for all modules
set(BASEADDRESS_XTLDR 0x000000000000F800)
set(BASEADDRESS_XTOSKRNL 0x0000000140000000)

1
sdk/cmake/baseaddress/i686.cmake
View File

@@ -1,3 +1,2 @@
# Set base addresses for all modules
set(BASEADDRESS_XTLDR 0x0000F800)
set(BASEADDRESS_XTOSKRNL 0x00400000)

70
sdk/cmake/emulation.cmake
View File

@@ -23,57 +23,49 @@ endif()
find_program(QEMU_EMULATOR ${QEMU_COMMAND})
if(QEMU_EMULATOR)
if(CMAKE_HOST_LINUX)
# This target starts up a QEMU+OVMF virtual machine using KVM accelerator
add_custom_target(testefikvm
DEPENDS install
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-EFI-KVM" -machine type=q35,kernel_irqchip=on,accel=kvm,mem-merge=off,vmport=off -enable-kvm -cpu host,-hypervisor,+topoext
-smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-bios ${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_${ARCH}.fd
-hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
-boot menu=on -d int -M smm=off -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
elseif(CMAKE_HOST_WIN32)
# This target starts up a QEMU+OVMF virtual machine using WHPX accelerator
add_custom_target(testefiwhpx
DEPENDS install
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-EFI-WHPX" -machine type=q35,kernel_irqchip=off,accel=whpx,mem-merge=off,vmport=off
-m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-bios ${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_${ARCH}.fd
-hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
-boot menu=on -d int -M smm=off -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
endif()
# This target starts up a QEMU+OVMF virtual machine using KVM accelerator
add_custom_target(testefikvm
DEPENDS install
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-EFI-KVM" -machine type=q35,kernel_irqchip=on,accel="kvm:whpx",mem-merge=off,vmport=off -enable-kvm -cpu host,-hypervisor,+topoext
-smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_code_${ARCH}.fd,if=pflash,format=raw,unit=0,readonly=on
-drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_vars_${ARCH}.fd,if=pflash,format=raw,unit=1
-hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
-boot menu=on -d int -M smm=off -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
# This target starts up a QEMU+OVMF virtual machine using TCG accelerator
add_custom_target(testefitcg
DEPENDS install
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-EFI-TCG" -machine type=q35,accel=tcg -cpu max,-hypervisor
-smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-bios ${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_${ARCH}.fd
-drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_code_${ARCH}.fd,if=pflash,format=raw,unit=0,readonly=on
-drive file=${EXECTOS_SOURCE_DIR}/sdk/firmware/ovmf_vars_${ARCH}.fd,if=pflash,format=raw,unit=1
-hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
-boot menu=on -d int -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
if(CMAKE_HOST_LINUX)
if(WIN32)
# This target starts up a QEMU+OVMF virtual machine using WHPX accelerator on Windows
add_custom_target(testkvm
DEPENDS install
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-WHPX" -machine accel=whpx,kernel-irqchip=off
-bios ${EXECTOS_SOURCE_DIR}/sdk/firmware/OVMF-pure-efi.fd
-hda fat:rw:${EXECTOS_BINARY_DIR}/output/binaries
-no-reboot -no-shutdown -serial stdio
COMMENT "Using WHPX acceleration on Windows"
VERBATIM USES_TERMINAL)
else()
# This target starts up a QEMU+SEABIOS virtual machine using KVM accelerator
add_custom_target(testkvm
DEPENDS diskimg
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-BIOS-KVM" -machine type=q35,kernel_irqchip=on,accel=kvm,mem-merge=off,vmport=off -enable-kvm -cpu host,-hypervisor,+topoext
-smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-hda ${EXECTOS_BINARY_DIR}/output/disk.img
-boot menu=on -d int -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
elseif(CMAKE_HOST_WIN32)
# This target starts up a QEMU+SEABIOS virtual machine using WHPX accelerator
add_custom_target(testwhpx
DEPENDS diskimg
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-BIOS-WHPX" -machine type=q35,kernel_irqchip=off,accel=whpx,mem-merge=off,vmport=off
-m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-hda ${EXECTOS_BINARY_DIR}/output/disk.img
-boot menu=on -d int -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
endif()
DEPENDS diskimg
COMMAND ${QEMU_COMMAND} -name "ExectOS-${ARCH}-BIOS-KVM" -machine type=q35,kernel_irqchip=on,accel="kvm:whpx",mem-merge=off,vmport=off -enable-kvm -cpu host,-hypervisor,+topoext
-smp 2,sockets=1,cores=1,threads=2 -m 4G -overcommit mem-lock=off -rtc clock=host,base=localtime,driftfix=none
-hda ${EXECTOS_BINARY_DIR}/output/disk.img
-boot menu=on -d int -no-reboot -no-shutdown -serial stdio
VERBATIM USES_TERMINAL)
endif()
# This target starts up a QEMU+SEABIOS virtual machine using TCG accelerator
add_custom_target(testtcg

86
sdk/cmake/functions.cmake
View File

@@ -59,102 +59,16 @@ function(add_module_linker_flags MODULE FLAGS)
set_module_property(${MODULE} LINK_FLAGS ${FLAGS})
endfunction()
# This function compiles XT Assembly Development Kit
function(generate_xtadk TARGET_NAME SOURCE_FILES)
# Define the absolute destination path for the generated header file
set(HEADER_OUTPUT "${EXECTOS_BINARY_DIR}/sdk/includes/${TARGET_NAME}.h")
get_filename_component(HEADER_OUTPUT_DIRECTORY "${HEADER_OUTPUT}" DIRECTORY)
# Tokenize global CXX flags into a list to ensure correct argument expansion
separate_arguments(COMPILER_FLAGS NATIVE_COMMAND "${CMAKE_CXX_FLAGS}")
# Resolve and tokenize build-configuration specific flags
string(TOUPPER "${CMAKE_BUILD_TYPE}" BUILD_TYPE)
if(BUILD_TYPE)
separate_arguments(BUILD_TYPE_SPECIFIC_FLAGS NATIVE_COMMAND "${CMAKE_CXX_FLAGS_${BUILD_TYPE}}")
endif()
# Retrieve compiler definitions, include paths, and options
get_directory_property(COMPILE_DEFINITIONS COMPILE_DEFINITIONS)
get_directory_property(INCLUDE_DIRECTORIES INCLUDE_DIRECTORIES)
get_directory_property(COMPILE_OPTIONS COMPILE_OPTIONS)
# Initialize the final compiler argument list
set(COMPILER_ARGUMENTS "")
list(APPEND COMPILER_ARGUMENTS ${COMPILER_FLAGS} ${BUILD_TYPE_SPECIFIC_FLAGS})
# Transform definitions into MSVC-style
foreach(DEFINITION ${COMPILE_DEFINITIONS})
list(APPEND COMPILER_ARGUMENTS "/D${DEFINITION}")
endforeach()
# Transform include paths into MSVC-style
foreach(INCLUDE_PATH ${INCLUDE_DIRECTORIES})
list(APPEND COMPILER_ARGUMENTS "/I${INCLUDE_PATH}")
endforeach()
# Append all supplemental compiler options
list(APPEND COMPILER_ARGUMENTS ${COMPILE_OPTIONS})
set(COLLECTED_ASSEMBLY_OUTPUTS "")
# Iterate through each source file to create individual assembly generation rules
foreach(SOURCE_FILE_PATH ${SOURCE_FILES})
# Extract the base filename
get_filename_component(FILENAME_WITHOUT_EXTENSION "${SOURCE_FILE_PATH}" NAME_WE)
# Define the unique output path for the intermediate assembly file
set(CURRENT_ASSEMBLY_OUTPUT "${CMAKE_CURRENT_BINARY_DIR}/${FILENAME_WITHOUT_EXTENSION}.S")
list(APPEND COLLECTED_ASSEMBLY_OUTPUTS "${CURRENT_ASSEMBLY_OUTPUT}")
get_filename_component(CURRENT_ASSEMBLY_DIRECTORY "${CURRENT_ASSEMBLY_OUTPUT}" DIRECTORY)
# Execute the compiler to generate assembly code
add_custom_command(
OUTPUT "${CURRENT_ASSEMBLY_OUTPUT}"
COMMAND ${CMAKE_COMMAND} -E make_directory "${CURRENT_ASSEMBLY_DIRECTORY}"
COMMAND ${CMAKE_CXX_COMPILER}
${COMPILER_ARGUMENTS}
/c /FAs /Fa${CURRENT_ASSEMBLY_OUTPUT}
-- ${SOURCE_FILE_PATH}
DEPENDS "${SOURCE_FILE_PATH}"
COMMENT "Generating XTADK Assembly: ${FILENAME_WITHOUT_EXTENSION}"
VERBATIM
COMMAND_EXPAND_LISTS
)
endforeach()
# Aggregate all generated assembly units into a single consolidated XTADK header
add_custom_command(
OUTPUT "${HEADER_OUTPUT}"
COMMAND ${CMAKE_COMMAND} -E make_directory "${HEADER_OUTPUT_DIRECTORY}"
COMMAND xtadkgen ${COLLECTED_ASSEMBLY_OUTPUTS} -O "${HEADER_OUTPUT}"
DEPENDS ${COLLECTED_ASSEMBLY_OUTPUTS}
COMMENT "Generating XTADK header: ${TARGET_NAME}"
VERBATIM
)
# Establish the generation target and expose the header directory via an interface library
add_custom_target(${TARGET_NAME}_gen DEPENDS "${HEADER_OUTPUT}")
add_library(${TARGET_NAME} INTERFACE)
add_dependencies(${TARGET_NAME} ${TARGET_NAME}_gen)
target_include_directories(${TARGET_NAME} INTERFACE "${EXECTOS_BINARY_DIR}/sdk/includes")
endfunction()
# This function compiles an assembly bootsector file into a flat binary
function(compile_bootsector NAME SOURCE BASEADDR ENTRYPOINT)
set(BINARY_NAME "${NAME}.bin")
set(OBJECT_NAME "${NAME}.obj")
get_directory_property(DEFS COMPILE_DEFINITIONS)
foreach(def ${DEFS})
list(APPEND ASM_DEFS "-D${def}")
endforeach()
add_custom_command(
OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${BINARY_NAME}
COMMAND ${CMAKE_ASM_COMPILER}
/nologo
--target=i386-none-elf
${ASM_DEFS}
-I${CMAKE_CURRENT_SOURCE_DIR}
/Fo${CMAKE_CURRENT_BINARY_DIR}/${OBJECT_NAME}
-c -- ${SOURCE}

BIN
sdk/firmware/OVMF-pure-efi.fd Normal file
View File

Binary file not shown.

4
sdk/firmware/README.md
View File

@@ -13,10 +13,6 @@ The ovmf_vars files, store UEFI variables, which are used to store and retrieve
boot options, device settings, and system preferences. The ovmf_vars file contains the persistent variables specific to
a virtual machine, allowing it to maintain its configuration across multiple boot sessions.
## BOCHS ROM BIOS
The rombios.bin file contains the ROM BIOS image for Bochs. This image is distributed under the GNU Lesser General Public
License (LGPL).
## Video BIOS (LGPL'd VGABios)
The vgabios.bin file contains the Video Bios for Bochs and QEMU. This VGA Bios is very specific to the emulated VGA card.
It is NOT meant to drive a physical vga card. It also implements support for VBE version 2.0.

BIN
sdk/firmware/ovmf_i686.fd → sdk/firmware/ovmf_code_amd64.fd
View File

Binary file not shown.

BIN
sdk/firmware/ovmf_amd64.fd → sdk/firmware/ovmf_code_i686.fd
View File

Binary file not shown.

BIN
sdk/firmware/ovmf_vars_amd64.fd Normal file
View File

Binary file not shown.

BIN
sdk/firmware/ovmf_vars_i686.fd Normal file
View File

Binary file not shown.

14
sdk/xtadk/CMakeLists.txt
View File

@@ -1,14 +0,0 @@
# XT Assembly Development Kit
PROJECT(XTADK)
# Specify include directories
include_directories(
${EXECTOS_SOURCE_DIR}/sdk/xtdk
${XTADK_SOURCE_DIR}/includes)
# Specify list of XTADK source code files
list(APPEND XTADK_SOURCE
${XTADK_SOURCE_DIR}/${ARCH}/ke.cc)
# Generate assembly header from XTADK sources
generate_xtadk(xtadk "${XTADK_SOURCE}")

92
sdk/xtadk/amd64/ke.cc
View File

@@ -1,92 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtadk/amd64/ke.cc
* DESCRIPTION: ADK generator for AMD64 version of Kernel Library
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtkmapi.h>
#include <adkdefs.h>
/**
* Generates a definitions file for the Kernel Library used by the XTOS kernel assembly code
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCLINK
XTAPI
VOID
GenerateAssemblyDefinitions(VOID)
{
/* Generate KTRAP_FRAME offsets */
ADK_OFFSET(KTRAP_FRAME, Xmm0);
ADK_OFFSET(KTRAP_FRAME, Xmm1);
ADK_OFFSET(KTRAP_FRAME, Xmm2);
ADK_OFFSET(KTRAP_FRAME, Xmm3);
ADK_OFFSET(KTRAP_FRAME, Xmm4);
ADK_OFFSET(KTRAP_FRAME, Xmm5);
ADK_OFFSET(KTRAP_FRAME, Xmm6);
ADK_OFFSET(KTRAP_FRAME, Xmm7);
ADK_OFFSET(KTRAP_FRAME, Xmm8);
ADK_OFFSET(KTRAP_FRAME, Xmm9);
ADK_OFFSET(KTRAP_FRAME, Xmm10);
ADK_OFFSET(KTRAP_FRAME, Xmm11);
ADK_OFFSET(KTRAP_FRAME, Xmm12);
ADK_OFFSET(KTRAP_FRAME, Xmm13);
ADK_OFFSET(KTRAP_FRAME, Xmm14);
ADK_OFFSET(KTRAP_FRAME, Xmm15);
ADK_OFFSET(KTRAP_FRAME, MxCsr);
ADK_OFFSET(KTRAP_FRAME, PreviousMode);
ADK_OFFSET(KTRAP_FRAME, Cr2);
ADK_OFFSET(KTRAP_FRAME, Cr3);
ADK_OFFSET(KTRAP_FRAME, Dr0);
ADK_OFFSET(KTRAP_FRAME, Dr1);
ADK_OFFSET(KTRAP_FRAME, Dr2);
ADK_OFFSET(KTRAP_FRAME, Dr3);
ADK_OFFSET(KTRAP_FRAME, Dr6);
ADK_OFFSET(KTRAP_FRAME, Dr7);
ADK_OFFSET(KTRAP_FRAME, SegDs);
ADK_OFFSET(KTRAP_FRAME, SegEs);
ADK_OFFSET(KTRAP_FRAME, SegFs);
ADK_OFFSET(KTRAP_FRAME, SegGs);
ADK_OFFSET(KTRAP_FRAME, Rax);
ADK_OFFSET(KTRAP_FRAME, Rbx);
ADK_OFFSET(KTRAP_FRAME, Rcx);
ADK_OFFSET(KTRAP_FRAME, Rdx);
ADK_OFFSET(KTRAP_FRAME, R8);
ADK_OFFSET(KTRAP_FRAME, R9);
ADK_OFFSET(KTRAP_FRAME, R10);
ADK_OFFSET(KTRAP_FRAME, R11);
ADK_OFFSET(KTRAP_FRAME, R12);
ADK_OFFSET(KTRAP_FRAME, R13);
ADK_OFFSET(KTRAP_FRAME, R14);
ADK_OFFSET(KTRAP_FRAME, R15);
ADK_OFFSET(KTRAP_FRAME, Rsi);
ADK_OFFSET(KTRAP_FRAME, Rdi);
ADK_OFFSET(KTRAP_FRAME, Rbp);
ADK_OFFSET(KTRAP_FRAME, Vector);
ADK_OFFSET(KTRAP_FRAME, ErrorCode);
ADK_OFFSET(KTRAP_FRAME, ExceptionFrame);
ADK_OFFSET(KTRAP_FRAME, Rip);
ADK_OFFSET(KTRAP_FRAME, SegCs);
ADK_OFFSET(KTRAP_FRAME, Flags);
ADK_OFFSET(KTRAP_FRAME, Rsp);
ADK_OFFSET(KTRAP_FRAME, SegSs);
/* Generate KTRAP_FRAME size and REGISTERS_SIZE */
ADK_SIZE(KTRAP_FRAME);
ADK_SIZE_FROM(REGISTERS_SIZE, KTRAP_FRAME, Rax);
/* Generate PROCESSOR_START_BLOCK offsets */
ADK_OFFSET(PROCESSOR_START_BLOCK, Cr3);
ADK_OFFSET(PROCESSOR_START_BLOCK, Cr4);
ADK_OFFSET(PROCESSOR_START_BLOCK, EntryPoint);
ADK_OFFSET(PROCESSOR_START_BLOCK, InitialStack);
ADK_OFFSET(PROCESSOR_START_BLOCK, ProcessorStructures);
ADK_OFFSET(PROCESSOR_START_BLOCK, Stack);
ADK_OFFSET(PROCESSOR_START_BLOCK, Started);
}

66
sdk/xtadk/i686/ke.cc
View File

@@ -1,66 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtadk/i686/ke.cc
* DESCRIPTION: ADK generator for i686 version of Kernel Library
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <xtkmapi.h>
#include <adkdefs.h>
/**
* Generates a definitions file for the Kernel Library used by the XTOS kernel assembly code
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCLINK
XTAPI
VOID
GenerateAssemblyDefinitions(VOID)
{
/* Generate KTRAP_FRAME offsets */
ADK_OFFSET(KTRAP_FRAME, PreviousMode);
ADK_OFFSET(KTRAP_FRAME, Cr2);
ADK_OFFSET(KTRAP_FRAME, Cr3);
ADK_OFFSET(KTRAP_FRAME, Dr0);
ADK_OFFSET(KTRAP_FRAME, Dr1);
ADK_OFFSET(KTRAP_FRAME, Dr2);
ADK_OFFSET(KTRAP_FRAME, Dr3);
ADK_OFFSET(KTRAP_FRAME, Dr6);
ADK_OFFSET(KTRAP_FRAME, Dr7);
ADK_OFFSET(KTRAP_FRAME, SegDs);
ADK_OFFSET(KTRAP_FRAME, SegEs);
ADK_OFFSET(KTRAP_FRAME, SegFs);
ADK_OFFSET(KTRAP_FRAME, SegGs);
ADK_OFFSET(KTRAP_FRAME, Eax);
ADK_OFFSET(KTRAP_FRAME, Ebx);
ADK_OFFSET(KTRAP_FRAME, Ecx);
ADK_OFFSET(KTRAP_FRAME, Edx);
ADK_OFFSET(KTRAP_FRAME, Esi);
ADK_OFFSET(KTRAP_FRAME, Edi);
ADK_OFFSET(KTRAP_FRAME, Ebp);
ADK_OFFSET(KTRAP_FRAME, Vector);
ADK_OFFSET(KTRAP_FRAME, ErrorCode);
ADK_OFFSET(KTRAP_FRAME, Eip);
ADK_OFFSET(KTRAP_FRAME, SegCs);
ADK_OFFSET(KTRAP_FRAME, Flags);
ADK_OFFSET(KTRAP_FRAME, Esp);
ADK_OFFSET(KTRAP_FRAME, SegSs);
/* Generate KTRAP_FRAME size and REGISTERS_SIZE */
ADK_SIZE(KTRAP_FRAME);
ADK_SIZE_FROM(REGISTERS_SIZE, KTRAP_FRAME, Eax);
/* Generate PROCESSOR_START_BLOCK offsets */
ADK_OFFSET(PROCESSOR_START_BLOCK, Cr3);
ADK_OFFSET(PROCESSOR_START_BLOCK, Cr4);
ADK_OFFSET(PROCESSOR_START_BLOCK, EntryPoint);
ADK_OFFSET(PROCESSOR_START_BLOCK, InitialStack);
ADK_OFFSET(PROCESSOR_START_BLOCK, ProcessorStructures);
ADK_OFFSET(PROCESSOR_START_BLOCK, Stack);
ADK_OFFSET(PROCESSOR_START_BLOCK, Started);
}

19
sdk/xtadk/includes/adkdefs.h
View File

@@ -1,19 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtadk/adkdefs.h
* DESCRIPTION: Definitions for XTADK
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTADK_ADKDEFS_H
#define __XTADK_ADKDEFS_H
/* Macros for calculating structure size and offsets for assembler code */
#define ADK_DEFINE(Symbol, Value) __asm__ volatile("\n\t# ==> " #Symbol " %c0" : : "i" ((SIZE_T)(Value)))
#define ADK_OFFSET(Structure, Member) ADK_DEFINE(Structure ## _ ## Member, FIELD_OFFSET(Structure, Member))
#define ADK_SIZE(Structure) ADK_DEFINE(Structure ## _SIZE, sizeof(Structure))
#define ADK_SIZE_FROM(Name, Structure, Member) ADK_DEFINE(Structure ## _ ## Name, sizeof(Structure) - FIELD_OFFSET(Structure, Member))
#endif /* __XTADK_ADKDEFS_H */

62
sdk/xtdk/amd64/artypes.h
View File

@@ -12,7 +12,6 @@
#include <xtdefs.h>
#include <xtstruct.h>
#include <xttypes.h>
#include ARCH_HEADER(xtstruct.h)
/* Control Register 0 constants */
@@ -128,10 +127,6 @@
#define X86_EFLAGS_VIP_MASK 0x00100000 /* Virtual Interrupt Pending */
#define X86_EFLAGS_ID_MASK 0x00200000 /* Identification */
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* CPU vendor enumeration list */
typedef enum _CPU_VENDOR
{
@@ -140,18 +135,6 @@ typedef enum _CPU_VENDOR
CPU_VENDOR_UNKNOWN = 0xFFFFFFFF
} CPU_VENDOR, *PCPU_VENDOR;
/* CPUID advanced power management features (0x80000007) enumeration list */
typedef enum _CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT
{
CPUID_FEATURES_EDX_TS = 1 << 0, /* Temperature Sensor */
CPUID_FEATURES_EDX_FIS = 1 << 1, /* Frequency ID Selection */
CPUID_FEATURES_EDX_VIS = 1 << 2, /* Voltage ID Selection */
CPUID_FEATURES_EDX_TTS = 1 << 3, /* ThermaTrip Support */
CPUID_FEATURES_EDX_HTC = 1 << 4, /* Hardware Thermal Throttling */
CPUID_FEATURES_EDX_STC = 1 << 5, /* Software Thermal Throttling */
CPUID_FEATURES_EDX_TSCI = 1 << 8 /* TSC Invariant */
} CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT, *PCPUID_FEATURES_ADVANCED_POWER_MANAGEMENT;
/* CPUID extended features (0x80000001) enumeration list */
typedef enum _CPUID_FEATURES_EXTENDED
{
@@ -193,23 +176,6 @@ typedef enum _CPUID_FEATURES_EXTENDED
CPUID_FEATURES_EDX_3DNOW = 1 << 31
} CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED;
/* CPUID Thermal and Power Management features (0x00000006) enumeration list */
typedef enum _CPUID_FEATURES_POWER_MANAGEMENT
{
CPUID_FEATURES_EAX_DTHERM = 1 << 0,
CPUID_FEATURES_EAX_IDA = 1 << 1,
CPUID_FEATURES_EAX_ARAT = 1 << 2,
CPUID_FEATURES_EAX_PLN = 1 << 4,
CPUID_FEATURES_EAX_PTS = 1 << 6,
CPUID_FEATURES_EAX_HWP = 1 << 7,
CPUID_FEATURES_EAX_HWP_NOTIFY = 1 << 8,
CPUID_FEATURES_EAX_HWP_ACT_WINDOW = 1 << 9,
CPUID_FEATURES_EAX_HWP_EPP = 1 << 10,
CPUID_FEATURES_EAX_HWP_PKG_REQ = 1 << 11,
CPUID_FEATURES_EAX_HWP_HIGHEST_PERF_CHANGE = 1 << 15,
CPUID_FEATURES_EAX_HFI = 1 << 19
} CPUID_FEATURES_LEAF6, *PCPUID_FEATURES_LEAF6;
/* CPUID STD1 features (0x00000001) enumeration list */
typedef enum _CPUID_FEATURES_STANDARD1
{
@@ -236,7 +202,7 @@ typedef enum _CPUID_FEATURES_STANDARD1
CPUID_FEATURES_ECX_X2APIC = 1 << 21,
CPUID_FEATURES_ECX_MOVBE = 1 << 22,
CPUID_FEATURES_ECX_POPCNT = 1 << 23,
CPUID_FEATURES_ECX_TSC_DEADLINE = 1 << 24,
CPUID_FEATURES_ECX_TSC = 1 << 24,
CPUID_FEATURES_ECX_AES = 1 << 25,
CPUID_FEATURES_ECX_XSAVE = 1 << 26,
CPUID_FEATURES_ECX_OSXSAVE = 1 << 27,
@@ -410,29 +376,20 @@ typedef enum _CPUID_FEATURES_STANDARD7_LEAF1
/* CPUID requests */
typedef enum _CPUID_REQUESTS
{
CPUID_GET_VENDOR_STRING = 0x00000000,
CPUID_GET_STANDARD1_FEATURES = 0x00000001,
CPUID_GET_TLB_CACHE = 0x00000002,
CPUID_GET_SERIAL = 0x00000003,
CPUID_GET_CACHE_TOPOLOGY = 0x00000004,
CPUID_GET_MONITOR_MWAIT = 0x00000005,
CPUID_GET_POWER_MANAGEMENT = 0x00000006,
CPUID_GET_STANDARD7_FEATURES = 0x00000007,
CPUID_GET_TSC_CRYSTAL_CLOCK = 0x00000015,
CPUID_GET_EXTENDED_MAX = 0x80000000,
CPUID_GET_EXTENDED_FEATURES = 0x80000001,
CPUID_GET_ADVANCED_POWER_MANAGEMENT = 0x80000007
CPUID_GET_VENDOR_STRING,
CPUID_GET_STANDARD1_FEATURES,
CPUID_GET_TLB_CACHE,
CPUID_GET_SERIAL,
CPUID_GET_CACHE_TOPOLOGY,
CPUID_GET_MONITOR_MWAIT,
CPUID_GET_POWER_MANAGEMENT,
CPUID_GET_STANDARD7_FEATURES
} CPUID_REQUESTS, *PCPUID_REQUESTS;
/* Interrupt handler */
typedef VOID (*PINTERRUPT_HANDLER)(PKTRAP_FRAME TrapFrame);
/* Processor identification information */
typedef struct _CPU_IDENTIFICATION
{
ULONGLONG ExtendedFeatureBits;
USHORT Family;
ULONGLONG FeatureBits;
USHORT Model;
USHORT Stepping;
CPU_VENDOR Vendor;
@@ -469,5 +426,4 @@ typedef enum _TRAMPOLINE_TYPE
TrampolineEnableXpa
} TRAMPOLINE_TYPE, *PTRAMPOLINE_TYPE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_ARTYPES_H */

4
sdk/xtdk/amd64/hlfuncs.h
View File

@@ -15,9 +15,6 @@
#include <amd64/xtstruct.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Hardware layer routines forward references */
XTCLINK
XTCDECL
@@ -52,5 +49,4 @@ VOID
HlWritePort32(IN USHORT Port,
IN ULONG Value);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_HLFUNCS_H */

211
sdk/xtdk/amd64/hltypes.h
View File

@@ -9,7 +9,6 @@
#ifndef __XTDK_AMD64_HLTYPES_H
#define __XTDK_AMD64_HLTYPES_H
#include <xtbase.h>
#include <xtdefs.h>
#include <xtstruct.h>
#include <xttypes.h>
@@ -39,9 +38,6 @@
#define APIC_VECTOR_PERF 0xFE
#define APIC_VECTOR_NMI 0xFF
/* APIC SIPI vector shift */
#define APIC_VECTOR_SIPI_SHIFT 12
/* APIC destination formats */
#define APIC_DF_FLAT 0xFFFFFFFF
#define APIC_DF_CLUSTER 0x0FFFFFFF
@@ -57,27 +53,6 @@
/* Maximum number of I/O APICs */
#define APIC_MAX_IOAPICS 64
/* I/O APIC base address */
#define IOAPIC_DEFAULT_BASE 0xFEC00000
/* I/O APIC definitions */
#define IOAPIC_MAX_CONTROLLERS 128
#define IOAPIC_MAX_OVERRIDES 16
#define IOAPIC_RTE_MASKED 0x100FF
#define IOAPIC_RTE_SIZE 2
#define IOAPIC_VECTOR_FREE 0xFF
#define IOAPIC_VECTOR_RESERVED 0xFE
/* IOAPIC offsets */
#define IOAPIC_IOREGSEL 0x00
#define IOAPIC_IOWIN 0x10
/* IOAPIC registers */
#define IOAPIC_ID 0x00
#define IOAPIC_VER 0x01
#define IOAPIC_ARB 0x02
#define IOAPIC_REDTBL 0x10
/* 8259/ISP PIC ports definitions */
#define PIC1_CONTROL_PORT 0x20
#define PIC1_DATA_PORT 0x21
@@ -87,87 +62,6 @@
/* PIC vector definitions */
#define PIC1_VECTOR_SPURIOUS 0x37
/* HPET General Capabilities definitions */
#define HPET_CAPABILITY_64BIT 0x2000ULL
#define HPET_CAPABILITY_LEGACY_REPLACEMENT 0x8000ULL
/* HPET General Configuration definitions */
#define HPET_CONFIG_ENABLE 0x0001ULL
#define HPET_CONFIG_LEGACY_REPLACEMENT 0x0002ULL
/* HPET Timer Configuration definitions */
#define HPET_TIMER_CONFIG_LEVEL_TRIGGERED 0x0002ULL
#define HPET_TIMER_CONFIG_ENABLED 0x0004ULL
#define HPET_TIMER_CONFIG_PERIODIC 0x0008ULL
#define HPET_TIMER_CONFIG_SUPPORTS_PERIODIC 0x0010ULL
#define HPET_TIMER_CONFIG_SUPPORTS_64BIT 0x0020ULL
#define HPET_TIMER_CONFIG_VALUE_ACCUMULATOR 0x0040ULL
#define HPET_TIMER_CONFIG_FORCE_32BIT 0x0100ULL
#define HPET_TIMER_CONFIG_FSB_ENABLED 0x4000ULL
#define HPET_TIMER_CONFIG_SUPPORTS_FSB 0x8000ULL
/* PIT ports definitions */
#define PIT_COMMAND_PORT 0x43
#define PIT_DATA_PORT0 0x40
#define PIT_DATA_PORT1 0x41
#define PIT_DATA_PORT2 0x42
/* PIT related definitions */
#define PIT_BASE_FREQUENCY 1193182
/* PIT Access Mode: Defines how the CPU reads or writes the counter value */
#define PIT_CMD_ACCESS_LATCH 0x00
#define PIT_CMD_ACCESS_LOWBYTE_ONLY 0x10
#define PIT_CMD_ACCESS_HIGHBYTE_ONLY 0x20
#define PIT_CMD_ACCESS_LOWBYTE_HIGHBYTE 0x30
/* PIT Channel Selection: Specifies the physical timer channel to configure */
#define PIT_CMD_CHANNEL0 0x00
#define PIT_CMD_CHANNEL1 0x40
#define PIT_CMD_CHANNEL2 0x80
/* PIT Operating Mode: Defines the hardware behavior and the generated waveform */
#define PIT_MODE0_INT_ON_TERMINAL_COUNT 0x00
#define PIT_MODE1_ONESHOT 0x02
#define PIT_MODE2_RATE_GENERATOR 0x04
#define PIT_MODE3_SQUARE_WAVE_GEN 0x06
#define PIT_MODE4_SOFTWARE_STROBE 0x08
#define PIT_MODE5_HARDWARE_STROBE 0x0A
/* CMOS controller access ports */
#define CMOS_SELECT_PORT 0x70
#define CMOS_DATA_PORT 0x71
/* CMOD Select port definitions */
#define CMOS_NMI_SELECT 0x80
#define CMOS_REGISTER_SECOND 0x00
#define CMOS_REGISTER_MINUTE 0x02
#define CMOS_REGISTER_HOUR 0x04
#define CMOS_REGISTER_WEEKDAY 0x06
#define CMOS_REGISTER_DAY 0x07
#define CMOS_REGISTER_MONTH 0x08
#define CMOS_REGISTER_YEAR 0x09
#define CMOS_REGISTER_A 0x0A
#define CMOS_REGISTER_B 0x0B
#define CMOS_REGISTER_C 0x0C
/* CMOS Register A definitions */
#define CMOS_REGISTER_A_RATE_MASK 0x0F
#define CMOS_REGISTER_A_UPDATE_IN_PROGRESS 0x80
/* CMOS Register B definitions */
#define CMOS_REGISTER_B_24_HOUR 0x02
#define CMOS_REGISTER_B_BINARY 0x04
#define CMOS_REGISTER_B_PERIODIC 0x40
#define CMOS_REGISTER_B_SET_CLOCK 0x80
/* CMOS Register C definitions */
#define CMOS_REGISTER_C_PERIODIC 0x40
#define CMOS_REGISTER_C_INTERRUPT 0x80
/* CMOS RTC 24-hour mode */
#define CMOS_RTC_POST_MERIDIEM 0x80
/* Serial ports information */
#define COMPORT_ADDRESS {0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}
#define COMPORT_COUNT 8
@@ -175,17 +69,6 @@
/* Initial stall factor */
#define INITIAL_STALL_FACTOR 100
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* APIC destination mode enumeration list */
typedef enum _APIC_DEST_MODE
{
APIC_DM_Physical,
APIC_DM_Logical
} APIC_DEST_MODE, *PAPIC_DEST_MODE;
/* APIC delivery mode enumeration list */
typedef enum _APIC_DM
{
@@ -243,7 +126,6 @@ typedef enum _APIC_REGISTER
APIC_TICR = 0x38, /* Initial Count Register for Timer */
APIC_TCCR = 0x39, /* Current Count Register for Timer */
APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */
APIC_SIPI = 0x3F, /* Self-IPI Register */
APIC_EAFR = 0x40, /* extended APIC Feature register */
APIC_EACR = 0x41, /* Extended APIC Control Register */
APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */
@@ -253,19 +135,6 @@ typedef enum _APIC_REGISTER
APIC_EXT3LVTR = 0x53 /* Extended Interrupt 3 Local Vector Table */
} APIC_REGISTER, *PAPIC_REGISTER;
/* APIC Timer Divide enumeration list */
typedef enum _APIC_TIMER_DIVISOR
{
TIMER_DivideBy2 = 0,
TIMER_DivideBy4 = 1,
TIMER_DivideBy8 = 2,
TIMER_DivideBy16 = 3,
TIMER_DivideBy32 = 8,
TIMER_DivideBy64 = 9,
TIMER_DivideBy128 = 10,
TIMER_DivideBy1 = 11,
} APIC_TIMER_DIVISOR, *PAPIC_TIMER_DIVISOR;
/* I8259 PIC interrupt mode enumeration list */
typedef enum _PIC_I8259_ICW1_INTERRUPT_MODE
{
@@ -310,17 +179,6 @@ typedef enum _PIC_I8259_ICW4_SYSTEM_MODE
New8086Mode
} PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
/* Supported hardware timer backends */
typedef enum _TIMER_TYPE
{
TimerNone,
TimerAcpiPm,
TimerHpet,
TimerLapic,
TimerPit,
TimerTsc
} TIMER_TYPE, *PTIMER_TYPE;
/* APIC Base Register */
typedef union _APIC_BASE_REGISTER
{
@@ -394,40 +252,6 @@ typedef union _APIC_SPURIOUS_REGISTER
};
} APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
/* I/O APIC Controller information */
typedef struct _IOAPIC_DATA
{
ULONG GsiBase;
ULONG Identifier;
ULONG LineCount;
PHYSICAL_ADDRESS PhysicalAddress;
ULONG_PTR VirtualAddress;
} IOAPIC_DATA, *PIOAPIC_DATA;
/* I/O APIC Redirection Register */
typedef union _IOAPIC_REDIRECTION_REGISTER
{
ULONGLONG LongLong;
struct
{
UINT Base;
UINT Extended;
};
struct
{
ULONGLONG Vector:8;
ULONGLONG DeliveryMode:3;
ULONGLONG DestinationMode:1;
ULONGLONG DeliveryStatus:1;
ULONGLONG PinPolarity:1;
ULONGLONG RemoteIRR:1;
ULONGLONG TriggerMode:1;
ULONGLONG Mask:1;
ULONGLONG Reserved:39;
ULONGLONG Destination:8;
};
} IOAPIC_REDIRECTION_REGISTER, *PIOAPIC_REDIRECTION_REGISTER;
/* I8259 PIC register structure */
typedef union _PIC_I8259_ICW1
{
@@ -493,39 +317,4 @@ typedef union _PIC_I8259_ICW4
UCHAR Bits;
} PIC_I8259_ICW4, *PPIC_I8259_ICW4;
/* HPET Registers structure definition */
typedef struct _HPET_REGISTERS
{
VOLATILE ULONGLONG GeneralCapabilities;
VOLATILE ULONGLONG Reserved0;
VOLATILE ULONGLONG GeneralConfiguration;
VOLATILE ULONGLONG Reserved1;
VOLATILE ULONGLONG GeneralInterruptStatus;
VOLATILE ULONGLONG Reserved2;
VOLATILE ULONGLONG Reserved3[2][12];
VOLATILE ULONGLONG MainCounterValue;
VOLATILE ULONGLONG Reserved4;
struct
{
VOLATILE ULONGLONG Configuration;
VOLATILE ULONGLONG Comparator;
VOLATILE ULONGLONG FsbInterruptRoute;
VOLATILE ULONGLONG Reserved;
} Timers[];
} HPET_REGISTERS, *PHPET_REGISTERS;
/* Hardware timer capabilities and CPU clock features */
typedef struct _TIMER_CAPABILITIES
{
BOOLEAN Arat;
BOOLEAN Art;
BOOLEAN InvariantTsc;
BOOLEAN RDTSCP;
ULONG TimerFrequency;
BOOLEAN TscDeadline;
ULONG TscDenominator;
ULONG TscNumerator;
} TIMER_CAPABILITIES, *PTIMER_CAPABILITIES;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_HLTYPES_H */

277
sdk/xtdk/amd64/ketypes.h
View File

@@ -12,160 +12,89 @@
#include <xtbase.h>
#include <xtstruct.h>
#include <xttypes.h>
#include <extypes.h>
#include <potypes.h>
#include ARCH_HEADER(xtstruct.h)
#include ARCH_HEADER(artypes.h)
/* Selector masks */
#define MODE_MASK 0x0001
#define RPL_MASK 0x0003
#define MODE_MASK 0x0001
#define RPL_MASK 0x0003
/* GDT selector names */
#define KGDT_NULL 0x0000
#define KGDT_R0_CMCODE 0x0008
#define KGDT_R0_CODE 0x0010
#define KGDT_R0_DATA 0x0018
#define KGDT_R3_CMCODE 0x0020
#define KGDT_R3_DATA 0x0028
#define KGDT_R3_CODE 0x0030
#define KGDT_SYS_TSS 0x0040
#define KGDT_R3_CMTEB 0x0050
#define KGDT_R0_LDT 0x0060
#define KGDT_ALIAS 0x0070
#define KGDT_NULL 0x0000
#define KGDT_R0_CODE 0x0010
#define KGDT_R0_DATA 0x0018
#define KGDT_R3_CMCODE 0x0020
#define KGDT_R3_DATA 0x0028
#define KGDT_R3_CODE 0x0030
#define KGDT_SYS_TSS 0x0040
#define KGDT_R3_CMTEB 0x0050
#define KGDT_R0_LDT 0x0060
#define KGDT_ALIAS 0x0070
/* GDT descriptor privilege levels */
#define KGDT_DPL_SYSTEM 0
#define KGDT_DPL_USER 3
#define KGDT_DPL_SYSTEM 0
#define KGDT_DPL_USER 3
/* GDT descriptor properties */
#define KGDT_DESCRIPTOR_ACCESSED 0x01
#define KGDT_DESCRIPTOR_READ_WRITE 0x02
#define KGDT_DESCRIPTOR_EXECUTE_READ 0x02
#define KGDT_DESCRIPTOR_EXPAND_DOWN 0x04
#define KGDT_DESCRIPTOR_CONFORMING 0x04
#define KGDT_DESCRIPTOR_CODE 0x08
#define KGDT_DESCRIPTOR_ACCESSED 0x01
#define KGDT_DESCRIPTOR_READ_WRITE 0x02
#define KGDT_DESCRIPTOR_EXECUTE_READ 0x02
#define KGDT_DESCRIPTOR_EXPAND_DOWN 0x04
#define KGDT_DESCRIPTOR_CONFORMING 0x04
#define KGDT_DESCRIPTOR_CODE 0x08
/* GDT descriptor type codes */
#define KGDT_TYPE_NONE 0x00
#define KGDT_TYPE_CODE (0x10 | KGDT_DESCRIPTOR_CODE | KGDT_DESCRIPTOR_EXECUTE_READ)
#define KGDT_TYPE_DATA (0x10 | KGDT_DESCRIPTOR_READ_WRITE)
#define KGDT_TYPE_NONE 0x0
#define KGDT_TYPE_CODE (0x10 | KGDT_DESCRIPTOR_CODE | KGDT_DESCRIPTOR_EXECUTE_READ)
#define KGDT_TYPE_DATA (0x10 | KGDT_DESCRIPTOR_READ_WRITE)
/* IDT access levels */
#define KIDT_ACCESS_RING0 0x0
#define KIDT_ACCESS_RING3 0x3
#define KIDT_ACCESS_RING0 0x0
#define KIDT_ACCESS_RING3 0x3
/* IDT Interrupt Stack Table entries */
#define KIDT_IST_RESERVED 0
#define KIDT_IST_PANIC 1
#define KIDT_IST_MCA 2
#define KIDT_IST_NMI 3
#define KIDT_IST_RESERVED 0
#define KIDT_IST_PANIC 1
#define KIDT_IST_MCA 2
/* AMD64 Segment Types */
#define AMD64_TASK_GATE 0x5
#define AMD64_TSS 0x9
#define AMD64_ACTIVE_TSS 0xB
#define AMD64_CALL_GATE 0xC
#define AMD64_INTERRUPT_GATE 0xE
#define AMD64_TRAP_GATE 0xF
/* Kernel CPU Standard Features */
#define KCF_VME (1ULL << 0) /* Virtual 8086 Mode Enhancements */
#define KCF_LARGE_PAGE (1ULL << 1) /* Page Size Extensions */
#define KCF_RDTSC (1ULL << 2) /* Time Stamp Counter */
#define KCF_PAE (1ULL << 3) /* Physical Address Extension */
#define KCF_MCE (1ULL << 4) /* Machine Check Exception */
#define KCF_CMPXCHG8B (1ULL << 5) /* CMPXCHG8B Instruction */
#define KCF_APIC (1ULL << 6) /* APIC On-Chip */
#define KCF_FAST_SYSCALL (1ULL << 7) /* SYSENTER/SYSEXIT Instructions */
#define KCF_MTRR (1ULL << 8) /* Memory Type Range Registers */
#define KCF_GLOBAL_PAGE (1ULL << 9) /* Page Global Enable */
#define KCF_MCA (1ULL << 10) /* Machine Check Architecture */
#define KCF_CMOV (1ULL << 11) /* Conditional Move Instructions */
#define KCF_PAT (1ULL << 12) /* Page Attribute Table */
#define KCF_PSE36 (1ULL << 13) /* 36-bit Page Size Extension */
#define KCF_CLFLUSH (1ULL << 14) /* CLFLUSH Instruction */
#define KCF_FXSR (1ULL << 15) /* FXSAVE/FXRSTOR Instructions */
#define KCF_ACPI (1ULL << 16) /* Thermal Monitor and Software Controlled Clock */
#define KCF_MMX (1ULL << 17) /* MMX Technology */
#define KCF_SSE (1ULL << 18) /* Streaming SIMD Extensions */
#define KCF_SSE2 (1ULL << 19) /* Streaming SIMD Extensions 2 */
#define KCF_SMT (1ULL << 20) /* Hyper-Threading Technology */
#define KCF_SSE3 (1ULL << 21) /* Streaming SIMD Extensions 3 */
#define KCF_VMX (1ULL << 22) /* Intel Virtual Machine Extensions */
#define KCF_SSSE3 (1ULL << 23) /* Supplemental SSE3 Instructions */
#define KCF_SSE41 (1ULL << 24) /* SSE4.1 Instructions */
#define KCF_SSE42 (1ULL << 25) /* SSE4.2 Instructions */
#define KCF_X2APIC (1ULL << 26) /* x2APIC Support */
#define KCF_POPCNT (1ULL << 27) /* POPCNT Instruction */
#define KCF_TSC_DEADLINE (1ULL << 28) /* TSC Deadline Timer */
#define KCF_AES (1ULL << 29) /* AES-NI Instruction Set */
#define KCF_XSAVE (1ULL << 30) /* XSAVE/XRSTOR Instructions */
#define KCF_AVX (1ULL << 31) /* Advanced Vector Extensions */
#define KCF_RDRAND (1ULL << 32) /* RDRAND Instruction */
#define KCF_FSGSBASE (1ULL << 33) /* RDFSBASE/WRFSBASE Instructions */
#define KCF_AVX2 (1ULL << 34) /* AVX2 Instructions */
#define KCF_SMEP (1ULL << 35) /* Supervisor Mode Execution Prevention */
#define KCF_RDSEED (1ULL << 36) /* RDSEED Instruction */
#define KCF_SMAP (1ULL << 37) /* Supervisor Mode Access Prevention */
#define KCF_SHA (1ULL << 38) /* SHA Extensions */
#define KCF_LA57 (1ULL << 39) /* 57-bit Linear Addresses */
#define KCF_ARAT (1ULL << 40) /* Always Running APIC Timer */
/* Kernel CPU Extended Features */
#define KCF_SVM (1ULL << 0) /* AMD Secure Virtual Machine */
#define KCF_SSE4A (1ULL << 1) /* SSE4A Instructions */
#define KCF_FMA4 (1ULL << 2) /* FMA4 Instructions */
#define KCF_TOPOEXT (1ULL << 3) /* AMD Topology Extensions */
#define KCF_SYSCALL (1ULL << 4) /* SYSCALL/SYSRET Instructions */
#define KCF_NX_BIT (1ULL << 5) /* No-Execute Page Protection */
#define KCF_RDTSCP (1ULL << 6) /* RDTSCP Instruction */
#define KCF_64BIT (1ULL << 7) /* Long Mode Support */
#define KCF_3DNOW_EXT (1ULL << 8) /* 3DNow! Extensions */
#define KCF_3DNOW (1ULL << 9) /* 3DNow! Instructions */
#define KCF_INVARIANT_TSC (1ULL << 10) /* Invariant Time Stamp Counter */
#define AMD64_TASK_GATE 0x5
#define AMD64_TSS 0x9
#define AMD64_ACTIVE_TSS 0xB
#define AMD64_CALL_GATE 0xC
#define AMD64_INTERRUPT_GATE 0xE
#define AMD64_TRAP_GATE 0xF
/* Context control flags */
#define CONTEXT_ARCHITECTURE 0x00100000
#define CONTEXT_CONTROL (CONTEXT_ARCHITECTURE | 0x01)
#define CONTEXT_INTEGER (CONTEXT_ARCHITECTURE | 0x02)
#define CONTEXT_SEGMENTS (CONTEXT_ARCHITECTURE | 0x04)
#define CONTEXT_FLOATING_POINT (CONTEXT_ARCHITECTURE | 0x08)
#define CONTEXT_DEBUG_REGISTERS (CONTEXT_ARCHITECTURE | 0x10)
#define CONTEXT_FULL (CONTEXT_CONTROL | CONTEXT_INTEGER | CONTEXT_FLOATING_POINT)
#define CONTEXT_ALL (CONTEXT_CONTROL | CONTEXT_INTEGER | CONTEXT_SEGMENTS | \
CONTEXT_FLOATING_POINT | CONTEXT_DEBUG_REGISTERS)
/* Clock control flags */
#define CLOCK_QUANTUM_DECREMENT 3
/* DPC definitions */
#define DPC_ADJUST_THRESHOLD 20
#define DPC_IDEAL_RATE 20
#define DPC_MAXIMUM_QUEUE_DEPTH 4
#define DPC_MINIMUM_RATE 3
#define CONTEXT_ARCHITECTURE 0x00100000
#define CONTEXT_CONTROL (CONTEXT_ARCHITECTURE | 0x01)
#define CONTEXT_INTEGER (CONTEXT_ARCHITECTURE | 0x02)
#define CONTEXT_SEGMENTS (CONTEXT_ARCHITECTURE | 0x04)
#define CONTEXT_FLOATING_POINT (CONTEXT_ARCHITECTURE | 0x08)
#define CONTEXT_DEBUG_REGISTERS (CONTEXT_ARCHITECTURE | 0x10)
/* Interrupt request levels definitions */
#define PASSIVE_LEVEL 0
#define LOW_LEVEL 0
#define APC_LEVEL 1
#define DISPATCH_LEVEL 2
#define CMC_LEVEL 5
#define DEVICE1_LEVEL 6
#define DEVICE2_LEVEL 7
#define DEVICE3_LEVEL 8
#define DEVICE4_LEVEL 9
#define DEVICE5_LEVEL 10
#define DEVICE6_LEVEL 11
#define DEVICE7_LEVEL 12
#define SYNC_LEVEL 12
#define CLOCK_LEVEL 13
#define IPI_LEVEL 14
#define DRS_LEVEL 14
#define POWER_LEVEL 14
#define PROFILE_LEVEL 15
#define HIGH_LEVEL 15
#define PASSIVE_LEVEL 0
#define LOW_LEVEL 0
#define APC_LEVEL 1
#define DISPATCH_LEVEL 2
#define CMC_LEVEL 5
#define DEVICE1_LEVEL 6
#define DEVICE2_LEVEL 7
#define DEVICE3_LEVEL 8
#define DEVICE4_LEVEL 9
#define DEVICE5_LEVEL 10
#define DEVICE6_LEVEL 11
#define DEVICE7_LEVEL 12
#define SYNC_LEVEL 12
#define CLOCK_LEVEL 13
#define IPI_LEVEL 14
#define DRS_LEVEL 14
#define POWER_LEVEL 14
#define PROFILE_LEVEL 15
#define HIGH_LEVEL 15
/* Size of the exception area */
#define EXCEPTION_AREA_SIZE 64
@@ -179,16 +108,18 @@
/* Static Kernel-Mode address start */
#define KSEG0_BASE 0xFFFFF80000000000
/* XTOS Kernel address base */
#define KSEG0_KERNEL_BASE 0x0000000800000000
/* XTOS Kernel stack size */
#define KERNEL_STACK_SIZE 0x8000
#define KERNEL_STACKS 3
/* XTOS Kernel stack guard pages */
#define KERNEL_STACK_GUARD_PAGES 1
/* Processor structures size */
#define KPROCESSOR_STRUCTURES_SIZE ((KERNEL_STACKS * KERNEL_STACK_SIZE) + (GDT_ENTRIES * sizeof(KGDTENTRY)) + \
sizeof(KTSS) + sizeof(KPROCESSOR_BLOCK) + MM_PAGE_SIZE)
#define KPROCESSOR_STRUCTURES_SIZE ((2 * KERNEL_STACK_SIZE) + (GDT_ENTRIES * sizeof(KGDTENTRY)) + sizeof(KTSS) + \
sizeof(KPROCESSOR_BLOCK) + MM_PAGE_SIZE)
/* Kernel frames */
#define KEXCEPTION_FRAME_SIZE sizeof(KEXCEPTION_FRAME)
@@ -196,9 +127,6 @@
#define KTRAP_FRAME_ALIGN 0x10
#define KTRAP_FRAME_SIZE sizeof(KTRAP_FRAME)
/* Initial stack reservation size */
#define KTHREAD_STACK_OFFSET ((sizeof(KTHREAD_INIT_FRAME) + STACK_ALIGNMENT - 1) & ~(STACK_ALIGNMENT - 1))
/* Return address size pushed by 'call' instruction */
#define KRETURN_ADDRESS_SIZE 0x8
@@ -210,10 +138,6 @@
#define NPX_STATE_SCRUB 0x1
#define NPX_STATE_SWITCH 0x2
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Floating point state storing structure */
typedef struct _FLOATING_SAVE_AREA
{
@@ -245,7 +169,7 @@ typedef struct _CONTEXT
USHORT SegFs;
USHORT SegGs;
USHORT SegSs;
ULONG Flags;
ULONG EFlags;
ULONG64 Dr0;
ULONG64 Dr1;
ULONG64 Dr2;
@@ -311,24 +235,6 @@ typedef struct _KDESCRIPTOR
PVOID Base;
} KDESCRIPTOR, *PKDESCRIPTOR;
/* Device Queue structure definition */
typedef struct _KDEVICE_QUEUE
{
CSHORT Type;
CSHORT Size;
LIST_ENTRY DeviceListHead;
KSPIN_LOCK Lock;
union
{
BOOLEAN Busy;
struct
{
LONGLONG Reserved:8;
LONGLONG Hint:56;
};
};
} KDEVICE_QUEUE, *PKDEVICE_QUEUE;
/* Global Descriptor Table (GDT) entry union definition */
typedef struct _KGDTENTRY
{
@@ -366,18 +272,11 @@ typedef struct _KIDTENTRY
{
USHORT OffsetLow;
USHORT Selector;
union
{
struct
{
USHORT IstIndex:3;
USHORT Reserved0:5;
USHORT Type:5;
USHORT Dpl:2;
USHORT Present:1;
};
USHORT Access;
};
USHORT IstIndex:3;
USHORT Reserved0:5;
USHORT Type:5;
USHORT Dpl:2;
USHORT Present:1;
USHORT OffsetMiddle;
ULONG OffsetHigh;
ULONG Reserved1;
@@ -560,23 +459,11 @@ typedef struct _KSPECIAL_REGISTERS
ULONG64 MsrSyscallMask;
} KSPECIAL_REGISTERS, *PKSPECIAL_REGISTERS;
/* Processor start block structure definition */
typedef struct _PROCESSOR_START_BLOCK
{
ULONG_PTR Cr3;
ULONG_PTR Cr4;
PVOID EntryPoint;
PVOID InitialStack;
PVOID ProcessorStructures;
PVOID Stack;
BOOLEAN Started;
} PROCESSOR_START_BLOCK, *PPROCESSOR_START_BLOCK;
/* Processor state frame structure definition */
typedef struct _KPROCESSOR_STATE
{
CONTEXT ContextFrame;
KSPECIAL_REGISTERS SpecialRegisters;
CONTEXT ContextFrame;
} KPROCESSOR_STATE, *PKPROCESSOR_STATE;
/* Processor Control Block (PRCB) structure definition */
@@ -591,32 +478,14 @@ typedef struct _KPROCESSOR_CONTROL_BLOCK
ULONG_PTR SetMember;
CPU_IDENTIFICATION CpuId;
KPROCESSOR_STATE ProcessorState;
KSPIN_LOCK PrcbLock;
KSPIN_LOCK_QUEUE LockQueue[MaximumLock];
LOOKASIDE_LIST LookasideList[16];
LOOKASIDE_LIST NonPagedLookasideList[POOL_LOOKASIDE_LISTS];
LOOKASIDE_LIST PagedLookasideList[POOL_LOOKASIDE_LISTS];
VOLATILE ULONG IpiFrozen;
VOLATILE LONG_PTR RequestSummary;
KDPC_DATA DpcData[2];
PVOID DpcStack;
LONG MaximumDpcQueueDepth;
ULONG DpcRequestRate;
BOOLEAN DpcInterruptRequested;
VOLATILE BOOLEAN DpcRoutineActive;
ULONG DpcLastCount;
VOLATILE ULONG_PTR TimerHand;
VOLATILE ULONG_PTR TimerRequest;
ULONG_PTR MultiThreadProcessorSet;
SINGLE_LIST_ENTRY DeferredReadyListHead;
ULONG InterruptCount;
ULONG KernelTime;
ULONG UserTime;
ULONG DpcTime;
ULONG InterruptTime;
ULONG AdjustDpcThreshold;
PROCESSOR_POWER_STATE PowerState;
ULONG ProfilingCountdown;
} KPROCESSOR_CONTROL_BLOCK, *PKPROCESSOR_CONTROL_BLOCK;
/* Processor Block structure definition */
@@ -643,9 +512,6 @@ typedef struct _KPROCESSOR_BLOCK
KAFFINITY SetMember;
ULONG StallScaleFactor;
UCHAR CpuNumber;
ULONG HardwareId;
VOLATILE BOOLEAN Started;
PINTERRUPT_HANDLER InterruptDispatchTable[256];
} KPROCESSOR_BLOCK, *PKPROCESSOR_BLOCK;
/* Thread Environment Block (TEB) structure definition */
@@ -654,5 +520,4 @@ typedef struct _THREAD_ENVIRONMENT_BLOCK
THREAD_INFORMATION_BLOCK InformationBlock;
} THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_KETYPES_H */

163
sdk/xtdk/amd64/mmtypes.h
View File

@@ -25,11 +25,11 @@
#define MM_PXE_BASE 0xFFFFF6FB7DBED000ULL
/* Page directory and page base addresses for 5-level paging */
#define MM_PTE_LA57_BASE 0xFFED000000000000ULL
#define MM_PDE_LA57_BASE 0xFFEDF68000000000ULL
#define MM_PPE_LA57_BASE 0xFFEDF6FB40000000ULL
#define MM_PXE_LA57_BASE 0xFFEDF6FB7DA00000ULL
#define MM_P5E_LA57_BASE 0xFFEDF6FB7DBED000ULL
#define MM_PTE_LA57_BASE 0xFFFF000000000000ULL
#define MM_PDE_LA57_BASE 0xFFFF010000000000ULL
#define MM_PPE_LA57_BASE 0xFFFF010800000000ULL
#define MM_PXE_LA57_BASE 0xFFFF010840000000ULL
#define MM_P5E_LA57_BASE 0xFFFF010840200000ULL
/* PTE shift values */
#define MM_PTE_SHIFT 3
@@ -39,56 +39,15 @@
#define MM_PXI_SHIFT 39
#define MM_P5I_SHIFT 48
/* PTE state flags */
#define MM_PTE_VALID 0x0000000000000001ULL
#define MM_PTE_ACCESSED 0x0000000000000020ULL
#define MM_PTE_DIRTY 0x0000000000000040ULL
/* PTE scope flags */
#define MM_PTE_LARGE_PAGE 0x0000000000000080ULL
#define MM_PTE_GLOBAL 0x0000000000000100ULL
/* PTE access flags */
#define MM_PTE_NOACCESS 0x0000000000000000ULL
#define MM_PTE_READONLY 0x0000000000000000ULL
#define MM_PTE_EXECUTE 0x0000000000000000ULL
#define MM_PTE_EXECUTE_READ 0x0000000000000000ULL
#define MM_PTE_READWRITE 0x8000000000000002ULL
#define MM_PTE_WRITECOPY 0x8000000000000200ULL
#define MM_PTE_EXECUTE_READWRITE 0x0000000000000002ULL
#define MM_PTE_EXECUTE_WRITECOPY 0x0000000000000200ULL
/* PTE protection flags */
#define MM_PTE_NOEXECUTE 0x8000000000000000ULL
#define MM_PTE_GUARDED 0x8000000000000018ULL
#define MM_PTE_PROTECT 0x8000000000000612ULL
/* PTE cache flags */
#define MM_PTE_CACHE_ENABLE 0x0000000000000000ULL
#define MM_PTE_CACHE_DISABLE 0x0000000000000010ULL
#define MM_PTE_CACHE_WRITECOMBINED 0x0000000000000010ULL
#define MM_PTE_CACHE_WRITETHROUGH 0x0000000000000008ULL
/* PTE software flags */
#define MM_PTE_COPY_ON_WRITE 0x0000000000000200ULL
#define MM_PTE_PROTOTYPE 0x0000000000000400ULL
#define MM_PTE_TRANSITION 0x0000000000000800ULL
/* PTE frame bits */
#define MM_PTE_FRAME_BITS 57
/* PTE protection bits */
#define MM_PTE_PROTECTION_BITS 5
/* Base address of the system page table */
#define MM_SYSTEM_PTE_BASE KSEG0_BASE
/* Number of PTEs per page */
#define MM_PTE_PER_PAGE 512
#define MM_PDE_PER_PAGE 512
#define MM_PPE_PER_PAGE 512
#define MM_PXE_PER_PAGE 512
/* Minimum number of physical pages needed by the system */
#define MM_MINIMUM_PHYSICAL_PAGES 2048
/* Number of system PTEs */
#define MM_DEFAULT_NUMBER_SYSTEM_PTES 22000
/* Default number of secondary colors */
#define MM_DEFAULT_SECONDARY_COLORS 64
@@ -101,32 +60,12 @@
/* HAL memory pool virtual address start */
#define MM_HARDWARE_VA_START 0xFFFFFFFFFFC00000ULL
/* Kernel shared data address */
#define MM_KERNEL_SHARED_DATA_ADDRESS 0xFFFFFFFFFFDF0000ULL
/* Maximum physical address used by HAL allocations */
#define MM_MAXIMUM_PHYSICAL_ADDRESS 0x00000000FFFFFFFFULL
/* Highest system address */
#define MM_HIGHEST_SYSTEM_ADDRESS 0xFFFFFFFFFFFFFFFFULL
/* User probe address */
#define MM_USER_PROBE_ADDRESS 0x00007FFFFFFF0000ULL
#define MM_USER_PROBE_LA57_ADDRESS 0x00FFFFFFFFFF0000ULL
/* Trampoline code address */
#define MM_TRAMPOLINE_ADDRESS 0x80000
/* Pool block size */
#define MM_POOL_BLOCK_SIZE 16
/* Number of pool lists per page */
#define MM_POOL_LISTS_PER_PAGE (MM_PAGE_SIZE / MM_POOL_BLOCK_SIZE)
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Page size enumeration list */
typedef enum _PAGE_SIZE
{
@@ -313,7 +252,6 @@ typedef struct _MMPFN
USHORT ReferenceCount;
} e2;
} u3;
ULONG UsedPageTableEntries;
union
{
MMPTE OriginalPte;
@@ -324,90 +262,15 @@ typedef struct _MMPFN
ULONG_PTR EntireFrame;
struct
{
ULONG_PTR PteFrame:57;
ULONG_PTR PteFrame:58;
ULONG_PTR InPageError:1;
ULONG_PTR VerifierAllocation:1;
ULONG_PTR AweAllocation:1;
ULONG_PTR Priority:3;
ULONG_PTR LockCharged:1;
ULONG_PTR KernelStack:1;
ULONG_PTR MustBeCached:1;
};
} u4;
} MMPFN, *PMMPFN;
/* Pool descriptor structure definition */
typedef struct _POOL_DESCRIPTOR
{
LIST_ENTRY ListHeads[MM_POOL_LISTS_PER_PAGE];
PVOID LockAddress;
ULONG PoolIndex;
LONG PendingFreeDepth;
PVOID PendingFrees;
MMPOOL_TYPE PoolType;
ULONG RunningFrees;
ULONG RunningAllocations;
ULONG Threshold;
ULONG TotalPages;
ULONG TotalBigAllocations;
SIZE_T TotalBytes;
SIZE_T Reserved;
} POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
/* Working set list entry structure definition */
typedef struct _MMWSLENTRY
{
ULONG_PTR Valid:1;
ULONG_PTR LockedInWs:1;
ULONG_PTR LockedInMemory:1;
ULONG_PTR Protection:5;
ULONG_PTR Hashed:1;
ULONG_PTR Direct:1;
ULONG_PTR Age:2;
ULONG_PTR VirtualPageNumber:52;
} MMWSLENTRY, *PMMWSLENTRY;
/* Working set free entry structure definition */
typedef struct _MMWSLE_FREE_ENTRY
{
ULONG MustBeZero:1;
ULONG PreviousFree:31;
LONG NextFree;
} MMWSLE_FREE_ENTRY, *PMMWSLE_FREE_ENTRY;
/* Working set list entry union definition */
typedef union _MMWSLE
{
PVOID VirtualAddress;
ULONG_PTR Long;
MMWSLENTRY e1;
MMWSLE_FREE_ENTRY Free;
} MMWSLE, *PMMWSLE;
/* Working set list structure definition */
typedef struct _MMWSL
{
ULONG FirstFree;
ULONG FirstDynamic;
ULONG LastEntry;
ULONG NextSlot;
PMMWSLE Wsle;
ULONG LastInitializedWsle;
ULONG NonDirectCount;
PMMWSLE_HASH HashTable;
ULONG HashTableSize;
ULONG NumberOfCommittedPageTables;
PVOID HashTableStart;
PVOID HighestPermittedHashAddress;
ULONG NumberOfImageWaiters;
ULONG VadBitMapHint;
PVOID HighestUserAddress;
ULONG MaximumUserPageTablePages;
ULONG MaximumUserPageDirectoryPages;
PULONG CommittedPageTables;
ULONG NumberOfCommittedPageDirectories;
PULONG CommittedPageDirectories;
ULONG NumberOfCommittedPageDirectoryParents;
ULONGLONG CommittedPageDirectoryParents[1];
} MMWSL, *PMMWSL;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_MMTYPES_H */

57
sdk/xtdk/amd64/rtltypes.h
View File

@@ -1,57 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtdk/amd64/rtltypes.h
* DESCRIPTION: Runtime library structures definitions for AMD64 architecture
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTDK_AMD64_RTLTYPES_H
#define __XTDK_AMD64_RTLTYPES_H
#include <xtbase.h>
#include <rtltypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Header for a sequenced single linked list union definition */
typedef union _SINGLE_LIST_HEADER
{
struct
{
ULONGLONG Alignment;
ULONGLONG Region;
};
struct
{
ULONGLONG Depth:16;
ULONGLONG Sequence:9;
ULONGLONG NextEntry:39;
ULONGLONG HeaderType:1;
ULONGLONG Init:1;
ULONGLONG Reserved:59;
ULONGLONG Region:3;
} Header8;
struct
{
ULONGLONG Depth:16;
ULONGLONG Sequence:48;
ULONGLONG HeaderType:1;
ULONGLONG Init:1;
ULONGLONG Reserved:2;
ULONGLONG NextEntry:60;
} Header16;
struct
{
ULONGLONG Depth:16;
ULONGLONG Sequence:48;
ULONGLONG HeaderType:1;
ULONGLONG Reserved:3;
ULONGLONG NextEntry:60;
} Header64;
} SINGLE_LIST_HEADER, *PSINGLE_LIST_HEADER;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_RTLTYPES_H */

20
sdk/xtdk/amd64/xtstruct.h
View File

@@ -12,20 +12,13 @@
#include <xtdefs.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Architecture-specific enumeration lists forward references */
typedef enum _APIC_DEST_MODE APIC_DEST_MODE, *PAPIC_DEST_MODE;
typedef enum _APIC_DM APIC_DM, *PAPIC_DM;
typedef enum _APIC_DSH APIC_DSH, *PAPIC_DSH;
typedef enum _APIC_MODE APIC_MODE, *PAPIC_MODE;
typedef enum _APIC_REGISTER APIC_REGISTER, *PAPIC_REGISTER;
typedef enum _APIC_TIMER_DIVISOR APIC_TIMER_DIVISOR, *PAPIC_TIMER_DIVISOR;
typedef enum _CPU_VENDOR CPU_VENDOR, *PCPU_VENDOR;
typedef enum _CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT, *PCPUID_FEATURES_ADVANCED_POWER_MANAGEMENT;
typedef enum _CPUID_FEATURES_EXTENDED CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED;
typedef enum _CPUID_FEATURES_POWER_MANAGEMENT CPUID_FEATURES_POWER_MANAGEMENT, *PCPUID_FEATURES_POWER_MANAGEMENT;
typedef enum _CPUID_FEATURES_STANDARD1 CPUID_FEATURES_STANDARD1, *PCPUID_FEATURES_STANDARD1;
typedef enum _CPUID_FEATURES_STANDARD7_LEAF0 CPUID_FEATURES_STANDARD7_LEAF0, *PCPUID_FEATURES_STANDARD7_LEAF0;
typedef enum _CPUID_FEATURES_STANDARD7_LEAF1 CPUID_FEATURES_STANDARD7_LEAF1, *PCPUID_FEATURES_STANDARD7_LEAF1;
@@ -37,7 +30,6 @@ typedef enum _PIC_I8259_ICW1_OPERATING_MODE PIC_I8259_ICW1_OPERATING_MODE, *PPIC
typedef enum _PIC_I8259_ICW4_BUFFERED_MODE PIC_I8259_ICW4_BUFFERED_MODE, *PPIC_I8259_ICW4_BUFFERED_MODE;
typedef enum _PIC_I8259_ICW4_EOI_MODE PIC_I8259_ICW4_EOI_MODE, *PPIC_I8259_ICW4_EOI_MODE;
typedef enum _PIC_I8259_ICW4_SYSTEM_MODE PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
typedef enum _TIMER_TYPE TIMER_TYPE, *PTIMER_TYPE;
typedef enum _TRAMPOLINE_TYPE TRAMPOLINE_TYPE, *PTRAMPOLINE_TYPE;
/* Architecture-specific structures forward references */
@@ -47,10 +39,7 @@ typedef struct _CPUID_REGISTERS CPUID_REGISTERS, *PCPUID_REGISTERS;
typedef struct _CPUID_SIGNATURE CPUID_SIGNATURE, *PCPUID_SIGNATURE;
typedef struct _FLOATING_SAVE_AREA FLOATING_SAVE_AREA, *PFLOATING_SAVE_AREA;
typedef struct _HARDWARE_PTE HARDWARE_PTE, *PHARDWARE_PTE;
typedef struct _HPET_REGISTERS HPET_REGISTERS, *PHPET_REGISTERS;
typedef struct _IOAPIC_DATA IOAPIC_DATA, *PIOAPIC_DATA;
typedef struct _KDESCRIPTOR KDESCRIPTOR, *PKDESCRIPTOR;
typedef struct _KDEVICE_QUEUE KDEVICE_QUEUE, *PKDEVICE_QUEUE;
typedef struct _KEXCEPTION_FRAME KEXCEPTION_FRAME, *PKEXCEPTION_FRAME;
typedef struct _KGDTENTRY KGDTENTRY, *PKGDTENTRY;
typedef struct _KIDTENTRY KIDTENTRY, *PKIDTENTRY;
@@ -72,30 +61,21 @@ typedef struct _MMPTE_PROTOTYPE MMPTE_PROTOTYPE, *PMMPTE_PROTOTYPE;
typedef struct _MMPTE_SOFTWARE MMPTE_SOFTWARE, *PMMPTE_SOFTWARE;
typedef struct _MMPTE_SUBSECTION MMPTE_SUBSECTION, *PMMPTE_SUBSECTION;
typedef struct _MMPTE_TRANSITION MMPTE_TRANSITION, *PMMPTE_TRANSITION;
typedef struct _MMWSL MMWSL, *PMMWSL;
typedef struct _MMWSLE_FREE_ENTRY MMWSLE_FREE_ENTRY, *PMMWSLE_FREE_ENTRY;
typedef struct _MMWSLENTRY MMWSLENTRY, *PMMWSLENTRY;
typedef struct _POOL_DESCRIPTOR POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
typedef struct _THREAD_ENVIRONMENT_BLOCK THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
typedef struct _TIMER_CAPABILITIES TIMER_CAPABILITIES, *PTIMER_CAPABILITIES;
/* Unions forward references */
typedef union _APIC_BASE_REGISTER APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER;
typedef union _APIC_COMMAND_REGISTER APIC_COMMAND_REGISTER, *PAPIC_COMMAND_REGISTER;
typedef union _APIC_LVT_REGISTER APIC_LVT_REGISTER, *PAPIC_LVT_REGISTER;
typedef union _APIC_SPURIOUS_REGISTER APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
typedef union _IOAPIC_REDIRECTION_REGISTER IOAPIC_REDIRECTION_REGISTER, *PIOAPIC_REDIRECTION_REGISTER;
typedef union _MMPTE MMP5E, *PMMP5E;
typedef union _MMPTE MMPDE, *PMMPDE;
typedef union _MMPTE MMPPE, *PMMPPE;
typedef union _MMPTE MMPTE, *PMMPTE;
typedef union _MMPTE MMPXE, *PMMPXE;
typedef union _MMWSLE MMWSLE, *PMMWSLE;
typedef union _PIC_I8259_ICW1 PIC_I8259_ICW1, *PPIC_I8259_ICW1;
typedef union _PIC_I8259_ICW2 PIC_I8259_ICW2, *PPIC_I8259_ICW2;
typedef union _PIC_I8259_ICW3 PIC_I8259_ICW3, *PPIC_I8259_ICW3;
typedef union _PIC_I8259_ICW4 PIC_I8259_ICW4, *PPIC_I8259_ICW4;
typedef union _SINGLE_LIST_HEADER SINGLE_LIST_HEADER, *PSINGLE_LIST_HEADER;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_AMD64_XTSTRUCT_H */

4
sdk/xtdk/blfuncs.h
View File

@@ -13,9 +13,6 @@
#include <xtuefi.h>
/* C/C++ specific code */
#ifndef D__XTOS_ASSEMBLER__
/* XT BootLoader routines forward references */
XTCLINK
XTCDECL
@@ -24,5 +21,4 @@ BlGetXtLdrProtocol(IN PEFI_SYSTEM_TABLE SystemTable,
IN EFI_HANDLE ImageHandle,
OUT PXTBL_LOADER_PROTOCOL *ProtocolHandler);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_BLFUNCS_H */

40
sdk/xtdk/bltypes.h
View File

@@ -29,10 +29,6 @@
#define XTBL_DEBUGPORT_SCREEN 1
#define XTBL_DEBUGPORT_SERIAL 2
/* XTLDR Shell definitions */
#define XTBL_SH_MAX_LINE_LENGTH 256
#define XTBL_SH_HISTORY_ENTRIES 20
/* TUI dialog box attributes */
#define XTBL_TUI_DIALOG_GENERIC_BOX 1
#define XTBL_TUI_DIALOG_ERROR_BOX 2
@@ -45,10 +41,6 @@
/* TUI dialog box maximum width */
#define XTBL_TUI_MAX_DIALOG_WIDTH 100
/* C/C++ specific code */
#ifndef D__XTOS_ASSEMBLER__
/* XTLDR Routine pointers */
typedef LOADER_MEMORY_TYPE (XTCDECL *PBL_GET_MEMTYPE_ROUTINE)(IN EFI_MEMORY_TYPE EfiMemoryType);
@@ -57,9 +49,8 @@ typedef EFI_STATUS (XTCDECL *PBL_ALLOCATE_PAGES)(IN EFI_ALLOCATE_TYPE Allocation
typedef EFI_STATUS (XTCDECL *PBL_ALLOCATE_POOL)(IN UINT_PTR Size, OUT PVOID *Memory);
typedef EFI_STATUS (XTCDECL *PBL_BOOTMENU_INITIALIZE_OS_LIST)(IN ULONG MaxNameLength, OUT PXTBL_BOOTMENU_ITEM *MenuEntries, OUT PULONG EntriesCount, OUT PULONG DefaultId);
typedef BOOLEAN (XTCDECL *PBL_BOOTUTILS_GET_BOOLEAN_PARAMETER)(IN PCWSTR Parameters, IN PCWSTR Needle);
typedef VOID (XTAPI *PBL_BOOTUTILS_GET_TRAMPOLINE_INFORMATION)(IN TRAMPOLINE_TYPE TrampolineType, OUT PVOID *TrampolineCode, OUT PULONG TrampolineSize);
typedef VOID (XTAPI *PBL_BOOTUTILS_GET_TRAMPOLINE_INFORMATION)(IN TRAMPOLINE_TYPE TrampolineType, OUT PVOID *TrampolineCode, OUT PULONG_PTR TrampolineSize);
typedef EFI_STATUS (XTCDECL *PBL_BUILD_PAGE_MAP)(IN PXTBL_PAGE_MAPPING PageMap, IN ULONG_PTR SelfMapAddress);
typedef EFI_STATUS (XTCDECL *PBL_COMMIT_PAGE_MAP)(IN PXTBL_PAGE_MAPPING PageMap);
typedef EFI_STATUS (XTCDECL *PBL_CLOSE_VOLUME)(IN PEFI_HANDLE VolumeHandle);
typedef VOID (XTCDECL *PBL_CLEAR_CONSOLE_LINE)(IN ULONGLONG LineNo);
typedef BOOLEAN (XTCDECL *PBL_CPU_CPUID)(IN OUT PCPUID_REGISTERS Registers);
@@ -77,7 +68,7 @@ typedef VOID (XTCDECL *PBL_CONSOLE_DISABLE_CURSOR)();
typedef VOID (XTCDECL *PBL_CONSOLE_ENABLE_CURSOR)();
typedef VOID (XTCDECL *PBL_CONSOLE_PRINT)(IN PCWSTR Format, IN ...);
typedef VOID (XTCDECL *PBL_CONSOLE_QUERY_MODE)(OUT PUINT_PTR ResX, OUT PUINT_PTR ResY);
typedef EFI_STATUS (XTCDECL *PBL_CONSOLE_READ_KEY_STROKE)(OUT PEFI_INPUT_KEY Key);
typedef VOID (XTCDECL *PBL_CONSOLE_READ_KEY_STROKE)(OUT PEFI_INPUT_KEY Key);
typedef VOID (XTCDECL *PBL_CONSOLE_RESET_INPUT_BUFFER)();
typedef VOID (XTCDECL *PBL_CONSOLE_SET_ATTRIBUTES)(IN ULONGLONG Attributes);
typedef VOID (XTCDECL *PBL_CONSOLE_SET_CURSOR_POSITION)(IN ULONGLONG PosX, IN ULONGLONG PosY);
@@ -109,9 +100,9 @@ typedef VOID (XTCDECL *PBL_LLIST_INITIALIZE_HEAD)(IN PLIST_ENTRY ListHead);
typedef VOID (XTCDECL *PBL_LLIST_INSERT_HEAD)(IN OUT PLIST_ENTRY ListHead, IN PLIST_ENTRY Entry);
typedef VOID (XTCDECL *PBL_LLIST_INSERT_TAIL)(IN OUT PLIST_ENTRY ListHead, IN PLIST_ENTRY Entry);
typedef VOID (XTCDECL *PBL_LLIST_REMOVE_ENTRY)(IN PLIST_ENTRY Entry);
typedef EFI_STATUS (XTCDECL *PBL_MAP_EFI_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN OUT PVOID *BaseAddress, IN BOOLEAN IdentityMapping, IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine);
typedef EFI_STATUS (XTCDECL *PBL_MAP_PAGE)(IN PXTBL_PAGE_MAPPING PageMap, IN ULONGLONG VirtualAddress, IN ULONGLONG PhysicalAddress, IN ULONGLONG NumberOfPages);
typedef EFI_STATUS (XTCDECL *PBL_MAP_VIRTUAL_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN ULONGLONG VirtualAddress, IN ULONGLONG PhysicalAddress, IN ULONGLONG NumberOfPages, IN LOADER_MEMORY_TYPE MemoryType);
typedef EFI_STATUS (XTCDECL *PBL_MAP_EFI_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN OUT PVOID *MemoryMapAddress, IN PBL_GET_MEMTYPE_ROUTINE GetMemoryTypeRoutine);
typedef EFI_STATUS (XTCDECL *PBL_MAP_PAGE)(IN PXTBL_PAGE_MAPPING PageMap, IN ULONG_PTR VirtualAddress, IN ULONG_PTR PhysicalAddress, IN ULONG NumberOfPages);
typedef EFI_STATUS (XTCDECL *PBL_MAP_VIRTUAL_MEMORY)(IN OUT PXTBL_PAGE_MAPPING PageMap, IN PVOID VirtualAddress, IN PVOID PhysicalAddress, IN ULONGLONG NumberOfPages, IN LOADER_MEMORY_TYPE MemoryType);
typedef VOID (XTAPI *PBL_MOVE_MEMORY)(IN OUT PVOID Destination, IN PCVOID Source, IN SIZE_T Length);
typedef EFI_STATUS (XTCDECL *PBL_OPEN_VOLUME)(IN PEFI_DEVICE_PATH_PROTOCOL DevicePath, OUT PEFI_HANDLE DiskHandle, OUT PEFI_FILE_HANDLE *FsHandle);
typedef EFI_STATUS (XTCDECL *PBL_OPEN_PROTOCOL)(OUT PEFI_HANDLE Handle, OUT PVOID *ProtocolHandler, IN PEFI_GUID ProtocolGuid);
@@ -147,8 +138,6 @@ typedef XTSTATUS (XTAPI *PBL_WIDESTRING_FORMAT)(IN PRTL_PRINT_CONTEXT Context, I
typedef SIZE_T (XTAPI *PBL_WIDESTRING_LENGTH)(IN PCWSTR String, IN SIZE_T MaxLength);
typedef PWCHAR (XTAPI *PBL_WIDESTRING_TOKENIZE)(IN PWCHAR String, IN PCWSTR Delimiter, IN OUT PWCHAR *SavePtr);
typedef EFI_STATUS (XTCDECL *PBL_WAIT_FOR_EFI_EVENT)(IN UINT_PTR NumberOfEvents, IN PEFI_EVENT Event, OUT PUINT_PTR Index);
typedef VOID (XTCDECL *PBL_SHELL_COMMAND)(IN ULONG Argc, IN PWCHAR *Argv);
typedef EFI_STATUS (XTCDECL *PBL_REGISTER_SHELL_COMMAND)(IN PCWSTR Command, IN PCWSTR Description, IN PBL_SHELL_COMMAND Handler);
typedef VOID (XTCDECL *PBL_XT_BOOT_MENU)();
typedef VOID (XTAPI *PBL_ZERO_MEMORY)(OUT PVOID Destination, IN SIZE_T Length);
@@ -239,21 +228,12 @@ typedef struct _XTBL_KNOWN_BOOT_PROTOCOL
EFI_GUID Guid;
} XTBL_KNOWN_BOOT_PROTOCOL, *PXTBL_KNOWN_BOOT_PROTOCOL;
/* XTLDR Shell command entry */
typedef struct _XTBL_SHELL_COMMAND
{
LIST_ENTRY Flink;
PWCHAR Command;
PWCHAR Description;
PBL_SHELL_COMMAND Handler;
} XTBL_SHELL_COMMAND, *PXTBL_SHELL_COMMAND;
/* Boot Loader memory mapping information */
typedef struct _XTBL_MEMORY_MAPPING
{
LIST_ENTRY ListEntry;
ULONGLONG VirtualAddress;
ULONGLONG PhysicalAddress;
PVOID VirtualAddress;
PVOID PhysicalAddress;
ULONGLONG NumberOfPages;
LOADER_MEMORY_TYPE MemoryType;
} XTBL_MEMORY_MAPPING, *PXTBL_MEMORY_MAPPING;
@@ -469,7 +449,6 @@ typedef struct _XTBL_LOADER_PROTOCOL
PBL_ALLOCATE_PAGES AllocatePages;
PBL_ALLOCATE_POOL AllocatePool;
PBL_BUILD_PAGE_MAP BuildPageMap;
PBL_COMMIT_PAGE_MAP CommitPageMap;
PBL_COMPARE_MEMORY CompareMemory;
PBL_COPY_MEMORY CopyMemory;
PBL_FREE_PAGES FreePages;
@@ -497,10 +476,6 @@ typedef struct _XTBL_LOADER_PROTOCOL
PBL_OPEN_PROTOCOL_HANDLE OpenHandle;
} Protocol;
struct
{
PBL_REGISTER_SHELL_COMMAND RegisterCommand;
} Shell;
struct
{
PBL_STRING_COMPARE Compare;
PBL_STRING_LENGTH Length;
@@ -543,5 +518,4 @@ typedef struct _XTBL_LOADER_PROTOCOL
} WideString;
} XTBL_LOADER_PROTOCOL, *PXTBL_LOADER_PROTOCOL;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_BLTYPES_H */

135
sdk/xtdk/cmtypes.h
View File

@@ -1,135 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtdk/cmtypes.h
* DESCRIPTION: Configuration Manager structures definitions
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTDK_CMTYPES_H
#define __XTDK_CMTYPES_H
#include <xttypes.h>
#include <xtstruct.h>
#include <mmtypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Partial resource descriptor */
typedef struct _CM_PARTIAL_RESOURCE_DESCRIPTOR
{
UCHAR Type;
UCHAR ShareDisposition;
USHORT Flags;
union
{
struct
{
PHYSICAL_ADDRESS Start;
ULONG Length;
} Generic;
struct
{
PHYSICAL_ADDRESS Start;
ULONG Length;
} Port;
struct
{
USHORT Level;
USHORT Group;
ULONG Vector;
PKAFFINITY_MAP Affinity;
} Interrupt;
struct
{
union
{
struct
{
USHORT Group;
USHORT MessageCount;
ULONG Vector;
PKAFFINITY_MAP Affinity;
} Raw;
struct
{
USHORT Level;
USHORT Group;
ULONG Vector;
PKAFFINITY_MAP Affinity;
} Translated;
};
} MessageInterrupt;
struct
{
PHYSICAL_ADDRESS Start;
ULONG Length;
} Memory;
struct
{
ULONG Channel;
ULONG Port;
ULONG Reserved1;
} Dma;
struct
{
ULONG Data[3];
} DevicePrivate;
struct
{
ULONG Start;
ULONG Length;
ULONG Reserved;
} BusNumber;
struct
{
ULONG DataSize;
ULONG Reserved1;
ULONG Reserved2;
} DeviceSpecificData;
struct
{
PHYSICAL_ADDRESS Start;
ULONG Length40;
} Memory40;
struct
{
PHYSICAL_ADDRESS Start;
ULONG Length48;
} Memory48;
struct
{
PHYSICAL_ADDRESS Start;
ULONG Length64;
} Memory64;
} u;
} CM_PARTIAL_RESOURCE_DESCRIPTOR, *PCM_PARTIAL_RESOURCE_DESCRIPTOR;
/* Partial resource list */
typedef struct _CM_PARTIAL_RESOURCE_LIST
{
USHORT Version;
USHORT Revision;
ULONG Count;
CM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptors[1];
} CM_PARTIAL_RESOURCE_LIST, *PCM_PARTIAL_RESOURCE_LIST;
/* Full resource descriptor */
typedef struct _CM_FULL_RESOURCE_DESCRIPTOR
{
INTERFACE_TYPE InterfaceType;
ULONG BusNumber;
CM_PARTIAL_RESOURCE_LIST PartialResourceList;
} CM_FULL_RESOURCE_DESCRIPTOR, *PCM_FULL_RESOURCE_DESCRIPTOR;
/* Full resource list */
typedef struct _CM_RESOURCE_LIST
{
ULONG Count;
CM_FULL_RESOURCE_DESCRIPTOR List[1];
} CM_RESOURCE_LIST, *PCM_RESOURCE_LIST;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_CMTYPES_H */

4
sdk/xtdk/exfuncs.h
View File

@@ -13,9 +13,6 @@
#include <xttypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel Executive routines forward references */
XTCLINK
XTFASTCALL
@@ -47,5 +44,4 @@ XTFASTCALL
VOID
ExWaitForRundownProtectionRelease(IN PEX_RUNDOWN_REFERENCE Descriptor);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_EXFUNCS_H */

231
sdk/xtdk/extypes.h
View File

@@ -17,105 +17,14 @@
/* Rundown protection flags */
#define EX_RUNDOWN_ACTIVE 0x1
/* Defines maximum number of handles */
#define MAX_HANDLES (1<<24)
/* Handle Table Architecture Dimensions */
#define HANDLE_HILEVEL_COUNT MAX_HANDLES / (LOWLEVEL_COUNT * MIDLEVEL_COUNT)
#define HANDLE_MIDLEVEL_COUNT (MM_PAGE_SIZE / sizeof(PHANDLE_TABLE_ENTRY))
#define HANDLE_LOWLEVEL_COUNT (MM_PAGE_SIZE / sizeof(HANDLE_TABLE_ENTRY))
/* Handle Value and Table Routing Constants */
#define HANDLE_LEVEL_CODE_MASK 3
#define HANDLE_VALUE_INCREMENT 4
/* Handle table entry lock bit */
#define EXHANDLE_TABLE_ENTRY_LOCK_BIT 1
/* Handle additional information signature */
#define HANDLE_ADDITIONAL_INFO_SIGNATURE (-2)
/* Number of lookaside lists */
#define POOL_LOOKASIDE_LISTS 32
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel routine callbacks */
typedef XTSTATUS (XTAPI *PALLOCATE_FUNCTION)(IN MMPOOL_TYPE PoolType, IN SIZE_T Bytes, OUT PVOID *Memory, IN ULONG Tag);
typedef XTSTATUS (XTAPI *PALLOCATE_FUNCTION_EX)(IN MMPOOL_TYPE PoolType, IN SIZE_T Bytes, OUT PVOID *Memory, IN ULONG Tag, IN PLOOKASIDE_LIST_EX Lookaside);
typedef XTSTATUS (XTAPI *PFREE_FUNCTION)(IN PVOID Buffer);
typedef XTSTATUS (XTAPI *PFREE_FUNCTION_EX)(IN PVOID Buffer, IN OUT PLOOKASIDE_LIST_EX Lookaside);
typedef VOID (XTAPI *PWORKER_THREAD_ROUTINE)(IN PVOID Parameter);
/* Work queue types */
typedef enum _WORK_QUEUE_TYPE
{
CriticalWorkQueue,
DelayedWorkQueue,
HyperCriticalWorkQueue,
NormalWorkQueue,
BackgroundWorkQueue,
RealTimeWorkQueue,
SuperCriticalWorkQueue,
MaximumWorkQueue,
} WORK_QUEUE_TYPE, *PWORK_QUEUE_TYPE;
/* Owner entry structure definition */
typedef struct _OWNER_ENTRY
{
ULONG_PTR OwnerThread;
union
{
struct
{
ULONG IoPriorityBoosted:1;
ULONG OwnerReferenced:1;
ULONG OwnerCount:30;
};
ULONG TableSize;
};
} OWNER_ENTRY, *POWNER_ENTRY;
/* Exclusive resource structure definition */
typedef struct _ERESOURCE
{
LIST_ENTRY SystemResourcesList;
POWNER_ENTRY OwnerTable;
SHORT ActiveCount;
USHORT Flag;
VOLATILE PKSEMAPHORE SharedWaiters;
VOLATILE PKEVENT ExclusiveWaiters;
OWNER_ENTRY OwnerEntry;
ULONG ActiveEntries;
ULONG ContentionCount;
ULONG NumberOfSharedWaiters;
ULONG NumberOfExclusiveWaiters;
union
{
PVOID Address;
ULONG_PTR CreatorBackTraceIndex;
};
KSPIN_LOCK SpinLock;
} ERESOURCE, *PERESOURCE;
/* Handle table interface union definition */
typedef union _EXHANDLE
{
struct
{
ULONG TagBits:2;
ULONG Index:30;
};
HANDLE GenericHandleOverlay;
ULONG_PTR Value;
} EXHANDLE, *PEXHANDLE;
/* Executive rundown protection structure definition */
typedef union _EX_RUNDOWN_REFERENCE
typedef struct _EX_RUNDOWN_REFERENCE
{
ULONG_PTR Count;
PVOID Ptr;
union
{
ULONG_PTR Count;
PVOID Ptr;
};
} EX_RUNDOWN_REFERENCE, *PEX_RUNDOWN_REFERENCE;
/* Executive rundown wait block definition */
@@ -125,132 +34,4 @@ typedef struct _EX_RUNDOWN_WAIT_BLOCK
KEVENT WakeEvent;
} EX_RUNDOWN_WAIT_BLOCK, *PEX_RUNDOWN_WAIT_BLOCK;
/* Lookaside list structure definition */
typedef struct _GENERAL_LOOKASIDE
{
union
{
SINGLE_LIST_HEADER ListHead;
SINGLE_LIST_ENTRY SingleListHead;
};
USHORT Depth;
USHORT MaximumDepth;
ULONG TotalAllocates;
union
{
ULONG AllocateMisses;
ULONG AllocateHits;
};
ULONG TotalFrees;
union {
ULONG FreeMisses;
ULONG FreeHits;
};
MMPOOL_TYPE Type;
ULONG Tag;
ULONG Size;
union
{
PALLOCATE_FUNCTION_EX AllocateEx;
PALLOCATE_FUNCTION Allocate;
};
union
{
PFREE_FUNCTION_EX FreeEx;
PFREE_FUNCTION Free;
};
LIST_ENTRY ListEntry;
ULONG LastTotalAllocates;
union
{
ULONG LastAllocateMisses;
ULONG LastAllocateHits;
};
ULONG Future[2];
} GENERAL_LOOKASIDE, *PGENERAL_LOOKASIDE;
/* Handle table entry structure definition */
typedef struct _HANDLE_TABLE_ENTRY
{
union
{
PVOID Object;
ULONG_PTR ObAttributes;
PHANDLE_TABLE_ENTRY_INFO InfoTable;
ULONG_PTR Value;
};
union
{
ULONG GrantedAccess;
struct
{
USHORT GrantedAccessIndex;
USHORT CreatorBackTraceIndex;
};
LONG NextFreeTableEntry;
};
} HANDLE_TABLE_ENTRY, *PHANDLE_TABLE_ENTRY;
/* Handle table entry info structure definition */
typedef struct _HANDLE_TABLE_ENTRY_INFO
{
ULONG AuditMask;
} HANDLE_TABLE_ENTRY_INFO, *PHANDLE_TABLE_ENTRY_INFO;
/* Handle table structure definition */
typedef struct _HANDLE_TABLE
{
ULONG_PTR TableCode;
PEPROCESS QuotaProcess;
PVOID UniqueProcessId;
KPUSH_LOCK HandleTableLock[4];
LIST_ENTRY HandleTableList;
KPUSH_LOCK HandleContentionEvent;
PVOID Reserved;
LONG ExtraInfoPages;
union
{
ULONG Flags;
UCHAR StrictFIFO:1;
};
PHANDLE_TABLE_ENTRY FirstFreeHandle;
PHANDLE_TABLE_ENTRY LastFreeHandle;
LONG HandleCount;
ULONG NextHandleNeedingPool;
} HANDLE_TABLE, *PHANDLE_TABLE;
/* Lookaside list pointers structure definition */
typedef struct _LOOKASIDE_LIST
{
PGENERAL_LOOKASIDE Local;
PGENERAL_LOOKASIDE Global;
} LOOKASIDE_LIST, *PLOOKASIDE_LIST;
/* Lookaside list extended structure definition */
typedef struct _LOOKASIDE_LIST_EX
{
GENERAL_LOOKASIDE Global;
} LOOKASIDE_LIST_EX, *PLOOKASIDE_LIST_EX;
/* Non-paged lookaside list structure definition */
typedef struct _NONPAGED_LOOKASIDE_LIST
{
GENERAL_LOOKASIDE Global;
} NONPAGED_LOOKASIDE_LIST, *PNONPAGED_LOOKASIDE_LIST;
/* Paged lookaside list structure definition */
typedef struct _PAGED_LOOKASIDE_LIST
{
GENERAL_LOOKASIDE Global;
} PAGED_LOOKASIDE_LIST, *PPAGED_LOOKASIDE_LIST;
/* Work queue item structure definition */
typedef struct _WORK_QUEUE_ITEM
{
LIST_ENTRY List;
PWORKER_THREAD_ROUTINE WorkerRoutine;
VOLATILE PVOID Parameter;
} WORK_QUEUE_ITEM, *PWORK_QUEUE_ITEM;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_EXTYPES_H */

14
sdk/xtdk/hlfuncs.h
View File

@@ -14,15 +14,7 @@
#include <xttypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Hardware layer routines forward references */
XTCLINK
XTAPI
LARGE_INTEGER
HlQueryPerformanceCounter(OUT PLARGE_INTEGER PerformanceFrequency);
XTCLINK
XTAPI
UCHAR
@@ -38,11 +30,6 @@ XTAPI
ULONG
HlReadRegister32(IN PVOID Register);
XTCLINK
XTAPI
ULONG
HlSetClockRate(IN ULONG Rate);
XTCLINK
XTAPI
VOID
@@ -61,5 +48,4 @@ VOID
HlWriteRegister32(IN PVOID Register,
IN ULONG Value);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_HLFUNCS_H */

108
sdk/xtdk/hltypes.h
View File

@@ -64,8 +64,8 @@
#define ACPI_FADT_32BIT_TIMER (1<<8)
/* ACPI Timer bit masks */
#define ACPI_FADT_TIMER_32BIT 0xFFFFFFFF
#define ACPI_FADT_TIMER_24BIT 0x00FFFFFF
#define ACPI_FADT_TIMER_32BIT 0x80000000
#define ACPI_FADT_TIMER_24BIT 0x00800000
/* ACPI MADT subtable type definitions */
#define ACPI_MADT_TYPE_LOCAL_APIC 0
@@ -101,15 +101,6 @@
#define ACPI_MADT_PLACE_ENABLED 0 /* Processor Local APIC CPU Enabled */
#define ACPI_MADT_PLAOC_ENABLED 1 /* Processor Local APIC Online Capable */
/* ACPI Timer frequency */
#define ACPI_PM_TIMER_FREQUENCY 3579545
/* ACPI address space definitions */
#define ACPI_ADDRESS_SPACE_MEMORY 0x00
/* Maximum number of cached ACPI tables */
#define ACPI_MAX_CACHED_TABLES 32
/* Default serial port settings */
#define COMPORT_CLOCK_RATE 0x1C200
#define COMPORT_WAIT_TIMEOUT 204800
@@ -188,57 +179,6 @@
#define COMPORT_REG_MSR 0x06 /* Modem Status Register */
#define COMPORT_REG_SR 0x07 /* Scratch Register */
/* Standard system clock rates (in 100-nanosecond units)*/
#define HL_CLOCK_RATE_1000HZ 10000 /* 1 ms (1000 Hz) - Best Performance */
#define HL_CLOCK_RATE_500HZ 20000 /* 2 ms (500 Hz) - High Responsiveness */
#define HL_CLOCK_RATE_300HZ 33333 /* 3.33ms (300 Hz) - Multimedia Sync */
#define HL_CLOCK_RATE_250HZ 40000 /* 4 ms (250 Hz) - Optimal Balance */
#define HL_CLOCK_RATE_100HZ 100000 /* 10 ms (100 Hz) - Power Saving */
#define HL_CLOCK_RATE_50HZ 200000 /* 20 ms (50 Hz) - Deep Power Saving */
/* Minimum and maximum system clock rate definitions */
#define HL_MINIMUM_CLOCK_RATE HL_CLOCK_RATE_1000HZ
#define HL_MAXIMUM_CLOCK_RATE HL_CLOCK_RATE_50HZ
/* Minimum and maximum profile intervals */
#define MIN_PROFILE_INTERVAL 10000
#define MAX_PROFILE_INTERVAL 10000000
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Hardware Layer routine callbacks */
typedef XTSTATUS (XTAPI *PHALP_INITIALIZE_CLOCK)(VOID);
typedef ULONGLONG (XTAPI *PHALP_QUERY_PERF_COUNTER)(VOID);
typedef ULONG (XTAPI *PHALP_QUERY_TIME_DELTA)(VOID);
typedef ULONG (XTAPI *PHALP_SET_CLOCK_RATE)(IN ULONG Increment);
typedef VOID (XTAPI *PHALP_STALL_EXECUTION)(IN ULONG MicroSeconds);
/* Interface types */
typedef enum _INTERFACE_TYPE
{
InterfaceTypeUndefined = -1,
Internal,
Isa,
Eisa,
MicroChannel,
TurboChannel,
PCIBus,
VMEBus,
NuBus,
PCMCIABus,
CBus,
MPIBus,
MPSABus,
ProcessorInternal,
InternalPowerBus,
PNPISABus,
PNPBus,
Vmcs,
MaximumInterfaceType
} INTERFACE_TYPE, *PINTERFACE_TYPE;
/* Generic Address structure */
typedef struct _GENERIC_ADDRESS
{
@@ -274,7 +214,7 @@ typedef struct _ACPI_SUBTABLE_HEADER
typedef struct _ACPI_CACHE_LIST
{
LIST_ENTRY ListEntry;
PACPI_DESCRIPTION_HEADER Table;
ACPI_DESCRIPTION_HEADER Header;
} ACPI_CACHE_LIST, *PACPI_CACHE_LIST;
/* ACPI Root System Description Table Pointer (RSDP) structure */
@@ -365,17 +305,6 @@ typedef struct _ACPI_FADT
GENERIC_ADDRESS SleepStatusReg;
} PACKED ACPI_FADT, *PACPI_FADT;
/* ACPI High Precision Event Timer (HPET) table structure */
typedef struct _ACPI_HPET
{
ACPI_DESCRIPTION_HEADER Header;
ULONG EventTimerBlockId;
GENERIC_ADDRESS BaseAddress;
UCHAR HpetNumber;
USHORT MinimumTick;
UCHAR PageProtectionAndOem;
} PACKED ACPI_HPET, *PACPI_HPET;
/* ACPI Multiple APIC Description Table (MADT) structure */
typedef struct _ACPI_MADT
{
@@ -385,26 +314,6 @@ typedef struct _ACPI_MADT
ULONG ApicTables[];
} PACKED ACPI_MADT, *PACPI_MADT;
/* ACPI Interrupt Override MADT subtable structure */
typedef struct _ACPI_MADT_INTERRUPT_OVERRIDE
{
ACPI_SUBTABLE_HEADER Header;
UCHAR Bus;
UCHAR SourceIrq;
ULONG GlobalSystemInterrupt;
USHORT Flags;
} PACKED ACPI_MADT_INTERRUPT_OVERRIDE, *PACPI_MADT_INTERRUPT_OVERRIDE;
/* ACPI IO APIC MADT subtable structure */
typedef struct _ACPI_MADT_IOAPIC
{
ACPI_SUBTABLE_HEADER Header;
UCHAR IoApicId;
UCHAR Reserved;
ULONG IoApicAddress;
ULONG GlobalIrqBase;
} PACKED ACPI_MADT_IOAPIC, *PACPI_MADT_IOAPIC;
/* ACPI Local APIC MADT subtable structure */
typedef struct _ACPI_MADT_LOCAL_APIC
{
@@ -541,15 +450,4 @@ typedef struct _SMBIOS3_TABLE_HEADER
ULONGLONG TableAddress;
} SMBIOS3_TABLE_HEADER, *PSMBIOS3_TABLE_HEADER;
/* Timer dispatch table */
typedef struct _TIMER_ROUTINES
{
PHALP_INITIALIZE_CLOCK InitializeClock;
PHALP_QUERY_PERF_COUNTER QueryPerformanceCounter;
PHALP_QUERY_TIME_DELTA QueryTimeDelta;
PHALP_SET_CLOCK_RATE SetClockRate;
PHALP_STALL_EXECUTION StallExecution;
} TIMER_ROUTINES, *PTIMER_ROUTINES;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_HLTYPES_H */

62
sdk/xtdk/i686/artypes.h
View File

@@ -12,7 +12,6 @@
#include <xtdefs.h>
#include <xtstruct.h>
#include <xttypes.h>
#include ARCH_HEADER(xtstruct.h)
/* Control Register 0 constants */
@@ -93,10 +92,6 @@
#define X86_EFLAGS_VIP_MASK 0x00100000 /* Virtual Interrupt Pending */
#define X86_EFLAGS_ID_MASK 0x00200000 /* Identification */
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* CPU vendor enumeration list */
typedef enum _CPU_VENDOR
{
@@ -105,18 +100,6 @@ typedef enum _CPU_VENDOR
CPU_VENDOR_UNKNOWN = 0xFFFFFFFF
} CPU_VENDOR, *PCPU_VENDOR;
/* CPUID advanced power management features (0x80000007) enumeration list */
typedef enum _CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT
{
CPUID_FEATURES_EDX_TS = 1 << 0, /* Temperature Sensor */
CPUID_FEATURES_EDX_FIS = 1 << 1, /* Frequency ID Selection */
CPUID_FEATURES_EDX_VIS = 1 << 2, /* Voltage ID Selection */
CPUID_FEATURES_EDX_TTS = 1 << 3, /* ThermaTrip Support */
CPUID_FEATURES_EDX_HTC = 1 << 4, /* Hardware Thermal Throttling */
CPUID_FEATURES_EDX_STC = 1 << 5, /* Software Thermal Throttling */
CPUID_FEATURES_EDX_TSCI = 1 << 8 /* TSC Invariant */
} CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT, *PCPUID_FEATURES_ADVANCED_POWER_MANAGEMENT;
/* CPUID extended features (0x80000001) enumeration list */
typedef enum _CPUID_FEATURES_EXTENDED
{
@@ -158,23 +141,6 @@ typedef enum _CPUID_FEATURES_EXTENDED
CPUID_FEATURES_EDX_3DNOW = 1 << 31
} CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED;
/* CPUID Thermal and Power Management features (0x00000006) enumeration list */
typedef enum _CPUID_FEATURES_POWER_MANAGEMENT
{
CPUID_FEATURES_EAX_DTHERM = 1 << 0,
CPUID_FEATURES_EAX_IDA = 1 << 1,
CPUID_FEATURES_EAX_ARAT = 1 << 2,
CPUID_FEATURES_EAX_PLN = 1 << 4,
CPUID_FEATURES_EAX_PTS = 1 << 6,
CPUID_FEATURES_EAX_HWP = 1 << 7,
CPUID_FEATURES_EAX_HWP_NOTIFY = 1 << 8,
CPUID_FEATURES_EAX_HWP_ACT_WINDOW = 1 << 9,
CPUID_FEATURES_EAX_HWP_EPP = 1 << 10,
CPUID_FEATURES_EAX_HWP_PKG_REQ = 1 << 11,
CPUID_FEATURES_EAX_HWP_HIGHEST_PERF_CHANGE = 1 << 15,
CPUID_FEATURES_EAX_HFI = 1 << 19
} CPUID_FEATURES_LEAF6, *PCPUID_FEATURES_LEAF6;
/* CPUID STD1 features (0x00000001) enumeration list */
typedef enum _CPUID_FEATURES_STANDARD1
{
@@ -201,7 +167,7 @@ typedef enum _CPUID_FEATURES_STANDARD1
CPUID_FEATURES_ECX_X2APIC = 1 << 21,
CPUID_FEATURES_ECX_MOVBE = 1 << 22,
CPUID_FEATURES_ECX_POPCNT = 1 << 23,
CPUID_FEATURES_ECX_TSC_DEADLINE = 1 << 24,
CPUID_FEATURES_ECX_TSC = 1 << 24,
CPUID_FEATURES_ECX_AES = 1 << 25,
CPUID_FEATURES_ECX_XSAVE = 1 << 26,
CPUID_FEATURES_ECX_OSXSAVE = 1 << 27,
@@ -375,29 +341,20 @@ typedef enum _CPUID_FEATURES_STANDARD7_LEAF1
/* CPUID requests */
typedef enum _CPUID_REQUESTS
{
CPUID_GET_VENDOR_STRING = 0x00000000,
CPUID_GET_STANDARD1_FEATURES = 0x00000001,
CPUID_GET_TLB_CACHE = 0x00000002,
CPUID_GET_SERIAL = 0x00000003,
CPUID_GET_CACHE_TOPOLOGY = 0x00000004,
CPUID_GET_MONITOR_MWAIT = 0x00000005,
CPUID_GET_POWER_MANAGEMENT = 0x00000006,
CPUID_GET_STANDARD7_FEATURES = 0x00000007,
CPUID_GET_TSC_CRYSTAL_CLOCK = 0x00000015,
CPUID_GET_EXTENDED_MAX = 0x80000000,
CPUID_GET_EXTENDED_FEATURES = 0x80000001,
CPUID_GET_ADVANCED_POWER_MANAGEMENT = 0x80000007
CPUID_GET_VENDOR_STRING,
CPUID_GET_STANDARD1_FEATURES,
CPUID_GET_TLB_CACHE,
CPUID_GET_SERIAL,
CPUID_GET_CACHE_TOPOLOGY,
CPUID_GET_MONITOR_MWAIT,
CPUID_GET_POWER_MANAGEMENT,
CPUID_GET_STANDARD7_FEATURES
} CPUID_REQUESTS, *PCPUID_REQUESTS;
/* Interrupt handler */
typedef VOID (*PINTERRUPT_HANDLER)(PKTRAP_FRAME TrapFrame);
/* Processor identification information */
typedef struct _CPU_IDENTIFICATION
{
ULONGLONG ExtendedFeatureBits;
USHORT Family;
ULONGLONG FeatureBits;
USHORT Model;
USHORT Stepping;
CPU_VENDOR Vendor;
@@ -433,5 +390,4 @@ typedef enum _TRAMPOLINE_TYPE
TrampolineApStartup
} TRAMPOLINE_TYPE, *PTRAMPOLINE_TYPE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_ARTYPES_H */

4
sdk/xtdk/i686/hlfuncs.h
View File

@@ -15,9 +15,6 @@
#include <i686/xtstruct.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Hardware layer routines forward references */
XTCLINK
XTCDECL
@@ -52,5 +49,4 @@ VOID
HlWritePort32(IN USHORT Port,
IN ULONG Value);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_HLFUNCS_H */

212
sdk/xtdk/i686/hltypes.h
View File

@@ -9,7 +9,6 @@
#ifndef __XTDK_I686_HLTYPES_H
#define __XTDK_I686_HLTYPES_H
#include <xtbase.h>
#include <xtdefs.h>
#include <xtstruct.h>
#include <xttypes.h>
@@ -37,7 +36,6 @@
#define APIC_VECTOR_GENERIC 0xC1
#define APIC_VECTOR_SYNC 0xC1
#define APIC_VECTOR_CLOCK 0xD1
#define APIC_VECTOR_CLOCK_IPI 0xD2
#define APIC_VECTOR_IPI 0xE1
#define APIC_VECTOR_ERROR 0xE3
#define APIC_VECTOR_POWERFAIL 0xEF
@@ -45,9 +43,6 @@
#define APIC_VECTOR_PERF 0xFE
#define APIC_VECTOR_NMI 0xFF
/* APIC SIPI vector shift */
#define APIC_VECTOR_SIPI_SHIFT 12
/* APIC destination formats */
#define APIC_DF_FLAT 0xFFFFFFFF
#define APIC_DF_CLUSTER 0x0FFFFFFF
@@ -63,27 +58,6 @@
/* Maximum number of I/O APICs */
#define APIC_MAX_IOAPICS 64
/* I/O APIC base address */
#define IOAPIC_DEFAULT_BASE 0xFEC00000
/* I/O APIC definitions */
#define IOAPIC_MAX_CONTROLLERS 64
#define IOAPIC_MAX_OVERRIDES 16
#define IOAPIC_RTE_MASKED 0x100FF
#define IOAPIC_RTE_SIZE 2
#define IOAPIC_VECTOR_FREE 0xFF
#define IOAPIC_VECTOR_RESERVED 0xFE
/* IOAPIC offsets */
#define IOAPIC_IOREGSEL 0x00
#define IOAPIC_IOWIN 0x10
/* IOAPIC registers */
#define IOAPIC_ID 0x00
#define IOAPIC_VER 0x01
#define IOAPIC_ARB 0x02
#define IOAPIC_REDTBL 0x10
/* 8259/ISP PIC ports definitions */
#define PIC1_CONTROL_PORT 0x20
#define PIC1_DATA_PORT 0x21
@@ -95,87 +69,6 @@
/* PIC vector definitions */
#define PIC1_VECTOR_SPURIOUS 0x37
/* HPET General Capabilities definitions */
#define HPET_CAPABILITY_64BIT 0x2000ULL
#define HPET_CAPABILITY_LEGACY_REPLACEMENT 0x8000ULL
/* HPET General Configuration definitions */
#define HPET_CONFIG_ENABLE 0x0001ULL
#define HPET_CONFIG_LEGACY_REPLACEMENT 0x0002ULL
/* HPET Timer Configuration definitions */
#define HPET_TIMER_CONFIG_LEVEL_TRIGGERED 0x0002ULL
#define HPET_TIMER_CONFIG_ENABLED 0x0004ULL
#define HPET_TIMER_CONFIG_PERIODIC 0x0008ULL
#define HPET_TIMER_CONFIG_SUPPORTS_PERIODIC 0x0010ULL
#define HPET_TIMER_CONFIG_SUPPORTS_64BIT 0x0020ULL
#define HPET_TIMER_CONFIG_VALUE_ACCUMULATOR 0x0040ULL
#define HPET_TIMER_CONFIG_FORCE_32BIT 0x0100ULL
#define HPET_TIMER_CONFIG_FSB_ENABLED 0x4000ULL
#define HPET_TIMER_CONFIG_SUPPORTS_FSB 0x8000ULL
/* PIT ports definitions */
#define PIT_COMMAND_PORT 0x43
#define PIT_DATA_PORT0 0x40
#define PIT_DATA_PORT1 0x41
#define PIT_DATA_PORT2 0x42
/* PIT related definitions */
#define PIT_BASE_FREQUENCY 1193182
/* PIT Access Mode: Defines how the CPU reads or writes the counter value */
#define PIT_CMD_ACCESS_LATCH 0x00
#define PIT_CMD_ACCESS_LOWBYTE_ONLY 0x10
#define PIT_CMD_ACCESS_HIGHBYTE_ONLY 0x20
#define PIT_CMD_ACCESS_LOWBYTE_HIGHBYTE 0x30
/* PIT Channel Selection: Specifies the physical timer channel to configure */
#define PIT_CMD_CHANNEL0 0x00
#define PIT_CMD_CHANNEL1 0x40
#define PIT_CMD_CHANNEL2 0x80
/* PIT Operating Mode: Defines the hardware behavior and the generated waveform */
#define PIT_MODE0_INT_ON_TERMINAL_COUNT 0x00
#define PIT_MODE1_ONESHOT 0x02
#define PIT_MODE2_RATE_GENERATOR 0x04
#define PIT_MODE3_SQUARE_WAVE_GEN 0x06
#define PIT_MODE4_SOFTWARE_STROBE 0x08
#define PIT_MODE5_HARDWARE_STROBE 0x0A
/* CMOS controller access ports */
#define CMOS_SELECT_PORT 0x70
#define CMOS_DATA_PORT 0x71
/* CMOD Select port definitions */
#define CMOS_NMI_SELECT 0x80
#define CMOS_REGISTER_SECOND 0x00
#define CMOS_REGISTER_MINUTE 0x02
#define CMOS_REGISTER_HOUR 0x04
#define CMOS_REGISTER_WEEKDAY 0x06
#define CMOS_REGISTER_DAY 0x07
#define CMOS_REGISTER_MONTH 0x08
#define CMOS_REGISTER_YEAR 0x09
#define CMOS_REGISTER_A 0x0A
#define CMOS_REGISTER_B 0x0B
#define CMOS_REGISTER_C 0x0C
/* CMOS Register A definitions */
#define CMOS_REGISTER_A_RATE_MASK 0x0F
#define CMOS_REGISTER_A_UPDATE_IN_PROGRESS 0x80
/* CMOS Register B definitions */
#define CMOS_REGISTER_B_24_HOUR 0x02
#define CMOS_REGISTER_B_BINARY 0x04
#define CMOS_REGISTER_B_PERIODIC 0x40
#define CMOS_REGISTER_B_SET_CLOCK 0x80
/* CMOS Register C definitions */
#define CMOS_REGISTER_C_PERIODIC 0x40
#define CMOS_REGISTER_C_INTERRUPT 0x80
/* CMOS RTC 24-hour mode */
#define CMOS_RTC_POST_MERIDIEM 0x80
/* Serial ports information */
#define COMPORT_ADDRESS {0x3F8, 0x2F8, 0x3E8, 0x2E8, 0x5F8, 0x4F8, 0x5E8, 0x4E8}
#define COMPORT_COUNT 8
@@ -183,17 +76,6 @@
/* Initial stall factor */
#define INITIAL_STALL_FACTOR 100
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* APIC destination mode enumeration list */
typedef enum _APIC_DEST_MODE
{
APIC_DM_Physical,
APIC_DM_Logical
} APIC_DEST_MODE, *PAPIC_DEST_MODE;
/* APIC delivery mode enumeration list */
typedef enum _APIC_DM
{
@@ -251,7 +133,6 @@ typedef enum _APIC_REGISTER
APIC_TICR = 0x38, /* Initial Count Register for Timer */
APIC_TCCR = 0x39, /* Current Count Register for Timer */
APIC_TDCR = 0x3E, /* Timer Divide Configuration Register */
APIC_SIPI = 0x3F, /* Self-IPI Register */
APIC_EAFR = 0x40, /* extended APIC Feature register */
APIC_EACR = 0x41, /* Extended APIC Control Register */
APIC_SEOI = 0x42, /* Specific End Of Interrupt Register */
@@ -261,19 +142,6 @@ typedef enum _APIC_REGISTER
APIC_EXT3LVTR = 0x53 /* Extended Interrupt 3 Local Vector Table */
} APIC_REGISTER, *PAPIC_REGISTER;
/* APIC Timer Divide enumeration list */
typedef enum _APIC_TIMER_DIVISOR
{
TIMER_DivideBy2 = 0,
TIMER_DivideBy4 = 1,
TIMER_DivideBy8 = 2,
TIMER_DivideBy16 = 3,
TIMER_DivideBy32 = 8,
TIMER_DivideBy64 = 9,
TIMER_DivideBy128 = 10,
TIMER_DivideBy1 = 11,
} APIC_TIMER_DIVISOR, *PAPIC_TIMER_DIVISOR;
/* I8259 PIC interrupt mode enumeration list */
typedef enum _PIC_I8259_ICW1_INTERRUPT_MODE
{
@@ -318,17 +186,6 @@ typedef enum _PIC_I8259_ICW4_SYSTEM_MODE
New8086Mode
} PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
/* Supported hardware timer backends */
typedef enum _TIMER_TYPE
{
TimerNone,
TimerAcpiPm,
TimerHpet,
TimerLapic,
TimerPit,
TimerTsc
} TIMER_TYPE, *PTIMER_TYPE;
/* APIC Base Register */
typedef union _APIC_BASE_REGISTER
{
@@ -402,40 +259,6 @@ typedef union _APIC_SPURIOUS_REGISTER
};
} APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
/* I/O APIC Controller information */
typedef struct _IOAPIC_DATA
{
ULONG GsiBase;
ULONG Identifier;
ULONG LineCount;
PHYSICAL_ADDRESS PhysicalAddress;
ULONG_PTR VirtualAddress;
} IOAPIC_DATA, *PIOAPIC_DATA;
/* I/O APIC Redirection Register */
typedef union _IOAPIC_REDIRECTION_REGISTER
{
ULONGLONG LongLong;
struct
{
UINT Base;
UINT Extended;
};
struct
{
ULONGLONG Vector:8;
ULONGLONG DeliveryMode:3;
ULONGLONG DestinationMode:1;
ULONGLONG DeliveryStatus:1;
ULONGLONG PinPolarity:1;
ULONGLONG RemoteIRR:1;
ULONGLONG TriggerMode:1;
ULONGLONG Mask:1;
ULONGLONG Reserved:39;
ULONGLONG Destination:8;
};
} IOAPIC_REDIRECTION_REGISTER, *PIOAPIC_REDIRECTION_REGISTER;
/* I8259 PIC register structure */
typedef union _PIC_I8259_ICW1
{
@@ -501,39 +324,4 @@ typedef union _PIC_I8259_ICW4
UCHAR Bits;
} PIC_I8259_ICW4, *PPIC_I8259_ICW4;
/* HPET Registers structure definition */
typedef struct _HPET_REGISTERS
{
VOLATILE ULONGLONG GeneralCapabilities;
VOLATILE ULONGLONG Reserved0;
VOLATILE ULONGLONG GeneralConfiguration;
VOLATILE ULONGLONG Reserved1;
VOLATILE ULONGLONG GeneralInterruptStatus;
VOLATILE ULONGLONG Reserved2;
VOLATILE ULONGLONG Reserved3[2][12];
VOLATILE ULONGLONG MainCounterValue;
VOLATILE ULONGLONG Reserved4;
struct
{
VOLATILE ULONGLONG Configuration;
VOLATILE ULONGLONG Comparator;
VOLATILE ULONGLONG FsbInterruptRoute;
VOLATILE ULONGLONG Reserved;
} Timers[];
} HPET_REGISTERS, *PHPET_REGISTERS;
/* Hardware timer capabilities and CPU clock features */
typedef struct _TIMER_CAPABILITIES
{
BOOLEAN Arat;
BOOLEAN Art;
BOOLEAN InvariantTsc;
BOOLEAN RDTSCP;
ULONG TimerFrequency;
BOOLEAN TscDeadline;
ULONG TscDenominator;
ULONG TscNumerator;
} TIMER_CAPABILITIES, *PTIMER_CAPABILITIES;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_HLTYPES_H */

172
sdk/xtdk/i686/ketypes.h
View File

@@ -12,7 +12,6 @@
#include <xtbase.h>
#include <xtstruct.h>
#include <xttypes.h>
#include <extypes.h>
#include <potypes.h>
#include ARCH_HEADER(xtstruct.h)
#include ARCH_HEADER(artypes.h)
@@ -51,7 +50,7 @@
#define KGDT_DESCRIPTOR_CODE 0x08
/* GDT descriptor type codes */
#define KGDT_TYPE_NONE 0x00
#define KGDT_TYPE_NONE 0x0
#define KGDT_TYPE_CODE (0x10 | KGDT_DESCRIPTOR_CODE | KGDT_DESCRIPTOR_EXECUTE_READ)
#define KGDT_TYPE_DATA (0x10 | KGDT_DESCRIPTOR_READ_WRITE)
@@ -59,6 +58,12 @@
#define KIDT_ACCESS_RING0 0x00
#define KIDT_ACCESS_RING3 0x60
/* IDT gate types */
#define KIDT_TASK 0x05
#define KIDT_CALL 0x0C
#define KIDT_INTERRUPT 0x0E
#define KIDT_TRAP 0x0F
/* TSS Offsets */
#define KTSS_ESP0 0x04
#define KTSS_CR3 0x1C
@@ -83,7 +88,6 @@
#define KTSS_IO_MAPS 0x68
/* I686 Segment Types */
#define I686_LDT 0x2
#define I686_TASK_GATE 0x5
#define I686_TSS 0x9
#define I686_ACTIVE_TSS 0xB
@@ -91,62 +95,6 @@
#define I686_INTERRUPT_GATE 0xE
#define I686_TRAP_GATE 0xF
/* Kernel CPU Standard Features */
#define KCF_VME (1ULL << 0) /* Virtual 8086 Mode Enhancements */
#define KCF_LARGE_PAGE (1ULL << 1) /* Page Size Extensions */
#define KCF_RDTSC (1ULL << 2) /* Time Stamp Counter */
#define KCF_PAE (1ULL << 3) /* Physical Address Extension */
#define KCF_MCE (1ULL << 4) /* Machine Check Exception */
#define KCF_CMPXCHG8B (1ULL << 5) /* CMPXCHG8B Instruction */
#define KCF_APIC (1ULL << 6) /* APIC On-Chip */
#define KCF_FAST_SYSCALL (1ULL << 7) /* SYSENTER/SYSEXIT Instructions */
#define KCF_MTRR (1ULL << 8) /* Memory Type Range Registers */
#define KCF_GLOBAL_PAGE (1ULL << 9) /* Page Global Enable */
#define KCF_MCA (1ULL << 10) /* Machine Check Architecture */
#define KCF_CMOV (1ULL << 11) /* Conditional Move Instructions */
#define KCF_PAT (1ULL << 12) /* Page Attribute Table */
#define KCF_PSE36 (1ULL << 13) /* 36-bit Page Size Extension */
#define KCF_CLFLUSH (1ULL << 14) /* CLFLUSH Instruction */
#define KCF_FXSR (1ULL << 15) /* FXSAVE/FXRSTOR Instructions */
#define KCF_ACPI (1ULL << 16) /* Thermal Monitor and Software Controlled Clock */
#define KCF_MMX (1ULL << 17) /* MMX Technology */
#define KCF_SSE (1ULL << 18) /* Streaming SIMD Extensions */
#define KCF_SSE2 (1ULL << 19) /* Streaming SIMD Extensions 2 */
#define KCF_SMT (1ULL << 20) /* Hyper-Threading Technology */
#define KCF_SSE3 (1ULL << 21) /* Streaming SIMD Extensions 3 */
#define KCF_VMX (1ULL << 22) /* Intel Virtual Machine Extensions */
#define KCF_SSSE3 (1ULL << 23) /* Supplemental SSE3 Instructions */
#define KCF_SSE41 (1ULL << 24) /* SSE4.1 Instructions */
#define KCF_SSE42 (1ULL << 25) /* SSE4.2 Instructions */
#define KCF_X2APIC (1ULL << 26) /* x2APIC Support */
#define KCF_POPCNT (1ULL << 27) /* POPCNT Instruction */
#define KCF_TSC_DEADLINE (1ULL << 28) /* TSC Deadline Timer */
#define KCF_AES (1ULL << 29) /* AES-NI Instruction Set */
#define KCF_XSAVE (1ULL << 30) /* XSAVE/XRSTOR Instructions */
#define KCF_AVX (1ULL << 31) /* Advanced Vector Extensions */
#define KCF_RDRAND (1ULL << 32) /* RDRAND Instruction */
#define KCF_FSGSBASE (1ULL << 33) /* RDFSBASE/WRFSBASE Instructions */
#define KCF_AVX2 (1ULL << 34) /* AVX2 Instructions */
#define KCF_SMEP (1ULL << 35) /* Supervisor Mode Execution Prevention */
#define KCF_RDSEED (1ULL << 36) /* RDSEED Instruction */
#define KCF_SMAP (1ULL << 37) /* Supervisor Mode Access Prevention */
#define KCF_SHA (1ULL << 38) /* SHA Extensions */
#define KCF_LA57 (1ULL << 39) /* 57-bit Linear Addresses */
#define KCF_ARAT (1ULL << 40) /* Always Running APIC Timer */
/* Kernel CPU Extended Features */
#define KCF_SVM (1ULL << 0) /* AMD Secure Virtual Machine */
#define KCF_SSE4A (1ULL << 1) /* SSE4A Instructions */
#define KCF_FMA4 (1ULL << 2) /* FMA4 Instructions */
#define KCF_TOPOEXT (1ULL << 3) /* AMD Topology Extensions */
#define KCF_SYSCALL (1ULL << 4) /* SYSCALL/SYSRET Instructions */
#define KCF_NX_BIT (1ULL << 5) /* No-Execute Page Protection */
#define KCF_RDTSCP (1ULL << 6) /* RDTSCP Instruction */
#define KCF_64BIT (1ULL << 7) /* Long Mode Support */
#define KCF_3DNOW_EXT (1ULL << 8) /* 3DNow! Extensions */
#define KCF_3DNOW (1ULL << 9) /* 3DNow! Instructions */
#define KCF_INVARIANT_TSC (1ULL << 10) /* Invariant Time Stamp Counter */
/* Context control flags */
#define CONTEXT_ARCHITECTURE 0x00010000
#define CONTEXT_CONTROL (CONTEXT_ARCHITECTURE | 0x01)
@@ -155,19 +103,6 @@
#define CONTEXT_FLOATING_POINT (CONTEXT_ARCHITECTURE | 0x08)
#define CONTEXT_DEBUG_REGISTERS (CONTEXT_ARCHITECTURE | 0x10)
#define CONTEXT_EXTENDED_REGISTERS (CONTEXT_ARCHITECTURE | 0x20)
#define CONTEXT_FULL (CONTEXT_CONTROL | CONTEXT_INTEGER | CONTEXT_SEGMENTS)
#define CONTEXT_ALL (CONTEXT_CONTROL | CONTEXT_INTEGER | CONTEXT_SEGMENTS | \
CONTEXT_FLOATING_POINT | CONTEXT_DEBUG_REGISTERS | \
CONTEXT_EXTENDED_REGISTERS)
/* Clock control flags */
#define CLOCK_QUANTUM_DECREMENT 3
/* DPC definitions */
#define DPC_ADJUST_THRESHOLD 20
#define DPC_IDEAL_RATE 20
#define DPC_MAXIMUM_QUEUE_DEPTH 4
#define DPC_MINIMUM_RATE 3
/* Interrupt request levels definitions */
#define PASSIVE_LEVEL 0
@@ -199,25 +134,24 @@
/* Static Kernel-Mode address start */
#define KSEG0_BASE 0x80000000
/* XTOS Kernel address base */
#define KSEG0_KERNEL_BASE 0x01800000
/* XTOS Kernel stack size */
#define KERNEL_STACK_SIZE 0x4000
#define KERNEL_STACKS 3
/* XTOS Kernel stack guard pages */
#define KERNEL_STACK_GUARD_PAGES 1
/* Processor structures size */
#define KPROCESSOR_STRUCTURES_SIZE ((KERNEL_STACKS * KERNEL_STACK_SIZE) + (GDT_ENTRIES * sizeof(KGDTENTRY)) + \
sizeof(KTSS) + sizeof(KPROCESSOR_BLOCK) + MM_PAGE_SIZE)
#define KPROCESSOR_STRUCTURES_SIZE ((2 * KERNEL_STACK_SIZE) + (GDT_ENTRIES * sizeof(KGDTENTRY)) + sizeof(KTSS) + \
sizeof(KPROCESSOR_BLOCK) + MM_PAGE_SIZE)
/* Kernel frames */
#define KTRAP_FRAME_ALIGN 0x08
#define KTRAP_FRAME_SIZE sizeof(KTRAP_FRAME)
#define NPX_FRAME_SIZE 0x210
/* Initial stack reservation size */
#define KTHREAD_STACK_OFFSET ((sizeof(KTHREAD_INIT_FRAME) + STACK_ALIGNMENT - 1) & ~(STACK_ALIGNMENT - 1))
/* Number of supported extensions */
#define MAXIMUM_SUPPORTED_EXTENSION 512
@@ -232,10 +166,6 @@
#define NPX_STATE_LOADED 0x0
#define NPX_STATE_UNLOADED 0xA
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Floating point state storing structure */
typedef struct _FN_SAVE_FORMAT
{
@@ -305,7 +235,7 @@ typedef struct _CONTEXT
ULONG Ebp;
ULONG Eip;
ULONG SegCs;
ULONG Flags;
ULONG EFlags;
ULONG Esp;
ULONG SegSs;
UCHAR ExtendedRegisters[MAXIMUM_SUPPORTED_EXTENSION];
@@ -319,16 +249,6 @@ typedef struct _KDESCRIPTOR
PVOID Base;
} KDESCRIPTOR, *PKDESCRIPTOR;
/* Device Queue structure definition */
typedef struct _KDEVICE_QUEUE
{
CSHORT Type;
CSHORT Size;
LIST_ENTRY DeviceListHead;
KSPIN_LOCK Lock;
BOOLEAN Busy;
} KDEVICE_QUEUE, *PKDEVICE_QUEUE;
/* Global Descriptor Table (GDT) entry structure definition */
typedef struct _KGDTENTRY
{
@@ -364,18 +284,7 @@ typedef struct _KIDTENTRY
{
USHORT Offset;
USHORT Selector;
union
{
struct
{
UCHAR Reserved;
UCHAR Type:4;
UCHAR Flag:1;
UCHAR Dpl:2;
UCHAR Present:1;
};
USHORT Access;
};
USHORT Access;
USHORT ExtendedOffset;
} KIDTENTRY, *PKIDTENTRY;
@@ -426,32 +335,27 @@ typedef struct _KTSS
UCHAR IntDirectionMap[IOPM_DIRECTION_MAP_SIZE];
} KTSS, *PKTSS;
/* Exception frame definition (not available on i686) */
/* Exception frame definition (not available on ia32) */
typedef struct _KEXCEPTION_FRAME
{
ULONG Ebp;
ULONG Ebx;
ULONG Edi;
ULONG Esi;
ULONG Return;
ULONG PlaceHolder;
} KEXCEPTION_FRAME, *PKEXCEPTION_FRAME;
/* Thread start frame definition */
typedef struct _KSTART_FRAME
{
ULONG P1Home;
ULONG P2Home;
ULONG P3Home;
PKSYSTEM_ROUTINE SystemRoutine;
PKSTART_ROUTINE StartRoutine;
PVOID StartContext;
BOOLEAN UserMode;
ULONG Return;
} KSTART_FRAME, *PKSTART_FRAME;
/* Switch frame definition */
typedef struct _KSWITCH_FRAME
{
PVOID ExceptionList;
KRUNLEVEL ApcBypass;
ULONG Return;
BOOLEAN ApcBypassDisabled;
PVOID Return;
} KSWITCH_FRAME, *PKSWITCH_FRAME;
/* Trap frame definition */
@@ -515,18 +419,6 @@ typedef struct _KSPECIAL_REGISTERS
ULONG Reserved[6];
} KSPECIAL_REGISTERS, *PKSPECIAL_REGISTERS;
/* Processor start block structure definition */
typedef struct _PROCESSOR_START_BLOCK
{
ULONG_PTR Cr3;
ULONG_PTR Cr4;
PVOID EntryPoint;
PVOID InitialStack;
PVOID ProcessorStructures;
PVOID Stack;
BOOLEAN Started;
} PROCESSOR_START_BLOCK, *PPROCESSOR_START_BLOCK;
/* Processor state frame structure definition */
typedef struct _KPROCESSOR_STATE
{
@@ -544,32 +436,14 @@ typedef struct _KPROCESSOR_CONTROL_BLOCK
ULONG_PTR SetMember;
CPU_IDENTIFICATION CpuId;
KPROCESSOR_STATE ProcessorState;
KSPIN_LOCK PrcbLock;
KSPIN_LOCK_QUEUE LockQueue[MaximumLock];
LOOKASIDE_LIST LookasideList[16];
LOOKASIDE_LIST NonPagedLookasideList[POOL_LOOKASIDE_LISTS];
LOOKASIDE_LIST PagedLookasideList[POOL_LOOKASIDE_LISTS];
ULONG_PTR MultiThreadProcessorSet;
VOLATILE ULONG IpiFrozen;
VOLATILE LONG_PTR RequestSummary;
KDPC_DATA DpcData[2];
PVOID DpcStack;
LONG MaximumDpcQueueDepth;
ULONG DpcRequestRate;
BOOLEAN DpcInterruptRequested;
VOLATILE BOOLEAN DpcRoutineActive;
ULONG DpcLastCount;
VOLATILE ULONG_PTR TimerHand;
VOLATILE ULONG_PTR TimerRequest;
SINGLE_LIST_ENTRY DeferredReadyListHead;
ULONG InterruptCount;
ULONG KernelTime;
ULONG UserTime;
ULONG DpcTime;
ULONG InterruptTime;
ULONG AdjustDpcThreshold;
PROCESSOR_POWER_STATE PowerState;
ULONG ProfilingCountdown;
} KPROCESSOR_CONTROL_BLOCK, *PKPROCESSOR_CONTROL_BLOCK;
/* Processor Block structure definition */
@@ -596,9 +470,6 @@ typedef struct _KPROCESSOR_BLOCK
KAFFINITY SetMember;
ULONG StallScaleFactor;
UCHAR CpuNumber;
ULONG HardwareId;
VOLATILE BOOLEAN Started;
PINTERRUPT_HANDLER InterruptDispatchTable[256];
} KPROCESSOR_BLOCK, *PKPROCESSOR_BLOCK;
/* Thread Environment Block (TEB) structure definition */
@@ -607,5 +478,4 @@ typedef struct _THREAD_ENVIRONMENT_BLOCK
THREAD_INFORMATION_BLOCK InformationBlock;
} THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_KETYPES_H */

160
sdk/xtdk/i686/mmtypes.h
View File

@@ -35,58 +35,9 @@
#define MM_PTE_LEGACY_SHIFT 2
#define MM_PDI_LEGACY_SHIFT 22
/* PTE state flags */
#define MM_PTE_VALID 0x00000001
#define MM_PTE_ACCESSED 0x00000020
#define MM_PTE_DIRTY 0x00000040
/* PTE scope flags */
#define MM_PTE_LARGE_PAGE 0x00000080
#define MM_PTE_GLOBAL 0x00000100
/* PTE access flags */
#define MM_PTE_NOACCESS 0x00000000
#define MM_PTE_READONLY 0x00000000
#define MM_PTE_EXECUTE 0x00000000
#define MM_PTE_EXECUTE_READ 0x00000000
#define MM_PTE_READWRITE 0x00000002
#define MM_PTE_WRITECOPY 0x00000200
#define MM_PTE_EXECUTE_READWRITE 0x00000002
#define MM_PTE_EXECUTE_WRITECOPY 0x00000200
/* PTE protection flags */
#define MM_PTE_NOEXECUTE 0x00000000
#define MM_PTE_GUARDED 0x00000018
#define MM_PTE_PROTECT 0x00000612
/* PTE cache flags */
#define MM_PTE_CACHE_ENABLE 0x00000000
#define MM_PTE_CACHE_DISABLE 0x00000010
#define MM_PTE_CACHE_WRITECOMBINED 0x00000010
#define MM_PTE_CACHE_WRITETHROUGH 0x00000008
/* PTE software flags */
#define MM_PTE_COPY_ON_WRITE 0x00000200
#define MM_PTE_PROTOTYPE 0x00000400
#define MM_PTE_TRANSITION 0x00000800
/* PTE frame bits */
#define MM_PTE_FRAME_BITS 25
/* PTE protection bits */
#define MM_PTE_PROTECTION_BITS 5
/* Base address of the system page table */
#define MM_SYSTEM_PTE_BASE NULLPTR
/* Minimum number of physical pages needed by the system */
#define MM_MINIMUM_PHYSICAL_PAGES 1100
/* Number of system PTEs */
#define MM_MINIMUM_NUMBER_SYSTEM_PTES 7000
#define MM_DEFAULT_NUMBER_SYSTEM_PTES 11000
#define MM_MAXIMUM_NUMBER_SYSTEM_PTES 22000
/* Default number of secondary colors */
#define MM_DEFAULT_SECONDARY_COLORS 64
@@ -99,31 +50,12 @@
/* HAL memory pool virtual address start */
#define MM_HARDWARE_VA_START 0xFFC00000
/* Kernel shared data address */
#define MM_KERNEL_SHARED_DATA_ADDRESS 0xFFDF0000
/* Maximum physical address used by HAL allocations */
#define MM_MAXIMUM_PHYSICAL_ADDRESS 0xFFFFFFFF
/* Highest system address */
#define MM_HIGHEST_SYSTEM_ADDRESS 0xFFFFFFFF
/* User probe address */
#define MM_USER_PROBE_ADDRESS 0x7FFF0000
/* Trampoline code address */
#define MM_TRAMPOLINE_ADDRESS 0x80000
/* Pool block size */
#define MM_POOL_BLOCK_SIZE 8
/* Number of pool lists per page */
#define MM_POOL_LISTS_PER_PAGE (MM_PAGE_SIZE / MM_POOL_BLOCK_SIZE)
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Page size enumeration list */
typedef enum _PAGE_SIZE
{
@@ -174,6 +106,7 @@ typedef struct _HARDWARE_MODERN_PTE
/* Generic Page Table entry union to abstract PML2 and PML3 formats */
typedef union _HARDWARE_PTE
{
ULONGLONG Long;
HARDWARE_LEGACY_PTE Pml2;
HARDWARE_MODERN_PTE Pml3;
} HARDWARE_PTE, *PHARDWARE_PTE;
@@ -268,12 +201,12 @@ typedef struct _MMPML2_PTE_TRANSITION
typedef union _MMPML2_PTE
{
ULONG Long;
HARDWARE_LEGACY_PTE Flush;
MMPML2_PTE_HARDWARE Hardware;
MMPML2_PTE_PROTOTYPE Prototype;
MMPML2_PTE_SOFTWARE Software;
MMPML2_PTE_TRANSITION Transition;
MMPML2_PTE_SUBSECTION Subsection;
HARDWARE_PTE Flush;
MMPML2_PTE_HARDWARE Hard;
MMPML2_PTE_PROTOTYPE Proto;
MMPML2_PTE_SOFTWARE Soft;
MMPML2_PTE_TRANSITION Trans;
MMPML2_PTE_SUBSECTION Subsect;
MMPML2_PTE_LIST List;
} MMPML2_PTE, *PMMPML2_PTE;
@@ -363,7 +296,7 @@ typedef struct _MMPML3_PTE_TRANSITION
typedef union _MMPML3_PTE
{
ULONGLONG Long;
HARDWARE_MODERN_PTE Flush;
HARDWARE_PTE Flush;
MMPML3_PTE_HARDWARE Hardware;
MMPML3_PTE_PROTOTYPE Prototype;
MMPML3_PTE_SOFTWARE Software;
@@ -375,6 +308,7 @@ typedef union _MMPML3_PTE
/* Generic Page Table Entry union to abstract PML2 and PML3 formats */
typedef union _MMPTE
{
ULONGLONG Long;
MMPML2_PTE Pml2;
MMPML3_PTE Pml3;
} MMPTE, *PMMPTE;
@@ -405,7 +339,6 @@ typedef struct _MMPFN
USHORT ReferenceCount;
} e2;
} u3;
ULONG UsedPageTableEntries;
union
{
MMPTE OriginalPte;
@@ -416,84 +349,15 @@ typedef struct _MMPFN
ULONG_PTR EntireFrame;
struct
{
ULONG_PTR PteFrame:25;
ULONG_PTR PteFrame:26;
ULONG_PTR InPageError:1;
ULONG_PTR VerifierAllocation:1;
ULONG_PTR AweAllocation:1;
ULONG_PTR Priority:3;
ULONG_PTR LockCharged:1;
ULONG_PTR KernelStack:1;
ULONG_PTR MustBeCached:1;
};
} u4;
} MMPFN, *PMMPFN;
/* Pool descriptor structure definition */
typedef struct _POOL_DESCRIPTOR
{
LIST_ENTRY ListHeads[MM_POOL_LISTS_PER_PAGE];
PVOID LockAddress;
ULONG PoolIndex;
LONG PendingFreeDepth;
PVOID PendingFrees;
MMPOOL_TYPE PoolType;
ULONG RunningFrees;
ULONG RunningAllocations;
ULONG Threshold;
ULONG TotalPages;
ULONG TotalBigAllocations;
SIZE_T TotalBytes;
SIZE_T Reserved;
} POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
/* Working set list entry structure definition */
typedef struct _MMWSLENTRY
{
ULONG_PTR Valid:1;
ULONG_PTR LockedInWs:1;
ULONG_PTR LockedInMemory:1;
ULONG_PTR Protection:5;
ULONG_PTR Hashed:1;
ULONG_PTR Direct:1;
ULONG_PTR Age:2;
ULONG_PTR VirtualPageNumber:20;
} MMWSLENTRY, *PMMWSLENTRY;
/* Working set free entry structure definition */
typedef struct _MMWSLE_FREE_ENTRY
{
ULONG MustBeZero:1;
ULONG PreviousFree:11;
LONG NextFree:20;
} MMWSLE_FREE_ENTRY, *PMMWSLE_FREE_ENTRY;
/* Working set list entry union definition */
typedef union _MMWSLE
{
PVOID VirtualAddress;
ULONG_PTR Long;
MMWSLENTRY e1;
MMWSLE_FREE_ENTRY Free;
} MMWSLE, *PMMWSLE;
/* Working set list structure definition */
typedef struct _MMWSL
{
ULONG FirstFree;
ULONG FirstDynamic;
ULONG LastEntry;
ULONG NextSlot;
PMMWSLE Wsle;
ULONG LastInitializedWsle;
ULONG NonDirectCount;
PMMWSLE_HASH HashTable;
ULONG HashTableSize;
ULONG NumberOfCommittedPageTables;
PVOID HashTableStart;
PVOID HighestPermittedHashAddress;
ULONG NumberOfImageWaiters;
ULONG VadBitMapHint;
USHORT UsedPageTableEntries[768];
ULONG CommittedPageTables[24];
} MMWSL, *PMMWSL;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_MMTYPES_H */

32
sdk/xtdk/i686/rtltypes.h
View File

@@ -1,32 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtdk/amd64/rtltypes.h
* DESCRIPTION: Runtime library structures definitions for i686 architecture
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTDK_I686_RTLTYPES_H
#define __XTDK_I686_RTLTYPES_H
#include <xtbase.h>
#include <rtltypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Header for a sequenced single linked list union definition */
typedef union _SINGLE_LIST_HEADER
{
ULONGLONG Alignment;
struct
{
SINGLE_LIST_ENTRY Next;
USHORT Depth;
USHORT Sequence;
};
} SINGLE_LIST_HEADER, *PSINGLE_LIST_HEADER;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_RTLTYPES_H */

20
sdk/xtdk/i686/xtstruct.h
View File

@@ -12,20 +12,13 @@
#include <xtdefs.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Architecture-specific enumeration lists forward references */
typedef enum _APIC_DEST_MODE APIC_DEST_MODE, *PAPIC_DEST_MODE;
typedef enum _APIC_DM APIC_DM, *PAPIC_DM;
typedef enum _APIC_DSH APIC_DSH, *PAPIC_DSH;
typedef enum _APIC_MODE APIC_MODE, *PAPIC_MODE;
typedef enum _APIC_REGISTER APIC_REGISTER, *PAPIC_REGISTER;
typedef enum _APIC_TIMER_DIVISOR APIC_TIMER_DIVISOR, *PAPIC_TIMER_DIVISOR;
typedef enum _CPU_VENDOR CPU_VENDOR, *PCPU_VENDOR;
typedef enum _CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT CPUID_FEATURES_ADVANCED_POWER_MANAGEMENT, *PCPUID_FEATURES_ADVANCED_POWER_MANAGEMENT;
typedef enum _CPUID_FEATURES_EXTENDED CPUID_FEATURES_EXTENDED, *PCPUID_FEATURES_EXTENDED;
typedef enum _CPUID_FEATURES_POWER_MANAGEMENT CPUID_FEATURES_POWER_MANAGEMENT, *PCPUID_FEATURES_POWER_MANAGEMENT;
typedef enum _CPUID_FEATURES_STANDARD1 CPUID_FEATURES_STANDARD1, *PCPUID_FEATURES_STANDARD1;
typedef enum _CPUID_FEATURES_STANDARD7_LEAF0 CPUID_FEATURES_STANDARD7_LEAF0, *PCPUID_FEATURES_STANDARD7_LEAF0;
typedef enum _CPUID_FEATURES_STANDARD7_LEAF1 CPUID_FEATURES_STANDARD7_LEAF1, *PCPUID_FEATURES_STANDARD7_LEAF1;
@@ -37,7 +30,6 @@ typedef enum _PIC_I8259_ICW1_OPERATING_MODE PIC_I8259_ICW1_OPERATING_MODE, *PPIC
typedef enum _PIC_I8259_ICW4_BUFFERED_MODE PIC_I8259_ICW4_BUFFERED_MODE, *PPIC_I8259_ICW4_BUFFERED_MODE;
typedef enum _PIC_I8259_ICW4_EOI_MODE PIC_I8259_ICW4_EOI_MODE, *PPIC_I8259_ICW4_EOI_MODE;
typedef enum _PIC_I8259_ICW4_SYSTEM_MODE PIC_I8259_ICW4_SYSTEM_MODE, *PPIC_I8259_ICW4_SYSTEM_MODE;
typedef enum _TIMER_TYPE TIMER_TYPE, *PTIMER_TYPE;
typedef enum _TRAMPOLINE_TYPE TRAMPOLINE_TYPE, *PTRAMPOLINE_TYPE;
/* Architecture-specific structures forward references */
@@ -50,10 +42,7 @@ typedef struct _FX_SAVE_AREA FX_SAVE_AREA, *PFX_SAVE_AREA;
typedef struct _FX_SAVE_FORMAT FX_SAVE_FORMAT, *PFX_SAVE_FORMAT;
typedef struct _HARDWARE_LEGACY_PTE HARDWARE_LEGACY_PTE, *PHARDWARE_LEGACY_PTE;
typedef struct _HARDWARE_MODERN_PTE HARDWARE_MODERN_PTE, *PHARDWARE_MODERN_PTE;
typedef struct _HPET_REGISTERS HPET_REGISTERS, *PHPET_REGISTERS;
typedef struct _IOAPIC_DATA IOAPIC_DATA, *PIOAPIC_DATA;
typedef struct _KDESCRIPTOR KDESCRIPTOR, *PKDESCRIPTOR;
typedef struct _KDEVICE_QUEUE KDEVICE_QUEUE, *PKDEVICE_QUEUE;
typedef struct _KEXCEPTION_FRAME KEXCEPTION_FRAME, *PKEXCEPTION_FRAME;
typedef struct _KGDTENTRY KGDTENTRY, *PKGDTENTRY;
typedef struct _KIDTENTRY KIDTENTRY, *PKIDTENTRY;
@@ -81,12 +70,7 @@ typedef struct _MMPML3_PTE_PROTOTYPE MMPML3_PTE_PROTOTYPE, *PMMPML3_PTE_PROTOTYP
typedef struct _MMPML3_PTE_SOFTWARE MMPML3_PTE_SOFTWARE, *PMMPML3_PTE_SOFTWARE;
typedef struct _MMPML3_PTE_SUBSECTION MMPML3_PTE_SUBSECTION, *PMMPML3_PTE_SUBSECTION;
typedef struct _MMPML3_PTE_TRANSITION MMPML3_PTE_TRANSITION, *PMMPML3_PTE_TRANSITION;
typedef struct _MMWSL MMWSL, *PMMWSL;
typedef struct _MMWSLE_FREE_ENTRY MMWSLE_FREE_ENTRY, *PMMWSLE_FREE_ENTRY;
typedef struct _MMWSLENTRY MMWSLENTRY, *PMMWSLENTRY;
typedef struct _POOL_DESCRIPTOR POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
typedef struct _THREAD_ENVIRONMENT_BLOCK THREAD_ENVIRONMENT_BLOCK, *PTHREAD_ENVIRONMENT_BLOCK;
typedef struct _TIMER_CAPABILITIES TIMER_CAPABILITIES, *PTIMER_CAPABILITIES;
/* Unions forward references */
typedef union _APIC_BASE_REGISTER APIC_BASE_REGISTER, *PAPIC_BASE_REGISTER;
@@ -94,18 +78,14 @@ typedef union _APIC_COMMAND_REGISTER APIC_COMMAND_REGISTER, *PAPIC_COMMAND_REGIS
typedef union _APIC_LVT_REGISTER APIC_LVT_REGISTER, *PAPIC_LVT_REGISTER;
typedef union _APIC_SPURIOUS_REGISTER APIC_SPURIOUS_REGISTER, *PAPIC_SPURIOUS_REGISTER;
typedef union _HARDWARE_PTE HARDWARE_PTE, *PHARDWARE_PTE;
typedef union _IOAPIC_REDIRECTION_REGISTER IOAPIC_REDIRECTION_REGISTER, *PIOAPIC_REDIRECTION_REGISTER;
typedef union _MMPML2_PTE MMPML2_PTE, *PMMPML2_PTE;
typedef union _MMPML3_PTE MMPML3_PTE, *PMMPML3_PTE;
typedef union _MMPTE MMPDE, *PMMPDE;
typedef union _MMPTE MMPPE, *PMMPPE;
typedef union _MMPTE MMPTE, *PMMPTE;
typedef union _MMWSLE MMWSLE, *PMMWSLE;
typedef union _PIC_I8259_ICW1 PIC_I8259_ICW1, *PPIC_I8259_ICW1;
typedef union _PIC_I8259_ICW2 PIC_I8259_ICW2, *PPIC_I8259_ICW2;
typedef union _PIC_I8259_ICW3 PIC_I8259_ICW3, *PPIC_I8259_ICW3;
typedef union _PIC_I8259_ICW4 PIC_I8259_ICW4, *PPIC_I8259_ICW4;
typedef union _SINGLE_LIST_HEADER SINGLE_LIST_HEADER, *PSINGLE_LIST_HEADER;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_I686_XTSTRUCT_H */

1044
sdk/xtdk/iotypes.h
View File

File diff suppressed because it is too large Load Diff

4
sdk/xtdk/kdfuncs.h
View File

@@ -13,9 +13,6 @@
#include <xttypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel debugger routines forward references */
XTCLINK
XTCDECL
@@ -23,5 +20,4 @@ VOID
DbgPrint(PCWSTR Format,
...);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_KDFUNCS_H */

5
sdk/xtdk/kdtypes.h
View File

@@ -21,10 +21,6 @@
#define DEBUG_PROVIDER_COMPORT 0x00000001
#define DEBUG_PROVIDER_FRAMEBUFFER 0x00000002
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel routine callbacks */
typedef XTSTATUS (XTAPI *PKD_INIT_ROUTINE)();
typedef VOID (*PKD_PRINT_ROUTINE)(IN PCWSTR Format, IN ...);
@@ -46,5 +42,4 @@ typedef struct _KD_DISPATCH_TABLE
RTL_PRINT_CONTEXT PrintContext;
} KD_DISPATCH_TABLE, *PKD_DISPATCH_TABLE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_KDTYPES_H */

10
sdk/xtdk/kefuncs.h
View File

@@ -15,9 +15,6 @@
#include <ketypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Kernel services routines forward references */
XTCLINK
XTFASTCALL
@@ -144,12 +141,6 @@ VOID
KeSetTargetProcessorDpc(IN PKDPC Dpc,
IN CCHAR Number);
XTCLINK
XTAPI
VOID
KeSetTimeIncrement(IN ULONG MaxIncrement,
IN ULONG MinIncrement);
XTCLINK
XTAPI
VOID
@@ -168,5 +159,4 @@ XTAPI
BOOLEAN
KeSignalCallDpcSynchronize(IN PVOID SystemArgument);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_KEFUNCS_H */

262
sdk/xtdk/ketypes.h
View File

@@ -14,7 +14,6 @@
#include <xttarget.h>
#include <xttypes.h>
#include ARCH_HEADER(xtstruct.h)
#include ARCH_HEADER(rtltypes.h)
/* Exception types and handling mechanisms */
@@ -25,49 +24,14 @@
/* Maximum number of exception parameters */
#define EXCEPTION_MAXIMUM_PARAMETERS 15
/* IPI types */
#define IPI_APC 1
#define IPI_DPC 2
#define IPI_FREEZE 4
#define IPI_PACKET_READY 8
#define IPI_SYNC_REQUEST 16
/* IPI frozen states */
#define IPI_FROZEN_STATE_RUNNING 0x00
#define IPI_FROZEN_STATE_FROZEN 0x02
#define IPI_FROZEN_STATE_THAW 0x03
#define IPI_FROZEN_STATE_OWNER 0x04
#define IPI_FROZEN_STATE_FREEZE 0x05
#define IPI_FROZEN_STATE_ACTIVE 0x20
/* Lock queue states */
#define LOCK_QUEUE_WAIT 1
#define LOCK_QUEUE_OWNER 2
/* APC pending state length */
#define KAPC_STATE_LENGTH (FIELD_OFFSET(KAPC_STATE, UserApcPending) + sizeof(BOOLEAN))
/* Indices used to access the PushLock data structure */
#define KPUSHLOCK_INDEX ((ULONG_PTR)0x00)
#define KPUSHLOCK_LOCK ((ULONG_PTR)0x01)
#define KPUSHLOCK_WAITING ((ULONG_PTR)0x02)
#define KPUSHLOCK_WAKING ((ULONG_PTR)0x04)
#define KPUSHLOCK_MULTIPLE_SHARED ((ULONG_PTR)0x08)
#define KPUSHLOCK_INCREMENT_SHARED ((ULONG_PTR)0x10)
/* Mask for the pointer bits */
#define KPUSHLOCK_PTR_BITS ((ULONG_PTR)0x0F)
/* PushLock related definitions */
#define KPUSH_LOCK_TOTAL_BITS (sizeof(ULONG_PTR) * 8)
#define KPUSH_LOCK_SPIN_COUNT 1024
/* Kernel service descriptor tables count */
#define KSERVICE_TABLES_COUNT 4
/* Timer related definitions */
/* Timer length */
#define KTIMER_LENGTH (FIELD_OFFSET(KTIMER, Period) + sizeof(LONG))
#define KTIMER_TABLE_SIZE 512
/* Kernel builtin wait blocks */
#define EVENT_WAIT_BLOCK 2
@@ -79,19 +43,12 @@
#define READY_SKIP_QUANTUM 2
#define THREAD_QUANTUM 6
/* Dispatcher object type mask */
#define DISPATCHER_OBJECT_TYPE_MASK 0x7L
/* Thread priority levels */
#define THREAD_LOW_PRIORITY 0
#define THREAD_LOW_REALTIME_PRIORITY 16
#define THREAD_HIGH_PRIORITY 31
#define THREAD_MAXIMUM_PRIORITY 32
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Adjust reason */
typedef enum _ADJUST_REASON
{
@@ -118,15 +75,6 @@ typedef enum _KAPC_ENVIRONMENT
InsertApcEnvironment
} KAPC_ENVIRONMENT, *PKAPC_ENVIRONMENT;
/* Continue status enumeration list */
typedef enum _KCONTINUE_STATUS
{
ContinueError,
ContinueSuccess,
ContinueProcessorReselected,
ContinueNextProcessor
} KCONTINUE_STATUS, *PKCONTINUE_STATUS;
/* DPC importance enumeration list */
typedef enum _KDPC_IMPORTANCE
{
@@ -148,7 +96,7 @@ typedef enum _KOBJECTS
{
EventNotificationObject = 0,
EventSynchronizationObject = 1,
MutexObject = 2,
MutantObject = 2,
ProcessObject = 3,
QueueObject = 4,
SemaphoreObject = 5,
@@ -185,37 +133,6 @@ typedef enum _KPROCESS_STATE
ProcessOutSwap
} KPROCESS_STATE, *PKPROCESS_STATE;
/* Kernel profiling sources */
typedef enum _KPROFILE_SOURCE
{
ProfileTime,
ProfileAlignmentFixup,
ProfileTotalIssues,
ProfilePipelineDry,
ProfileLoadInstructions,
ProfilePipelineFrozen,
ProfileBranchInstructions,
ProfileTotalNonissues,
ProfileDcacheMisses,
ProfileIcacheMisses,
ProfileCacheMisses,
ProfileBranchMispredictions,
ProfileStoreInstructions,
ProfileFpInstructions,
ProfileIntegerInstructions,
Profile2Issue,
Profile3Issue,
Profile4Issue,
ProfileSpecialInstructions,
ProfileTotalCycles,
ProfileIcacheIssues,
ProfileDcacheAccesses,
ProfileMemoryBarrierCycles,
ProfileLoadLinkedIssues,
ProfileXtKernel,
ProfileMaximum
} KPROFILE_SOURCE, *PKPROFILE_SOURCE;
/* Thread state */
typedef enum _KTHREAD_STATE
{
@@ -233,23 +150,21 @@ typedef enum _KTHREAD_STATE
typedef enum _KSPIN_LOCK_QUEUE_LEVEL
{
DispatcherLock,
ExpansionLock,
UnusedSpareLock,
PfnLock,
SystemSpaceLock,
VacbLock,
MasterLock,
NonPagedAllocPoolLock,
NonPagedPoolLock,
IoCancelLock,
WorkQueueLock,
IoVpbLock,
IoDatabaseLock,
IoCompletionLock,
FileSystemLock,
FsStructLock,
AfdWorkQueueLock,
BcbLock,
NonPagedPoolLock,
ReservedSystemLock,
TimerTableLock,
MmNonPagedPoolLock,
MaximumLock
} KSPIN_LOCK_QUEUE_LEVEL, *PKSPIN_LOCK_QUEUE_LEVEL;
@@ -260,55 +175,6 @@ typedef enum _KTIMER_TYPE
SynchronizationTimer
} KTIMER_TYPE, *PKTIMER_TYPE;
/* Wait reason */
typedef enum _KWAIT_REASON
{
Executive,
FreePage,
PageIn,
PoolAllocation,
DelayExecution,
Suspended,
UserRequest,
WrExecutive,
WrFreePage,
WrPageIn,
WrPoolAllocation,
WrDelayExecution,
WrSuspended,
WrUserRequest,
WrEventPair,
WrQueue,
WrLpcReceive,
WrLpcReply,
WrVirtualMemory,
WrPageOut,
WrRendezvous,
WrKeyedEvent,
WrTerminated,
WrProcessInSwap,
WrCpuRateControl,
WrCalloutStack,
WrKernel,
WrResource,
WrPushLock,
WrMutex,
WrQuantumEnd,
WrDispatchInt,
WrPreempted,
WrYieldExecution,
WrFastMutex,
WrGuardedMutex,
WrRundown,
WrAlertByThreadId,
WrDeferredPreempt,
WrPhysicalFault,
WrIoRing,
WrMdlCache,
WrRcu,
MaximumWaitReason
} KWAIT_REASON, *PKWAIT_REASON;
/* APC Types */
typedef enum _MODE
{
@@ -349,27 +215,6 @@ typedef VOID (XTAPI *PKRUNDOWN_ROUTINE)(IN PKAPC Apc);
typedef VOID (XTCDECL *PKSTART_ROUTINE)(IN PVOID StartContext);
typedef VOID (XTCDECL *PKSYSTEM_ROUTINE)(IN PKSTART_ROUTINE StartRoutine, IN PVOID StartContext);
/* Dispatcher object header structure definition */
typedef struct _DISPATCHER_HEADER
{
union
{
struct
{
UCHAR Type;
UCHAR Absolute;
UCHAR Size;
union {
UCHAR Inserted;
BOOLEAN DebugActive;
};
};
VOLATILE LONG Lock;
};
LONG SignalState;
LIST_ENTRY WaitListHead;
} DISPATCHER_HEADER, *PDISPATCHER_HEADER;
/* Exception record structure definition */
typedef struct _EXCEPTION_RECORD
{
@@ -381,14 +226,6 @@ typedef struct _EXCEPTION_RECORD
ULONG_PTR ExceptionInformation[EXCEPTION_MAXIMUM_PARAMETERS];
} EXCEPTION_RECORD, *PEXCEPTION_RECORD;
/* Extended affinity structure definition */
typedef struct _KAFFINITY_MAP
{
USHORT Size;
ULONG Reserved;
KAFFINITY Bitmap[];
} KAFFINITY_MAP, *PKAFFINITY_MAP;
/* Asynchronous Procedure Call (APC) object structure definition */
typedef struct _KAPC
{
@@ -457,49 +294,11 @@ typedef struct _KAPC_STATE
BOOLEAN UserApcPending;
} KAPC_STATE, *PKAPC_STATE;
/* Device queue entry structure definition */
typedef struct _KDEVICE_QUEUE_ENTRY
{
LIST_ENTRY DeviceListEntry;
ULONG SortKey;
BOOLEAN Inserted;
} KDEVICE_QUEUE_ENTRY, *PKDEVICE_QUEUE_ENTRY;
/* Mutex object structure definition */
typedef struct _KMUTEX
/* Event gate structure definition */
typedef struct _KGATE
{
DISPATCHER_HEADER Header;
LIST_ENTRY MutexListEntry;
PKTHREAD OwnerThread;
BOOLEAN Abandoned;
UCHAR ApcDisable;
} KMUTEX, *PKMUTEX;
/* Push Lock structure definition */
typedef union _KPUSH_LOCK
{
struct
{
ULONG_PTR Locked:1;
ULONG_PTR Waiting:1;
ULONG_PTR Waking:1;
ULONG_PTR MultipleShared:1;
ULONG_PTR Shared:(KPUSH_LOCK_TOTAL_BITS - 4);
};
ULONG_PTR Value;
PVOID Ptr;
} KPUSH_LOCK, *PKPUSH_LOCK;
/* Push lock wait block structure definition */
typedef struct _KPUSH_LOCK_WAIT_BLOCK
{
KEVENT WakeEvent;
PKPUSH_LOCK_WAIT_BLOCK Next;
PKPUSH_LOCK_WAIT_BLOCK Last;
PKPUSH_LOCK_WAIT_BLOCK Previous;
LONG ShareCount;
LONG Flags;
} KPUSH_LOCK_WAIT_BLOCK, *PKPUSH_LOCK_WAIT_BLOCK;
} KGATE, *PKGATE;
/* Semaphore object structure definition */
typedef struct _KSEMAPHORE
@@ -583,8 +382,7 @@ typedef struct _KPROCESS
ULONG_PTR DirectoryTable[2];
USHORT IopmOffset;
UCHAR Iopl;
PKAFFINITY_MAP Affinity;
PKAFFINITY_MAP ActiveProcessors;
VOLATILE KAFFINITY ActiveProcessors;
ULONG KernelTime;
ULONG UserTime;
LIST_ENTRY ReadyListHead;
@@ -592,6 +390,7 @@ typedef struct _KPROCESS
PVOID VdmTrapHandler;
LIST_ENTRY ThreadListHead;
KSPIN_LOCK ProcessLock;
KAFFINITY Affinity;
union
{
struct
@@ -613,39 +412,17 @@ typedef struct _KPROCESS
UCHAR Spare;
} KPROCESS, *PKPROCESS;
/* System Time structure definition */
typedef struct _KSYSTEM_TIME
{
ULONG LowPart;
LONG High1Part;
LONG High2Part;
} KSYSTEM_TIME, *PKSYSTEM_TIME;
/* Kernel Shared Data (KSD) structure definition */
typedef struct _KSHARED_DATA
{
VOLATILE KSYSTEM_TIME InterruptTime;
VOLATILE KSYSTEM_TIME SystemTime;
VOLATILE KSYSTEM_TIME TickCount;
ULONG XtMajorVersion;
ULONG XtMinorVersion;
WCHAR XtBuild[8];
WCHAR XtBuildHash[11];
WCHAR XtArchitecture[8];
WCHAR XtDate[9];
WCHAR XtFullDate[25];
} KSHARED_DATA, *PKSHARED_DATA;
/* Thread control block structure definition */
typedef struct _KTHREAD
{
DISPATCHER_HEADER Header;
LIST_ENTRY MutexListHead;
LIST_ENTRY MutantListHead;
PVOID InitialStack;
PVOID KernelStack;
PVOID StackBase;
PVOID StackLimit;
KSPIN_LOCK ThreadLock;
ULONG ContextSwitches;
VOLATILE UCHAR State;
UCHAR NpxState;
@@ -670,7 +447,7 @@ typedef struct _KTHREAD
PKWAIT_BLOCK WaitBlockList;
BOOLEAN Alertable;
BOOLEAN WaitNext;
KWAIT_REASON WaitReason;
UCHAR WaitReason;
SCHAR Priority;
UCHAR StackSwap;
VOLATILE UCHAR SwapBusy;
@@ -708,9 +485,9 @@ typedef struct _KTHREAD
CHAR PreviousMode;
UCHAR ResourceIndex;
UCHAR DisableBoost;
PKAFFINITY_MAP UserAffinity;
KAFFINITY UserAffinity;
PKPROCESS Process;
PKAFFINITY_MAP Affinity;
KAFFINITY Affinity;
PVOID ServiceTable;
PKAPC_STATE ApcStatePointer[2];
KAPC_STATE SavedApcState;
@@ -726,12 +503,12 @@ typedef struct _KTHREAD
LIST_ENTRY ThreadListEntry;
UCHAR LargeStack;
UCHAR PowerState;
UCHAR NpxRunLevel;
UCHAR NpxIrql;
UCHAR Spare5;
BOOLEAN AutoAlignment;
UCHAR Iopl;
CHAR FreezeCount;
CHAR SuspendCount;
CCHAR FreezeCount;
CCHAR SuspendCount;
UCHAR Spare0[1];
UCHAR UserIdealProcessor;
UCHAR Spare2[3];
@@ -868,5 +645,4 @@ typedef struct _KUBSAN_TYPE_MISMATCH_DATA_V1
UCHAR TypeCheckKind;
} KUBSAN_TYPE_MISMATCH_DATA_V1, *PKUBSAN_TYPE_MISMATCH_DATA_V1;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_KEFUNCS_H */

18
sdk/xtdk/ldrtypes.h
View File

@@ -38,10 +38,6 @@
#define LDR_DTE_MM_LOADED 0x40000000
#define LDR_DTE_COMPAT_DATABASE_PROCESSED 0x80000000
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Loader data table entry */
typedef struct _LDR_DATA_TABLE_ENTRY
{
@@ -74,18 +70,4 @@ typedef struct _LDR_DATA_TABLE_ENTRY
PVOID PatchInformation;
} LDR_DATA_TABLE_ENTRY, *PLDR_DATA_TABLE_ENTRY;
typedef struct _LDR_PEB_DATA
{
ULONG Length;
BOOLEAN Initialized;
PVOID SsHandle;
LIST_ENTRY InLoadOrderModuleList;
LIST_ENTRY InMemoryOrderModuleList;
LIST_ENTRY InInitializationOrderModuleList;
PVOID EntryInProgress;
UCHAR ShutdownInProgress;
PVOID ShutdownThreadId;
} LDR_PEB_DATA, *PLDR_PEB_DATA;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_LDRTYPES_H */

62
sdk/xtdk/lpctypes.h
View File

@@ -1,62 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtdk/lpctypes.h
* DESCRIPTION: Local Procedure Call (LPC) structures and definitions
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTDK_LPCTYPES_H
#define __XTDK_LPCTYPES_H
#include <xttypes.h>
#include <xtstruct.h>
#include <iotypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* LPC non-paged port queue structure definition */
typedef struct _LPCP_NONPAGED_PORT_QUEUE
{
KSEMAPHORE Semaphore;
struct _LPCP_PORT_OBJECT *BackPointer;
} LPCP_NONPAGED_PORT_QUEUE, *PLPCP_NONPAGED_PORT_QUEUE;
/* LPC port queue structure definition */
typedef struct _LPCP_PORT_QUEUE
{
PLPCP_NONPAGED_PORT_QUEUE NonPagedPortQueue;
PKSEMAPHORE Semaphore;
LIST_ENTRY ReceiveHead;
} LPCP_PORT_QUEUE, *PLPCP_PORT_QUEUE;
/* LPC port object structure definition */
typedef struct _LPCP_PORT_OBJECT
{
struct _LPCP_PORT_OBJECT *ConnectionPort;
struct _LPCP_PORT_OBJECT *ConnectedPort;
LPCP_PORT_QUEUE MsgQueue;
CLIENT_ID Creator;
PVOID ClientSectionBase;
PVOID ServerSectionBase;
PVOID PortContext;
PETHREAD ClientThread;
SECURITY_QUALITY_OF_SERVICE SecurityQos;
SECURITY_CLIENT_CONTEXT StaticSecurity;
LIST_ENTRY LpcReplyChainHead;
LIST_ENTRY LpcDataInfoChainHead;
union
{
PEPROCESS ServerProcess;
PEPROCESS MappingProcess;
};
ULONG MaxMessageLength;
ULONG MaxConnectionInfoLength;
ULONG Flags;
KEVENT WaitEvent;
} LPCP_PORT_OBJECT, *PLPCP_PORT_OBJECT;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_LPCTYPES_H */

44
sdk/xtdk/mmfuncs.h
View File

@@ -1,44 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtdk/mmfuncs.h
* DESCRIPTION: XTOS memory manager routine definitions
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTDK_MMFUNCS_H
#define __XTDK_MMFUNCS_H
#include <xtdefs.h>
#include <xtstruct.h>
#include <xttypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Memory manager routines forward references */
XTAPI
XTSTATUS
MmAllocatePool(IN MMPOOL_TYPE PoolType,
IN SIZE_T Bytes,
OUT PVOID *Memory);
XTAPI
XTSTATUS
MmAllocatePoolWithTag(IN MMPOOL_TYPE PoolType,
IN SIZE_T Bytes,
OUT PVOID *Memory,
IN ULONG Tag);
XTAPI
XTSTATUS
MmFreePool(IN PVOID VirtualAddress);
XTAPI
XTSTATUS
MmFreePoolWithTag(IN PVOID VirtualAddress,
IN ULONG Tag);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_MMFUNCS_H */

300
sdk/xtdk/mmtypes.h
View File

@@ -4,138 +4,23 @@
* FILE: sdk/xtdk/mmtypes.h
* DESCRIPTION: Memory management data structures
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTDK_MMTYPES_H
#define __XTDK_MMTYPES_H
#include <xtbase.h>
#include <ketypes.h>
#include ARCH_HEADER(xtstruct.h)
/* Number of hyper space pages */
#define MM_HYPERSPACE_PAGE_COUNT 255
/* Number of free page list heads */
#define MM_MAX_FREE_PAGE_LIST_HEADS 4
/* Number of paging colors */
#define MM_PAGING_COLORS 64
/* PTE frame mask definition */
#define MM_PFN_PTE_FRAME (((ULONG_PTR)1 << MM_PTE_FRAME_BITS) - 1)
/* Memory manager pool type mask definition */
#define MM_POOL_TYPE_MASK 1
/* Bad pool caller reasons */
#define MM_POOL_INVALID_ALLOC_RUNLEVEL 8
#define MM_POOL_INVALID_FREE_RUNLEVEL 9
/* Pool flags */
#define MM_POOL_BIG_ALLOCATIONS_ENTRY_FREE 0x1
#define MM_POOL_PROTECTED 0x80000000
#define MM_POOL_RAISE_EXCEPTION 0x10
/* Number of reserved zeroed PTEs */
#define MM_RESERVED_ZERO_PTES 32
/* Memory Manager Protection Bits */
#define MM_ZERO_ACCESS 0
#define MM_READONLY 1
#define MM_EXECUTE 2
#define MM_EXECUTE_READ 3
#define MM_READWRITE 4
#define MM_WRITECOPY 5
#define MM_EXECUTE_READWRITE 6
#define MM_EXECUTE_WRITECOPY 7
#define MM_PROTECT_ACCESS 7
/* Protection field shift */
#define MM_PROTECT_FIELD_SHIFT 5
/* Process Quota Adjustment Thresholds */
#define MMNONPAGED_QUOTA_INCREASE (64*1024)
#define MMPAGED_QUOTA_INCREASE (512*1024)
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Memory manager page lists */
typedef enum _MMPAGELISTS
/* Page map routines structure definition */
typedef CONST STRUCT _CMMPAGEMAP_ROUTINES
{
ZeroedPageList = 0,
FreePageList = 1,
StandbyPageList = 2,
ModifiedPageList = 3,
ModifiedReadOnlyPageList = 4,
BadPageList = 5,
ActiveAndValid = 6,
TransitionPage = 7
} MMPAGELISTS, *PMMPAGELISTS;
/* Page cache attributes */
typedef enum _MMPFN_CACHE_ATTRIBUTE
{
PfnNonCached,
PfnCached,
PfnWriteCombined,
PfnNotMapped
} MMPFN_CACHE_ATTRIBUTE, *PMMPFN_CACHE_ATTRIBUTE;
/* Memory Manager pool types */
typedef enum _MMPOOL_TYPE
{
NonPagedPool = 0,
PagedPool = 1,
NonPagedPoolMustSucceed = 2,
NonPagedPoolCacheAligned = 4,
PagedPoolCacheAligned = 5,
NonPagedPoolCacheAlignedMustSucceed = 6,
MaxPoolType = 7,
NonPagedPoolSession = 32,
PagedPoolSession = 33,
NonPagedPoolMustSucceedSession = 34,
NonPagedPoolCacheAlignedSession = 36,
PagedPoolCacheAlignedSession = 37,
NonPagedPoolCacheAlignedMustSucceedSession = 38
} MMPOOL_TYPE, *PMMPOOL_TYPE;
/* Page table pool types */
typedef enum _MMSYSTEM_PTE_POOL_TYPE
{
SystemPteSpace,
NonPagedPoolExpansion,
MaximumPtePoolTypes
} MMSYSTEM_PTE_POOL_TYPE, *PMMSYSTEM_PTE_POOL_TYPE;
/* Non-paged lookaside list indices */
typedef enum _NONPAGED_LOOKASIDE_NUMBER
{
LookasideSmallIrpList,
LookasideLargeIrpList,
LookasideMdlList,
LookasideCreateInfoList,
LookasideNameBufferList,
LookasideTwilightList,
LookasideCompletionList,
LookasideMaximumList
} NONPAGED_LOOKASIDE_NUMBER, *PNONPAGED_LOOKASIDE_NUMBER;
/* Memory Descriptor List structure definition */
typedef struct _MDL
{
PMDL Next;
CSHORT Size;
CSHORT MdlFlags;
PEPROCESS Process;
PVOID MappedSystemVa;
PVOID StartVa;
ULONG ByteCount;
ULONG ByteOffset;
} MDL, *PMDL;
VOID (XTAPI *ClearPte)(PHARDWARE_PTE PtePointer);
BOOLEAN (XTAPI *PteValid)(PHARDWARE_PTE PtePointer);
VOID (XTAPI *SetPteCaching)(PHARDWARE_PTE PtePointer, BOOLEAN CacheDisable, BOOLEAN WriteThrough);
VOID (XTAPI *SetPte)(PHARDWARE_PTE PtePointer, PFN_NUMBER PageFrameNumber, BOOLEAN Writable);
} CMMPAGEMAP_ROUTINES, *PCMMPAGEMAP_ROUTINES;
/* Color tables structure definition */
typedef struct _MMCOLOR_TABLES
@@ -145,58 +30,6 @@ typedef struct _MMCOLOR_TABLES
ULONG_PTR Count;
} MMCOLOR_TABLES, *PMMCOLOR_TABLES;
/* Free pool entry structure definition */
typedef struct _MMFREE_POOL_ENTRY
{
LIST_ENTRY List;
PFN_COUNT Size;
PMMFREE_POOL_ENTRY Owner;
} MMFREE_POOL_ENTRY, *PMMFREE_POOL_ENTRY;
/* Memory layout structure definition */
typedef struct _MMMEMORY_LAYOUT
{
PMMPFN PfnDatabase;
PFN_NUMBER PfnDatabaseSize;
PVOID SelfMapAddress;
PVOID HardwarePoolStart;
PVOID HardwarePoolEnd;
PVOID HyperSpaceStart;
PVOID HyperSpaceEnd;
PVOID LoaderMappingsStart;
PVOID LoaderMappingsEnd;
PFN_NUMBER LoaderMappingsSize;
PVOID NonCanonicalStart;
PVOID NonCanonicalEnd;
PVOID NonPagedPoolStart;
PVOID NonPagedPoolEnd;
PFN_NUMBER NonPagedPoolSize;
PVOID NonPagedExpansionPoolStart;
PVOID NonPagedExpansionPoolEnd;
PFN_NUMBER NonPagedExpansionPoolSize;
PVOID NonPagedSystemPoolStart;
PVOID NonPagedSystemPoolEnd;
PFN_NUMBER NonPagedSystemPoolSize;
PVOID PagedPoolStart;
PVOID PagedPoolEnd;
PFN_NUMBER PagedPoolSize;
PVOID ReservedSystemPoolStart;
PVOID ReservedSystemPoolEnd;
PVOID SessionSpaceStart;
PVOID SessionSpaceEnd;
PFN_NUMBER SessionSpaceSize;
PVOID SharedSystemPageStart;
PVOID SharedSystemPageEnd;
PVOID SystemCacheStart;
PVOID SystemCacheEnd;
PVOID SystemWorkingSetStart;
PVOID SystemWorkingSetEnd;
PVOID UserSpaceStart;
PVOID UserSpaceEnd;
PVOID PteSpaceStart;
PVOID PteSpaceEnd;
} MMMEMORY_LAYOUT, *PMMMEMORY_LAYOUT;
/* Page Frame Entry structure definition */
typedef struct _MMPFNENTRY
{
@@ -212,123 +45,4 @@ typedef struct _MMPFNENTRY
USHORT ParityError:1;
} MMPFNENTRY, *PMMPFNENTRY;
/* Page Frame List structure definition */
typedef struct _MMPFNLIST
{
PFN_NUMBER Total;
MMPAGELISTS ListName;
PFN_NUMBER Flink;
PFN_NUMBER Blink;
} MMPFNLIST, *PMMPFNLIST;
/* Physical memory run structure definition */
typedef struct _PHYSICAL_MEMORY_RUN
{
PFN_NUMBER BasePage;
PFN_NUMBER PageCount;
} PHYSICAL_MEMORY_RUN, *PPHYSICAL_MEMORY_RUN;
/* Physical memory descriptor structure definition */
typedef struct _PHYSICAL_MEMORY_DESCRIPTOR
{
ULONG NumberOfRuns;
PFN_NUMBER NumberOfPages;
PHYSICAL_MEMORY_RUN Run[1];
} PHYSICAL_MEMORY_DESCRIPTOR, *PPHYSICAL_MEMORY_DESCRIPTOR;
/* Pool header structure definition */
typedef struct _POOL_HEADER
{
union
{
struct
{
USHORT PreviousSize:9;
USHORT PoolIndex:7;
USHORT BlockSize:9;
USHORT PoolType:7;
};
ULONG Long;
};
union
{
ULONG PoolTag;
PEPROCESS ProcessBilled;
struct
{
USHORT AllocatorBackTraceIndex;
USHORT PoolTagHash;
};
};
} POOL_HEADER, *PPOOL_HEADER;
/* Pool descriptor structure definition */
typedef struct _POOL_TRACKING_BIG_ALLOCATIONS
{
ULONG NumberOfPages;
PVOID QuotaObject;
ULONG Tag;
PVOID VirtualAddress;
} POOL_TRACKING_BIG_ALLOCATIONS, *PPOOL_TRACKING_BIG_ALLOCATIONS;
/* Pool tracking table structure definition */
typedef struct _POOL_TRACKING_TABLE
{
LONG NonPagedAllocations;
SIZE_T NonPagedBytes;
LONG NonPagedFrees;
LONG PagedAllocations;
SIZE_T PagedBytes;
LONG PagedFrees;
ULONG Tag;
} POOL_TRACKING_TABLE, *PPOOL_TRACKING_TABLE;
/* Memory manager support flags structure definition */
typedef struct _MMSUPPORT_FLAGS
{
ULONG SessionSpace:1;
ULONG BeingTrimmed:1;
ULONG SessionLeader:1;
ULONG TrimHard:1;
ULONG MaximumWorkingSetHard:1;
ULONG ForceTrim:1;
ULONG MinimumWorkingSetHard:1;
ULONG Available0:1;
ULONG MemoryPriority:8;
ULONG GrowWsleHash:1;
ULONG AcquiredUnsafe:1;
ULONG Available:14;
} MMSUPPORT_FLAGS, *PMMSUPPORT_FLAGS;
/* Memory manager support structure definition */
typedef struct _MMSUPPORT
{
LIST_ENTRY WorkingSetExpansionLinks;
USHORT LastTrimpStamp;
USHORT NextPageColor;
MMSUPPORT_FLAGS Flags;
ULONG PageFaultCount;
ULONG PeakWorkingSetSize;
ULONG GrowthSinceLastEstimate;
ULONG MinimumWorkingSetSize;
ULONG MaximumWorkingSetSize;
PMMWSL VmWorkingSetList;
ULONG Claim;
ULONG NextEstimationSlot;
ULONG NextAgingSlot;
ULONG EstimatedAvailable;
ULONG WorkingSetSize;
PKEVENT ExitEvent;
KPUSH_LOCK WorkingSetMutex;
PVOID AccessLog;
} MMSUPPORT, *PMMSUPPORT;
/* Working Set List Entry Hash structure definition */
typedef struct _MMWSLE_HASH
{
PVOID Key;
ULONG Index;
} MMWSLE_HASH, *PMMWSLE_HASH;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_MMTYPES_H */

377
sdk/xtdk/obtypes.h
View File

@@ -1,377 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtdk/obtypes.h
* DESCRIPTION: Object Manager structures definitions
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTDK_OBTYPES_H
#define __XTDK_OBTYPES_H
#include <xtbase.h>
#include <xttypes.h>
#include <xtstruct.h>
#include <iotypes.h>
/* Object header information flag masks */
#define OBJECT_FLAG_NEW_OBJECT 0x01
#define OBJECT_FLAG_KERNEL_MODE 0x02
#define OBJECT_FLAG_CREATOR_INFO 0x04
#define OBJECT_FLAG_EXCLUSIVE 0x08
#define OBJECT_FLAG_PERMANENT 0x10
#define OBJECT_FLAG_SECURITY_QUOTA 0x20
#define OBJECT_FLAG_SINGLE_PROCESS 0x40
#define OBJECT_FLAG_DEFER_DELETE 0x80
/* Object lock states */
#define OBJECT_LOCK_STATE_WAIT_EXCLUSIVE 0xAAAA1234
#define OBJECT_LOCK_WAITSHARED_SIGNATURE 0xBBBB1234
#define OBJECT_LOCK_STATE_OWNED_EXCLUSIVE 0xCCCC1234
#define OBJECT_LOCK_OWNEDSHARED_SIGNATURE 0xDDDD1234
#define OBJECT_LOCK_STATE_RELEASED_SIGNATURE 0xEEEE1234
#define OBJECT_LOCK_STATE_INITIALIZED 0xFFFF1234
/* Object name attribute flags */
#define OBJECT_PROTECT_CLOSE 0x00000001L
#define OBJECT_INHERIT 0x00000002L
#define OBJECT_AUDIT_OBJECT_CLOSE 0x00000004L
#define OBJECT_PERMANENT 0x00000010L
#define OBJECT_EXCLUSIVE 0x00000020L
#define OBJECT_CASE_INSENSITIVE 0x00000040L
#define OBJECT_OPENIF 0x00000080L
#define OBJECT_OPENLINK 0x00000100L
#define OBJECT_KERNEL_HANDLE 0x00000200L
#define OBJECT_FORCE_ACCESS_CHECK 0x00000400L
#define OBJECT_VALID_ATTRIBUTES 0x000007F2L
/* Object handle attributes */
#define OBJECT_HANDLE_ATTRIBUTES (OBJECT_PROTECT_CLOSE | \
OBJECT_INHERIT | \
OBJECT_AUDIT_OBJECT_CLOSE)
/* Object protect-on-close access bit */
#define OBJECT_ACCESS_PROTECT_CLOSE_BIT 0x02000000L
/* Maximum number of defined object types */
#define OBJECT_MAX_DEFINED_OBJECT_TYPES 48
/* Object name buffer size */
#define OBJECT_NAME_BUFFER_SIZE 248
/* Object name lock flags */
#define OBJECT_NAME_LOCKED ((LONG)0x80000000)
#define OBJECT_REMOVE_QUEUE_LOCKED (PVOID)1
/* Object name path separator */
#define OBJECT_NAME_PATH_SEPARATOR ((WCHAR)L'\\')
/* Kernel mode object handle mask */
#define OBJECT_HANDLE_KERNEL_MASK ((ULONG_PTR)((LONG)0x80000000))
/* Number of hash buckets */
#define OBJECT_NUMBER_HASH_BUCKETS 37
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Object Manager routine callbacks */
typedef VOID (XTAPI *POB_DUMP_METHOD)(IN PVOID Object, IN POBJECT_DUMP_CONTROL Control);
typedef XTSTATUS (XTAPI *POB_OPEN_METHOD)(IN OBJECT_OPEN_REASON Reason, IN PEPROCESS Process, IN PVOID ObjectBody, IN ACCESS_MASK GrantedAccess, IN ULONG HandleCount);
typedef VOID (XTAPI *POB_CLOSE_METHOD)(IN PEPROCESS Process, IN PVOID Object, IN ACCESS_MASK GrantedAccess, IN ULONG ProcessHandleCount, IN ULONG SystemHandleCount);
typedef VOID (XTAPI *POB_DELETE_METHOD)(IN PVOID Object);
typedef XTSTATUS (XTAPI *POB_PARSE_METHOD)(IN PVOID ParseObject, IN PVOID ObjectType, IN OUT PACCESS_STATE AccessState, IN KPROCESSOR_MODE ProcessorMode, IN ULONG Attributes, IN OUT PUNICODE_STRING CompleteName, IN OUT PUNICODE_STRING RemainingName, IN OUT PVOID Context, IN PSECURITY_QUALITY_OF_SERVICE SecurityQos, OUT PVOID *Object);
typedef XTSTATUS (XTAPI *POB_SECURITY_METHOD)(IN PVOID Object, IN SECURITY_OPERATION_CODE OperationType, IN PSECURITY_INFORMATION SecurityInformation, IN PSECURITY_DESCRIPTOR SecurityDescriptor, IN OUT PULONG CapturedLength, IN OUT PSECURITY_DESCRIPTOR *ObjectSecurityDescriptor, IN MMPOOL_TYPE PoolType, IN PGENERIC_MAPPING GenericMapping);
typedef XTSTATUS (XTAPI *POB_QUERYNAME_METHOD)(IN PVOID Object, IN BOOLEAN HasObjectName, OUT POBJECT_NAME_INFORMATION ObjectNameInfo, IN ULONG Length, OUT PULONG ReturnLength, IN KPROCESSOR_MODE ProcessorMode);
typedef BOOLEAN (XTAPI *POB_OKAYTOCLOSE_METHOD)(IN PEPROCESS Process, IN PVOID Object, IN HANDLE Handle, IN KPROCESSOR_MODE ProcessorMode);
/* Bitmasks used to identify the presence of optional object headers in memory */
typedef enum _OBJECT_HEADER_INFO
{
ObjectHeaderInfoNone = 0,
ObjectHeaderInfoCreatorInfo = 0x01,
ObjectHeaderInfoNameInfo = 0x02,
ObjectHeaderInfoHandleInfo = 0x04,
ObjectHeaderInfoQuotaInfo = 0x08,
ObjectHeaderInfoProcessInfo = 0x10
} OBJECT_HEADER_INFO, *POBJECT_HEADER_INFO;
/* List of information classes used when querying or setting object attributes */
typedef enum _OBJECT_INFORMATION_CLASS
{
ObjectBasicInfo,
ObjectNameInfo,
ObjectTypeInfo,
ObjectAllInfo,
ObjectHandleFlagInfo
} OBJECT_INFORMATION_CLASS, *POBJECT_INFORMATION_CLASS;
/* List of valid reasons for creating, opening, or duplicating an object handle */
typedef enum _OBJECT_OPEN_REASON
{
ObCreateHandle,
ObOpenHandle,
ObDuplicateHandle,
ObInheritHandle,
ObMaxOpenReason
} OBJECT_OPEN_REASON, *POBJECT_OPEN_REASON;
/* Mapping of device names to object manager devices */
typedef struct _DEVICE_MAP
{
POBJECT_DIRECTORY DevicesDirectory;
POBJECT_DIRECTORY GlobalDevicesDirectory;
ULONG ReferenceCount;
ULONG DriveMap;
UCHAR DriveType[32];
} DEVICE_MAP, *PDEVICE_MAP;
/* Parameters provided by a caller when creating or opening an object */
typedef struct _OBJECT_ATTRIBUTES
{
ULONG Length;
HANDLE RootDirectory;
PUNICODE_STRING ObjectName;
ULONG Attributes;
PSECURITY_DESCRIPTOR SecurityDescriptor;
PSECURITY_QUALITY_OF_SERVICE SecurityQualityOfService;
} OBJECT_ATTRIBUTES, *POBJECT_ATTRIBUTES;
/* Internal data stored during object creation */
typedef struct _OBJECT_CREATE_INFORMATION
{
ULONG Attributes;
HANDLE RootDirectory;
PVOID ParseContext;
KPROCESSOR_MODE ProbeMode;
ULONG PagedPoolCharge;
ULONG NonPagedPoolCharge;
ULONG SecurityDescriptorCharge;
PSECURITY_DESCRIPTOR SecurityDescriptor;
PSECURITY_QUALITY_OF_SERVICE SecurityQos;
SECURITY_QUALITY_OF_SERVICE SecurityQualityOfService;
} OBJECT_CREATE_INFORMATION, *POBJECT_CREATE_INFORMATION;
/* Optional header storing information about the object's creator */
typedef struct _OBJECT_CREATOR_INFO
{
LIST_ENTRY TypeList;
HANDLE CreatorProcessId;
} OBJECT_CREATOR_INFO, *POBJECT_CREATOR_INFO;
/* Directory object used to structure the namespace hierarchy */
typedef struct _OBJECT_DIRECTORY
{
POBJECT_DIRECTORY_ENTRY HashBuckets[OBJECT_NUMBER_HASH_BUCKETS];
KPUSH_LOCK Lock;
PDEVICE_MAP DeviceMap;
ULONG SessionId;
} OBJECT_DIRECTORY, *POBJECT_DIRECTORY;
/* Linked list entry representing an object within a directory bucket */
typedef struct _OBJECT_DIRECTORY_ENTRY
{
POBJECT_DIRECTORY_ENTRY ChainLink;
PVOID Object;
ULONG HashValue;
} OBJECT_DIRECTORY_ENTRY, *POBJECT_DIRECTORY_ENTRY;
/* Control structure used during object diagnostic dumps */
typedef struct _OBJECT_DUMP_CONTROL
{
PVOID Stream;
ULONG Detail;
} OBJECT_DUMP_CONTROL, *POBJECT_DUMP_CONTROL;
/* Entry tracking the number of open handles a specific process holds */
typedef struct _OBJECT_HANDLE_COUNT_ENTRY
{
PEPROCESS OwningProcess;
ULONG HandleTableIndex;
ULONG HandleCount;
} OBJECT_HANDLE_COUNT_ENTRY, *POBJECT_HANDLE_COUNT_ENTRY;
/* Database array tracking handle counts for objects opened by processes */
typedef struct _OBJECT_HANDLE_COUNT_DATABASE
{
ULONG CountEntries;
OBJECT_HANDLE_COUNT_ENTRY HandleCountEntries[1];
} OBJECT_HANDLE_COUNT_DATABASE, *POBJECT_HANDLE_COUNT_DATABASE;
/* Database tracking all handle counts across different processes */
typedef struct _OBJECT_HANDLE_COUNT_INFORMATION
{
ULONG TotalHandleCount;
ULONG EntryCount;
POBJECT_HANDLE_COUNT_ENTRY Entries;
} OBJECT_HANDLE_COUNT_INFORMATION, *POBJECT_HANDLE_COUNT_INFORMATION;
/* Optional header containing the handle count database */
typedef struct _OBJECT_HANDLE_INFO
{
OBJECT_HANDLE_COUNT_INFORMATION HandleCounts;
} OBJECT_HANDLE_INFO, *POBJECT_HANDLE_INFO;
/* Object Handle Information */
typedef struct _OBJECT_HANDLE_INFORMATION
{
ULONG HandleAttributes;
ACCESS_MASK GrantedAccess;
} OBJECT_HANDLE_INFORMATION, *POBJECT_HANDLE_INFORMATION;
/* Core object header */
typedef struct _OBJECT_HEADER
{
LONG_PTR PointerCount;
union
{
LONG_PTR HandleCount;
VOLATILE PVOID NextToFree;
};
POBJECT_TYPE Type;
UCHAR NameInfoOffset;
UCHAR HandleInfoOffset;
UCHAR QuotaInfoOffset;
UCHAR Flags;
union
{
POBJECT_CREATE_INFORMATION ObjectCreateInfo;
PVOID QuotaBlockCharged;
};
PSECURITY_DESCRIPTOR SecurityDescriptor;
QUAD Body;
} OBJECT_HEADER, *POBJECT_HEADER;
/* Creator tracking information */
typedef struct _OBJECT_HEADER_CREATOR_INFO
{
LIST_ENTRY TypeList;
PVOID CreatorUniqueProcess;
USHORT CreatorBackTraceIndex;
USHORT Reserved;
} OBJECT_HEADER_CREATOR_INFO, *POBJECT_HEADER_CREATOR_INFO;
/* Union representing either a single handle count entry or a full database */
typedef union _OBJECT_HEADER_HANDLE_INFO
{
POBJECT_HANDLE_COUNT_DATABASE HandleCountDatabase;
OBJECT_HANDLE_COUNT_ENTRY SingleEntry;
} OBJECT_HEADER_HANDLE_INFO, *POBJECT_HEADER_HANDLE_INFO;
/* Name information stored in the object header */
typedef struct _OBJECT_HEADER_NAME_INFO
{
POBJECT_DIRECTORY Directory;
UNICODE_STRING Name;
ULONG QueryReferences;
ULONG Reserved;
ULONG DbgReferenceCount;
} OBJECT_HEADER_NAME_INFO, *POBJECT_HEADER_NAME_INFO;
/* Active quota information stored in the object header */
typedef struct _OBJECT_HEADER_QUOTA_INFO
{
ULONG PagedPoolCharge;
ULONG NonPagedPoolCharge;
ULONG SecurityDescriptorCharge;
PEPROCESS ExclusiveProcess;
} OBJECT_HEADER_QUOTA_INFO, *POBJECT_HEADER_QUOTA_INFO;
/* Context maintained during namespace traversal and directory lookups */
typedef struct _OBJECT_LOOKUP_CONTEXT
{
POBJECT_DIRECTORY Directory;
PVOID Object;
USHORT HashIndex;
BOOLEAN DirectoryLocked;
VOLATILE ULONG LockStateSignature;
} OBJECT_LOOKUP_CONTEXT, *POBJECT_LOOKUP_CONTEXT;
/* Optional header storing the object's hierarchical name and directory links */
typedef struct _OBJECT_NAME_INFO
{
LIST_ENTRY ObjectLinks;
UNICODE_STRING ObjectName;
PWSTR ObjectDirectoryPath;
} OBJECT_NAME_INFO, *POBJECT_NAME_INFO;
/* Structure used to query an object's name */
typedef struct _OBJECT_NAME_INFORMATION
{
UNICODE_STRING Name;
} OBJECT_NAME_INFORMATION, *POBJECT_NAME_INFORMATION;
/* Memory layout sizes for the object's optional headers */
typedef struct _OBJECT_OPTIONAL_HEADER_LAYOUT
{
ULONG QuotaInfoSize;
ULONG HandleInfoSize;
ULONG NameInfoSize;
ULONG CreatorInfoSize;
ULONG TotalSize;
} OBJECT_OPTIONAL_HEADER_LAYOUT, *POBJECT_OPTIONAL_HEADER_LAYOUT;
/* Information block linking an object to a specific process */
typedef struct _OBJECT_PROCESS_INFO
{
LIST_ENTRY Entry;
PEPROCESS Process;
ULONG ReferenceCount;
} OBJECT_PROCESS_INFO, *POBJECT_PROCESS_INFO;
/* Optional header tracking memory pool charges */
typedef struct _OBJECT_QUOTA_INFO
{
ULONG PagedPoolCharge;
ULONG NonPagedPoolCharge;
ULONG SecurityDescriptorCharge;
PEPROCESS ExclusiveProcess;
} OBJECT_QUOTA_INFO, *POBJECT_QUOTA_INFO;
/* Configuration block defining the lifecycle and behavior of a specific object type */
typedef struct _OBJECT_TYPE_INITIALIZER
{
USHORT Length;
BOOLEAN UseDefaultObject;
BOOLEAN CaseInsensitive;
ULONG InvalidAttributes;
GENERIC_MAPPING GenericMapping;
ULONG ValidAccessMask;
BOOLEAN SecurityRequired;
BOOLEAN MaintainHandleCount;
BOOLEAN MaintainTypeList;
MMPOOL_TYPE PoolType;
ULONG DefaultPagedPoolCharge;
ULONG DefaultNonPagedPoolCharge;
POB_DUMP_METHOD DumpProcedure;
POB_OPEN_METHOD OpenProcedure;
POB_CLOSE_METHOD CloseProcedure;
POB_DELETE_METHOD DeleteProcedure;
POB_PARSE_METHOD ParseProcedure;
POB_SECURITY_METHOD SecurityProcedure;
POB_QUERYNAME_METHOD QueryNameProcedure;
POB_OKAYTOCLOSE_METHOD OkayToCloseProcedure;
} OBJECT_TYPE_INITIALIZER, *POBJECT_TYPE_INITIALIZER;
/* Descriptor representing a registered object type in the system */
typedef struct _OBJECT_TYPE
{
LIST_ENTRY TypeList;
UNICODE_STRING Name;
PVOID DefaultObject;
ULONG Index;
ULONG TotalNumberOfObjects;
ULONG TotalNumberOfHandles;
ULONG HighWaterNumberOfObjects;
ULONG HighWaterNumberOfHandles;
OBJECT_TYPE_INITIALIZER TypeInfo;
KPUSH_LOCK TypeLock;
ULONG Key;
LIST_ENTRY CallbackList;
} OBJECT_TYPE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_OBTYPES_H */

77
sdk/xtdk/potypes.h
View File

@@ -14,67 +14,10 @@
#include <ketypes.h>
/* Processor performance scale factor */
#define POWER_PERFORMANCE_SCALE 100
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Power Manager routine callbacks */
typedef VOID (XTFASTCALL *PPROCESSOR_IDLE_FUNCTION)(IN PPROCESSOR_POWER_STATE PowerState);
typedef XTSTATUS (XTFASTCALL *PSET_PROCESSOR_THROTTLE)(IN UCHAR Throttle);
/* Device power states */
typedef enum _DEVICE_POWER_STATE
{
PowerDeviceUnspecified = 0,
PowerDeviceD0,
PowerDeviceD1,
PowerDeviceD2,
PowerDeviceD3,
PowerDeviceMaximum
} DEVICE_POWER_STATE, *PDEVICE_POWER_STATE;
/* Power actions list */
typedef enum _POWER_ACTION
{
PowerActionNone = 0,
PowerActionReserved,
PowerActionSleep,
PowerActionHibernate,
PowerActionShutdown,
PowerActionShutdownReset,
PowerActionShutdownOff,
PowerActionWarmEject
} POWER_ACTION, *PPOWER_ACTION;
typedef enum _POWER_STATE_TYPE
{
SystemPowerState = 0,
DevicePowerState
} POWER_STATE_TYPE, *PPOWER_STATE_TYPE;
/* System power states */
typedef enum _SYSTEM_POWER_STATE
{
PowerSystemUnspecified = 0,
PowerSystemWorking,
PowerSystemSleeping1,
PowerSystemSleeping2,
PowerSystemSleeping3,
PowerSystemHibernate,
PowerSystemShutdown,
PowerSystemMaximum
} SYSTEM_POWER_STATE, *PSYSTEM_POWER_STATE;
/* Power state union definition */
typedef union _POWER_STATE
{
SYSTEM_POWER_STATE SystemState;
DEVICE_POWER_STATE DeviceState;
} POWER_STATE, *PPOWER_STATE;
/* Processor IDLE times structure definition */
typedef struct _PROCESSOR_IDLE_TIMES
{
@@ -145,24 +88,4 @@ typedef struct _PROCESSOR_POWER_STATE
ULONG LastC3UserTime;
} PROCESSOR_POWER_STATE, *PPROCESSOR_POWER_STATE;
/* System power state context structure definition */
typedef struct _SYSTEM_POWER_STATE_CONTEXT
{
union
{
struct
{
ULONG Reserved1:8;
ULONG TargetSystemState:4;
ULONG EffectiveSystemState:4;
ULONG CurrentSystemState:4;
ULONG IgnoreHibernationPath:1;
ULONG PseudoTransition:1;
ULONG Reserved2:10;
};
ULONG ContextAsUlong;
};
} SYSTEM_POWER_STATE_CONTEXT, *PSYSTEM_POWER_STATE_CONTEXT;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_POTYPES_H */

288
sdk/xtdk/pstypes.h
View File

@@ -10,303 +10,21 @@
#define __XTDK_PSTYPES_H
#include <xttypes.h>
#include <xtstruct.h>
#include <extypes.h>
#include <iotypes.h>
#include <mmtypes.h>
#include <setypes.h>
#include <ketypes.h>
/* Quota bypass marker */
#define PS_QUOTA_BYPASS_MARKER ((PEPROCESS_QUOTA_BLOCK)1)
/* Current process & thread handles */
#define PS_CURRENT_PROCESS_HANDLE ((HANDLE)(LONG_PTR)-1)
#define PS_CURRENT_THREAD_HANDLE ((HANDLE)(LONG_PTR)-2)
/* Generic access rights mapping for process */
#define PS_PROCESS_GENERIC_MAPPING {SE_STANDARD_RIGHTS_READ | \
SE_PROCESS_QUERY_INFORMATION | \
SE_PROCESS_VM_READ, \
SE_STANDARD_RIGHTS_WRITE | \
SE_PROCESS_CREATE_PROCESS | \
SE_PROCESS_CREATE_THREAD | \
SE_PROCESS_DUP_HANDLE | \
SE_PROCESS_SET_INFORMATION | \
SE_PROCESS_SET_QUOTA | \
SE_PROCESS_SUSPEND_RESUME | \
SE_PROCESS_TERMINATE | \
SE_PROCESS_VM_OPERATION | \
SE_PROCESS_VM_WRITE, \
SE_STANDARD_RIGHTS_EXECUTE | \
SE_PROCESS_ALL_ACCESS | \
SE_SYNCHRONIZE} \
/* Generic access rights mapping for thread */
#define PS_THREAD_GENERIC_MAPPING {SE_STANDARD_RIGHTS_READ | \
SE_THREAD_GET_CONTEXT | \
SE_THREAD_QUERY_INFORMATION, \
SE_STANDARD_RIGHTS_WRITE | \
SE_THREAD_ALERT | \
SE_THREAD_SET_CONTEXT | \
SE_THREAD_SET_INFORMATION | \
SE_THREAD_SUSPEND_RESUME | \
SE_THREAD_TERMINATE, \
SE_STANDARD_RIGHTS_EXECUTE | \
SE_THREAD_ALL_ACCESS | \
SE_SYNCHRONIZE}
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Process quota types */
typedef enum _PS_QUOTA_TYPE
{
PsNonPagedPool,
PsPagedPool,
PsPageFile,
PsQuotaTypes
} PS_QUOTA_TYPE, *PPS_QUOTA_TYPE;
/* Kernel's representation of a process object */
typedef struct _EPROCESS
{
KPROCESS ProcessControlBlock;
KPUSH_LOCK ProcessLock;
LARGE_INTEGER CreateTime;
LARGE_INTEGER ExitTime;
EX_RUNDOWN_REFERENCE RundownProtect;
HANDLE UniqueProcessId;
LIST_ENTRY ActiveProcessLinks;
SIZE_T QuotaUsage[PsQuotaTypes];
SIZE_T QuotaPeak[PsQuotaTypes];
PVOID DebugPort;
PVOID ExceptionPort;
PHANDLE_TABLE ObjectTable;
PVOID Job;
PVOID SectionObject;
PVOID SectionBaseAddress;
PEPROCESS_QUOTA_BLOCK QuotaBlock;
HANDLE InheritedFromUniqueProcessId;
CHAR ImageFileName[16];
LIST_ENTRY ThreadListHead;
ACCESS_MASK GrantedAccess;
ULONG DefaultHardErrorProcessing;
PPEB ProcessEnvironmentBlock;
SECURITY_AUDIT_PROCESS_CREATION_INFO AuditProcessCreationInfo;
MMSUPPORT Vm;
union
{
struct
{
ULONG CreateReported:1;
ULONG NoDebugInherit:1;
ULONG ProcessExiting:1;
ULONG ProcessDelete:1;
ULONG Reserved1:1;
ULONG VmDeleted:1;
ULONG OutswapEnabled:1;
ULONG Outswapped:1;
ULONG ForkFailed:1;
ULONG Reserved2:1;
ULONG AddressSpaceInitialized:2;
ULONG SetTimerResolution:1;
ULONG BreakOnTermination:1;
ULONG DeprioritizeViews:1;
ULONG WriteWatch:1;
ULONG ProcessInSession:1;
ULONG OverrideAddressSpace:1;
ULONG HasAddressSpace:1;
ULONG LaunchPrefetched:1;
ULONG InjectInpageErrors:1;
ULONG VmTopDown:1;
ULONG ImageNotifyDone:1;
ULONG PdeUpdateNeeded:1;
ULONG Reserved3:1;
ULONG SmapAllowed:1;
ULONG ProcessInserted:1;
ULONG DefaultIoPriority:3;
ULONG Reserved4:1;
ULONG Reserved5:1;
};
ULONG Flags;
};
XTSTATUS ExitStatus;
UCHAR PriorityClass;
UINT Reserved0;
} EPROCESS, *PEPROCESS;
/* Kernel's representation of a process quota entry*/
typedef struct _EPROCESS_QUOTA_ENTRY
{
SIZE_T Usage;
SIZE_T Limit;
SIZE_T Peak;
SIZE_T Return;
} EPROCESS_QUOTA_ENTRY, *PEPROCESS_QUOTA_ENTRY;
/* Kernel's representation of a process quota block */
typedef struct _EPROCESS_QUOTA_BLOCK
{
EPROCESS_QUOTA_ENTRY QuotaEntry[PsQuotaTypes];
LIST_ENTRY QuotaList;
ULONG ReferenceCount;
ULONG ProcessCount;
} EPROCESS_QUOTA_BLOCK, *PEPROCESS_QUOTA_BLOCK;
/* Kernel's representation of a thread object */
typedef struct _ETHREAD
{
KTHREAD ThreadControlBlock;
ACCESS_MASK GrantedAccess;
UINT Reserved0;
} ETHREAD, *PETHREAD;
/* Kernel's representation of a process environment block */
typedef struct _PEB
{
BOOLEAN InheritedAddressSpace;
BOOLEAN ReadImageFileExecOptions;
BOOLEAN BeingDebugged;
union
{
BOOLEAN BitField;
struct
{
BOOLEAN ImageUsesLargePages:1;
BOOLEAN IsProtectedProcess:1;
BOOLEAN IsLegacyProcess:1;
BOOLEAN IsImageDynamicallyRelocated:1;
BOOLEAN SkipPatchingUser32Forwarders:1;
BOOLEAN SpareBits:3;
};
};
HANDLE Mutant;
PVOID ImageBaseAddress;
PLDR_PEB_DATA Ldr;
PVOID SubSystemData;
PVOID ProcessHeap;
PVOID AltThunkSListPtr;
PVOID SparePtr2;
ULONG EnvironmentUpdateCount;
PVOID KernelCallbackTable;
ULONG SystemReserved[1];
ULONG SpareUlong;
PPEB_FREE_BLOCK FreeList;
ULONG TlsExpansionCounter;
PVOID TlsBitmap;
ULONG TlsBitmapBits[2];
PVOID ReadOnlySharedMemoryBase;
PVOID HotpatchInformation;
PVOID *ReadOnlyStaticServerData;
PVOID AnsiCodePageData;
PVOID OemCodePageData;
PVOID UnicodeCaseTableData;
ULONG NumberOfProcessors;
ULONG GlobalFlag;
LARGE_INTEGER CriticalSectionTimeout;
ULONG_PTR HeapSegmentReserve;
ULONG_PTR HeapSegmentCommit;
ULONG_PTR HeapDeCommitTotalFreeThreshold;
ULONG_PTR HeapDeCommitFreeBlockThreshold;
ULONG NumberOfHeaps;
ULONG MaximumNumberOfHeaps;
PVOID *ProcessHeaps;
PVOID ProcessStarterHelper;
ULONG ImageSubsystem;
ULONG ImageSubsystemMajorVersion;
ULONG ImageSubsystemMinorVersion;
ULONG_PTR ImageProcessAffinityMask;
PVOID TlsExpansionBitmap;
ULONG TlsExpansionBitmapBits[32];
ULONG SessionId;
ULARGE_INTEGER AppCompatFlags;
ULARGE_INTEGER AppCompatFlagsUser;
PVOID pShimData;
PVOID AppCompatInfo;
UNICODE_STRING CSDVersion;
ULONG_PTR MinimumStackCommit;
PVOID *FlsCallback;
LIST_ENTRY FlsListHead;
PVOID FlsBitmap;
ULONG FlsBitmapBits[4];
ULONG FlsHighIndex;
} PEB, *PPEB;
/* Process Environment Block Free Block structure definition */
typedef struct _PEB_FREE_BLOCK
{
PPEB_FREE_BLOCK Next;
ULONG Size;
} PEB_FREE_BLOCK, *PPEB_FREE_BLOCK;
/* Kernel's representation of a thread environment block */
typedef struct _TEB
{
THREAD_INFORMATION_BLOCK ThreadInformationBlock;
PVOID EnvironmentPointer;
CLIENT_ID ClientId;
PVOID ActiveRpcHandle;
PVOID ThreadLocalStoragePointer;
PPEB ProcessEnvironmentBlock;
ULONG LastErrorValue;
ULONG CountOfOwnedCriticalSections;
ULONG UserReserved[5];
LCID CurrentLocale;
ULONG FpSoftwareStatusRegister;
PVOID SystemReserved1[54];
LONG ExceptionCode;
PACTIVATION_CONTEXT_STACK ActivationContextStackPointer;
CLIENT_ID RealClientId;
ULONG LastStatusValue;
UNICODE_STRING StaticUnicodeString;
WCHAR StaticUnicodeBuffer[261];
PVOID DeallocationStack;
PVOID TlsSlots[64];
LIST_ENTRY TlsLinks;
PVOID ReservedForNtRpc;
PVOID DbgSsReserved[2];
ULONG HardErrorMode;
PVOID Instrumentation[14];
PVOID SubProcessTag;
PVOID EtwTraceData;
PVOID WinSockData;
BOOLEAN InDbgPrint;
BOOLEAN FreeStackOnTermination;
BOOLEAN HasFiberData;
UCHAR IdealProcessor;
ULONG GuaranteedStackBytes;
PVOID ReservedForPerf;
PVOID ReservedForOle;
ULONG WaitingOnLoaderLock;
ULONG_PTR SparePointer1;
ULONG_PTR SoftPatchPtr1;
ULONG_PTR SoftPatchPtr2;
PVOID *TlsExpansionSlots;
ULONG ImpersonationLocale;
ULONG IsImpersonating;
PVOID NlsCache;
PVOID ShimData;
ULONG HeapVirtualAffinity;
HANDLE CurrentTransactionHandle;
PTEB_ACTIVE_FRAME ActiveFrame;
PVOID FlsData;
BOOLEAN SafeThunkCall;
BOOLEAN BooleanSpare[3];
} TEB, *PTEB;
/* Thread Environment Block Active Frame structure definition */
typedef struct _TEB_ACTIVE_FRAME
{
ULONG Flags;
PTEB_ACTIVE_FRAME Previous;
PTEB_ACTIVE_FRAME_CONTEXT Context;
} TEB_ACTIVE_FRAME, *PTEB_ACTIVE_FRAME;
/* Thread Environment Block Active Frame Context structure definition */
typedef struct _TEB_ACTIVE_FRAME_CONTEXT
{
ULONG Flags;
LPSTR FrameName;
} TEB_ACTIVE_FRAME_CONTEXT, *PTEB_ACTIVE_FRAME_CONTEXT;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_PSTYPES_H */

34
sdk/xtdk/rtlfuncs.h
View File

@@ -15,9 +15,6 @@
#include <rtltypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Runtime Library routines forward references */
XTCLINK
XTAPI
@@ -123,12 +120,6 @@ RtlCopyString(IN PCHAR Destination,
IN PCSTR Source,
IN ULONG Length);
XTCLINK
XTAPI
VOID
RtlCopyUnicodeString(IN OUT PUNICODE_STRING Destination,
IN PCUNICODE_STRING Source);
XTCLINK
XTAPI
VOID
@@ -193,18 +184,6 @@ XTCDECL
VOID
RtlInitializeListHead(IN PLIST_ENTRY ListHead);
XTCLINK
XTAPI
VOID
RtlInitializeUnicodeString(OUT PUNICODE_STRING Destination,
IN PCWSTR Source);
XTCLINK
XTAPI
XTSTATUS
RtlInitializeUnicodeStringEx(OUT PUNICODE_STRING Destination,
IN PCWSTR Source);
XTCLINK
XTCDECL
VOID
@@ -315,18 +294,6 @@ BOOLEAN
RtlTestBit(IN PRTL_BITMAP BitMap,
IN ULONG_PTR Bit);
XTCLINK
XTAPI
XTSTATUS
RtlTimeFieldsToUnixEpoch(IN PTIME_FIELDS TimeFields,
OUT PLONGLONG UnixTime);
XTCLINK
XTAPI
XTSTATUS
RtlTimeFieldsToXtEpoch(IN PTIME_FIELDS TimeFields,
OUT PLARGE_INTEGER XtTime);
XTCLINK
XTAPI
PCHAR
@@ -403,5 +370,4 @@ VOID
RtlZeroMemory(OUT PVOID Destination,
IN SIZE_T Length);
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_RTLFUNCS_H */

242
sdk/xtdk/rtltypes.h
View File

@@ -4,7 +4,6 @@
* FILE: sdk/xtdk/rtltypes.h
* DESCRIPTION: Runtime library structures definitions
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTDK_RTLTYPES_H
@@ -12,160 +11,48 @@
#include <xtbase.h>
#include <xttypes.h>
#include ARCH_HEADER(xtstruct.h)
/* UUID string lengths */
#define GUID_STRING_LENGTH 38
#define PARTUUID_STRING_LENGTH 13
#define GUID_STRING_LENGTH 38
#define PARTUUID_STRING_LENGTH 13
/* Maximum double/integer value string length */
#define MAX_DOUBLE_STRING_SIZE 15
#define MAX_INTEGER_STRING_SIZE 25
#define MAX_DOUBLE_STRING_SIZE 15
#define MAX_INTEGER_STRING_SIZE 25
/* Floating point definitions */
#define DOUBLE_EXPONENT_MASK 0x7FF0000000000000ULL
#define DOUBLE_EXPONENT_SHIFT 0x34
#define DOUBLE_EXPONENT_BIAS 0x3FF
#define DOUBLE_HIGH_VALUE_MASK 0x000FFFFF
#define DOUBLE_HIGH_VALUE_SHIFT 0x20
#define DOUBLE_PRECISION 6
#define DOUBLE_HEX_PRECISION 13
#define DOUBLE_SCIENTIFIC_PRECISION -4
#define DOUBLE_SIGN_BIT 0x8000000000000000ULL
/* Exception Record flags */
#define EXCEPTION_CONTINUE_SEARCH 0x00
#define EXCEPTION_NONCONTINUABLE 0x01
#define EXCEPTION_UNWINDING 0x02
#define EXCEPTION_EXIT_UNWIND 0x04
#define EXCEPTION_STACK_INVALID 0x08
#define EXCEPTION_NESTED_CALL 0x10
#define EXCEPTION_TARGET_UNWIND 0x20
#define EXCEPTION_COLLIDED_UNWIND 0x40
/* Exception Record accessors */
#define EXCEPTION_CODE _exception_code()
#define EXCEPTION_INFORMATION (PEXCEPTION_POINTERS)_exception_info()
/* Maximum number of lead bytes for NLS */
#define NLS_MAXIMUM_LEADBYTES 12
#define DOUBLE_EXPONENT_MASK 0x7FF0000000000000ULL
#define DOUBLE_EXPONENT_SHIFT 0x34
#define DOUBLE_EXPONENT_BIAS 0x3FF
#define DOUBLE_HIGH_VALUE_MASK 0x000FFFFF
#define DOUBLE_HIGH_VALUE_SHIFT 0x20
#define DOUBLE_PRECISION 6
#define DOUBLE_HEX_PRECISION 13
#define DOUBLE_SCIENTIFIC_PRECISION -4
#define DOUBLE_SIGN_BIT 0x8000000000000000ULL
/* Print flag definitions */
#define PFL_ALWAYS_PRINT_SIGN 0x00000001
#define PFL_SPACE_FOR_PLUS 0x00000002
#define PFL_LEFT_JUSTIFIED 0x00000004
#define PFL_LEADING_ZEROES 0x00000008
#define PFL_LONG_INTEGER 0x00000010
#define PFL_LONG_DOUBLE 0x00000020
#define PFL_WIDE_CHARACTER 0x00000040
#define PFL_SHORT_VALUE 0x00000080
#define PFL_UNSIGNED 0x00000100
#define PFL_UPPERCASE 0x00000200
#define PFL_PRINT_RADIX 0x00000400
#define PFL_FLOAT_FORMAT 0x00000800
#define PFL_SCI_FORMAT 0x00001000
#define PFL_DIGIT_PRECISION 0x00002000
#define PFL_THOUSANDS_GROUPING 0x00004000
/* Red-black tree definitions */
#define RTL_BALANCED_NODE_RESERVED_PARENT_MASK 3
#define RTL_BALANCED_NODE_COLOR_MASK 1
/* Cryptographic related definitions */
#define SHA1_BLOCK_SIZE 64
#define SHA1_DIGEST_SIZE 20
/* Time related definitions */
#define TIME_SECONDS_PER_MINUTE 60
#define TIME_SECONDS_PER_HOUR 3600
#define TIME_SECONDS_PER_DAY 86400
#define TIME_TICKS_PER_SECOND 10000000
#define TIME_TICKS_PER_MILLISECOND 10000
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
#define PFL_ALWAYS_PRINT_SIGN 0x00000001
#define PFL_SPACE_FOR_PLUS 0x00000002
#define PFL_LEFT_JUSTIFIED 0x00000004
#define PFL_LEADING_ZEROES 0x00000008
#define PFL_LONG_INTEGER 0x00000010
#define PFL_LONG_DOUBLE 0x00000020
#define PFL_WIDE_CHARACTER 0x00000040
#define PFL_SHORT_VALUE 0x00000080
#define PFL_UNSIGNED 0x00000100
#define PFL_UPPERCASE 0x00000200
#define PFL_PRINT_RADIX 0x00000400
#define PFL_FLOAT_FORMAT 0x00000800
#define PFL_SCI_FORMAT 0x00001000
#define PFL_DIGIT_PRECISION 0x00002000
#define PFL_THOUSANDS_GROUPING 0x00004000
/* Runtime Library routine callbacks */
typedef XTSTATUS (*PWRITE_CHARACTER)(IN CHAR Character);
typedef XTSTATUS (*PWRITE_WIDE_CHARACTER)(IN WCHAR Character);
/* Compressed data information structure definition */
typedef struct _COMPRESSED_DATA_INFO
{
USHORT CompressionFormatAndEngine;
UCHAR CompressionUnitShift;
UCHAR ChunkShift;
UCHAR ClusterShift;
UCHAR Reserved;
USHORT NumberOfChunks;
ULONG CompressedChunkSizes[1];
} COMPRESSED_DATA_INFO, *PCOMPRESSED_DATA_INFO;
/* Code page table structure definition */
typedef struct _CPTABLE_INFO
{
USHORT CodePage;
USHORT MaximumCharacterSize;
USHORT DefaultChar;
USHORT UniDefaultChar;
USHORT TransDefaultChar;
USHORT TransUniDefaultChar;
USHORT DBCSCodePage;
UCHAR LeadByte[NLS_MAXIMUM_LEADBYTES];
PUSHORT MultiByteTable;
PVOID WideCharTable;
PUSHORT DBCSRanges;
PUSHORT DBCSOffsets;
} CPTABLE_INFO, *PCPTABLE_INFO;
/* Exception Pointers structure definition */
typedef struct _EXCEPTION_POINTERS
{
PEXCEPTION_RECORD ExceptionRecord;
PCONTEXT ContextRecord;
} EXCEPTION_POINTERS, *PEXCEPTION_POINTERS;
/* 128-bit buffer containing a unique identifier value */
typedef struct _GUID
{
UINT Data1;
USHORT Data2;
USHORT Data3;
UCHAR Data4[8];
} GUID, *PGUID;
/* 32-bit double linked list structure definition */
typedef struct _LIST_ENTRY32
{
ULONG Flink;
ULONG Blink;
} LIST_ENTRY32, *PLIST_ENTRY32;
/* 64-bit double linked list structure definition */
typedef struct _LIST_ENTRY64
{
ULONGLONG Flink;
ULONGLONG Blink;
} LIST_ENTRY64, *PLIST_ENTRY64;
/* NLS table structure definition */
typedef struct _NLSTABLE_INFO
{
CPTABLE_INFO OemTableInfo;
CPTABLE_INFO AnsiTableInfo;
PUSHORT UpperCaseTable;
PUSHORT LowerCaseTable;
} NLSTABLE_INFO, *PNLSTABLE_INFO;
/* Red-black tree node color enumeration list */
typedef enum _RTL_BALANCED_NODE_COLOR
{
NodeBlack,
NodeRed
} RTL_BALANCED_NODE_COLOR, *PRTL_BALANCED_NODE_COLOR;
/* Variable types enumeration list */
typedef enum _RTL_VARIABLE_TYPE
{
@@ -182,44 +69,6 @@ typedef enum _RTL_VARIABLE_TYPE
TypeWideString
} RTL_VARIABLE_TYPE, *PRTL_VARIABLE_TYPE;
/* Activation context stack structure definition */
typedef struct _ACTIVATION_CONTEXT_STACK
{
PRTL_ACTIVATION_CONTEXT_STACK_FRAME ActiveFrame;
LIST_ENTRY FrameListCache;
ULONG Flags;
ULONG NextCookieSequenceNumber;
ULONG StackId;
} ACTIVATION_CONTEXT_STACK, *PACTIVATION_CONTEXT_STACK;
/* Activation context stack frame structure definition */
typedef struct _RTL_ACTIVATION_CONTEXT_STACK_FRAME
{
PRTL_ACTIVATION_CONTEXT_STACK_FRAME Previous;
PVOID ActivationContext;
ULONG Flags;
} RTL_ACTIVATION_CONTEXT_STACK_FRAME, *PRTL_ACTIVATION_CONTEXT_STACK_FRAME;
/* Runtime Library red-black tree balanced node structure definition */
typedef struct _RTL_BALANCED_NODE
{
union
{
PRTL_BALANCED_NODE Children[2];
struct
{
PRTL_BALANCED_NODE Left;
PRTL_BALANCED_NODE Right;
};
};
union
{
UCHAR Red:1;
UCHAR Balance:2;
ULONG_PTR ParentValue;
};
} RTL_BALANCED_NODE, *PRTL_BALANCED_NODE;
/* Bit Map structure definition */
typedef struct _RTL_BITMAP
{
@@ -246,39 +95,4 @@ typedef struct _RTL_PRINT_FORMAT_PROPERTIES
LONG Flags;
} RTL_PRINT_FORMAT_PROPERTIES, *PRTL_PRINT_FORMAT_PROPERTIES;
/* Runtime Library red-black tree structure definition */
typedef struct _RTL_RB_TREE
{
PRTL_BALANCED_NODE Root;
PRTL_BALANCED_NODE Min;
} RTL_RB_TREE, *PRTL_RB_TREE;
/* Runtime Library SHA-1 context structure definition */
typedef struct _RTL_SHA1_CONTEXT
{
ULONG State[5];
ULONG Count[2];
UCHAR Buffer[SHA1_BLOCK_SIZE];
} RTL_SHA1_CONTEXT, *PRTL_SHA1_CONTEXT;
/* Single linked list structure definition */
typedef struct _SINGLE_LIST_ENTRY
{
PSINGLE_LIST_ENTRY Next;
} SINGLE_LIST_ENTRY, *PSINGLE_LIST_ENTRY;
/* Runtime time fields structure definition */
typedef struct _TIME_FIELDS
{
SHORT Year;
SHORT Month;
SHORT Day;
SHORT Hour;
SHORT Minute;
SHORT Second;
SHORT Milliseconds;
SHORT Weekday;
} TIME_FIELDS, *PTIME_FIELDS;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_RTLTYPES_H */

264
sdk/xtdk/setypes.h
View File

@@ -1,264 +0,0 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: sdk/xtdk/setypes.h
* DESCRIPTION: Kernel Security structures and definitions
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#ifndef __XTDK_SETYPES_H
#define __XTDK_SETYPES_H
#include <xttypes.h>
#include <xtstruct.h>
#include <xtbase.h>
/* Privilege LUIDs */
#define SE_LUID_MIN_WELL_KNOWN_PRIVILEGE (LUID){2, 0}
#define SE_LUID_CREATE_TOKEN_PRIVILEGE (LUID){2, 0}
#define SE_LUID_ASSIGNPRIMARYTOKEN_PRIVILEGE (LUID){3, 0}
#define SE_LUID_LOCK_MEMORY_PRIVILEGE (LUID){4, 0}
#define SE_LUID_INCREASE_QUOTA_PRIVILEGE (LUID){5, 0}
#define SE_LUID_MACHINE_ACCOUNT_PRIVILEGE (LUID){6, 0}
#define SE_LUID_TCB_PRIVILEGE (LUID){7, 0}
#define SE_LUID_SECURITY_PRIVILEGE (LUID){8, 0}
#define SE_LUID_TAKE_OWNERSHIP_PRIVILEGE (LUID){9, 0}
#define SE_LUID_LOAD_DRIVER_PRIVILEGE (LUID){10, 0}
#define SE_LUID_SYSTEM_PROFILE_PRIVILEGE (LUID){11, 0}
#define SE_LUID_SYSTEMTIME_PRIVILEGE (LUID){12, 0}
#define SE_LUID_PROF_SINGLE_PROCESS_PRIVILEGE (LUID){13, 0}
#define SE_LUID_INC_BASE_PRIORITY_PRIVILEGE (LUID){14, 0}
#define SE_LUID_CREATE_PAGEFILE_PRIVILEGE (LUID){15, 0}
#define SE_LUID_CREATE_PERMANENT_PRIVILEGE (LUID){16, 0}
#define SE_LUID_BACKUP_PRIVILEGE (LUID){17, 0}
#define SE_LUID_RESTORE_PRIVILEGE (LUID){18, 0}
#define SE_LUID_SHUTDOWN_PRIVILEGE (LUID){19, 0}
#define SE_LUID_DEBUG_PRIVILEGE (LUID){20, 0}
#define SE_LUID_AUDIT_PRIVILEGE (LUID){21, 0}
#define SE_LUID_SYSTEM_ENVIRONMENT_PRIVILEGE (LUID){22, 0}
#define SE_LUID_CHANGE_NOTIFY_PRIVILEGE (LUID){23, 0}
#define SE_LUID_REMOTE_SHUTDOWN_PRIVILEGE (LUID){24, 0}
#define SE_LUID_UNDOCK_PRIVILEGE (LUID){25, 0}
#define SE_LUID_SYNC_AGENT_PRIVILEGE (LUID){26, 0}
#define SE_LUID_ENABLE_DELEGATION_PRIVILEGE (LUID){27, 0}
#define SE_LUID_MANAGE_VOLUME_PRIVILEGE (LUID){28, 0}
#define SE_LUID_IMPERSONATE_PRIVILEGE (LUID){29, 0}
#define SE_LUID_CREATE_GLOBAL_PRIVILEGE (LUID){30, 0}
#define SE_LUID_TRUSTED_CREDMAN_ACCESS_PRIVILEGE (LUID){31, 0}
#define SE_LUID_RELABEL_PRIVILEGE (LUID){32, 0}
#define SE_LUID_INC_WORKING_SET_PRIVILEGE (LUID){33, 0}
#define SE_LUID_TIME_ZONE_PRIVILEGE (LUID){34, 0}
#define SE_LUID_CREATE_SYMBOLIC_LINK_PRIVILEGE (LUID){35, 0}
/* Standard Access Rights definitions */
#define SE_DELETE 0x00010000L
#define SE_READ_CONTROL 0x00020000L
#define SE_WRITE_DAC 0x00040000L
#define SE_WRITE_OWNER 0x00080000L
#define SE_SYNCHRONIZE 0x00100000L
#define SE_STANDARD_RIGHTS_REQUIRED 0x000F0000L
#define SE_STANDARD_RIGHTS_READ SE_READ_CONTROL
#define SE_STANDARD_RIGHTS_WRITE SE_READ_CONTROL
#define SE_STANDARD_RIGHTS_EXECUTE SE_READ_CONTROL
#define SE_STANDARD_RIGHTS_ALL 0x001F0000L
#define SE_SPECIFIC_RIGHTS_ALL 0x0000FFFFL
#define SE_ACCESS_SYSTEM_SECURITY 0x01000000L
#define SE_MAXIMUM_ALLOWED 0x02000000L
/* Generic access rights definitions */
#define SE_GENERIC_ALL 0x10000000L
#define SE_GENERIC_EXECUTE 0x20000000L
#define SE_GENERIC_WRITE 0x40000000L
#define SE_GENERIC_READ 0x80000000L
/* Process access rights definitions */
#define SE_PROCESS_TERMINATE 0x0001
#define SE_PROCESS_CREATE_THREAD 0x0002
#define SE_PROCESS_SET_SESSIONID 0x0004
#define SE_PROCESS_VM_OPERATION 0x0008
#define SE_PROCESS_VM_READ 0x0010
#define SE_PROCESS_VM_WRITE 0x0020
#define SE_PROCESS_DUP_HANDLE 0x0040
#define SE_PROCESS_CREATE_PROCESS 0x0080
#define SE_PROCESS_SET_QUOTA 0x0100
#define SE_PROCESS_SET_INFORMATION 0x0200
#define SE_PROCESS_QUERY_INFORMATION 0x0400
#define SE_PROCESS_SUSPEND_RESUME 0x0800
#define SE_PROCESS_QUERY_LIMITED_INFORMATION 0x1000
/* Process full control access mask */
#define SE_PROCESS_ALL_ACCESS (SE_STANDARD_RIGHTS_REQUIRED | SE_SYNCHRONIZE | 0xFFFF)
/* Thread access rights definitions */
#define SE_THREAD_TERMINATE 0x0001
#define SE_THREAD_SUSPEND_RESUME 0x0002
#define SE_THREAD_ALERT 0x0004
#define SE_THREAD_GET_CONTEXT 0x0008
#define SE_THREAD_SET_CONTEXT 0x0010
#define SE_THREAD_SET_INFORMATION 0x0020
#define SE_THREAD_QUERY_INFORMATION 0x0040
#define SE_THREAD_SET_THREAD_TOKEN 0x0080
#define SE_THREAD_IMPERSONATE 0x0100
#define SE_THREAD_DIRECT_IMPERSONATION 0x0200
/* Thread full control access mask */
#define SE_THREAD_ALL_ACCESS (SE_STANDARD_RIGHTS_REQUIRED | SE_SYNCHRONIZE | 0xFFFF)
/* Object full control access mask */
#define SE_OBJECT_TYPE_ALL_ACCESS (SE_STANDARD_RIGHTS_REQUIRED | 0x1)
/* Default security quota */
#define SE_DEFAULT_SECURITY_QUOTA 2048
#define SE_INITIAL_PRIVILEGE_COUNT 3
/* Token source length */
#define SE_TOKEN_SOURCE_LENGTH 8
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Security impersonation levels */
typedef enum _SECURITY_IMPERSONATION_LEVEL
{
SecurityAnonymous,
SecurityIdentification,
SecurityImpersonation,
SecurityDelegation
} SECURITY_IMPERSONATION_LEVEL, *PSECURITY_IMPERSONATION_LEVEL;
/* Security operation codes */
typedef enum _SECURITY_OPERATION_CODE
{
SetSecurityDescriptor,
QuerySecurityDescriptor,
DeleteSecurityDescriptor,
AssignSecurityDescriptor
} SECURITY_OPERATION_CODE, *PSECURITY_OPERATION_CODE;
/* Generic security mapping structure definition */
typedef struct _GENERIC_MAPPING
{
ULONG GenericRead;
ULONG GenericWrite;
ULONG GenericExecute;
ULONG GenericAll;
} GENERIC_MAPPING, *PGENERIC_MAPPING;
/* LUID and attributes structure definition */
typedef struct _LUID_AND_ATTRIBUTES
{
LUID Luid;
ULONG Attributes;
} LUID_AND_ATTRIBUTES, *PLUID_AND_ATTRIBUTES;
/* Initial privilege set structure definition */
typedef struct _INITIAL_PRIVILEGE_SET
{
ULONG PrivilegeCount;
ULONG Control;
LUID_AND_ATTRIBUTES Privilege[SE_INITIAL_PRIVILEGE_COUNT];
} INITIAL_PRIVILEGE_SET, * PINITIAL_PRIVILEGE_SET;
/* Privilege set structure definition */
typedef struct _PRIVILEGE_SET
{
ULONG PrivilegeCount;
ULONG Control;
LUID_AND_ATTRIBUTES Privilege[1];
} PRIVILEGE_SET, *PPRIVILEGE_SET;
/* Security audit process creation information structure definition */
typedef struct _SECURITY_AUDIT_PROCESS_CREATION_INFO
{
POBJECT_NAME_INFORMATION ImageFileName;
} SECURITY_AUDIT_PROCESS_CREATION_INFO, *PSECURITY_AUDIT_PROCESS_CREATION_INFO;
/* Identifier authority structure definition */
typedef struct _SID_IDENTIFIER_AUTHORITY
{
UCHAR Value[6];
} SID_IDENTIFIER_AUTHORITY,*PSID_IDENTIFIER_AUTHORITY;
/* Security identifier structure definition */
typedef struct _SID
{
UCHAR Revision;
UCHAR SubAuthorityCount;
SID_IDENTIFIER_AUTHORITY IdentifierAuthority;
ULONG SubAuthority[1];
} SID, *PSID;
/* Token source structure definition */
typedef struct _TOKEN_SOURCE
{
CHAR SourceName[SE_TOKEN_SOURCE_LENGTH];
LUID SourceIdentifier;
} TOKEN_SOURCE, *PTOKEN_SOURCE;
/* Token control structure definition */
typedef struct _TOKEN_CONTROL
{
LUID TokenId;
LUID AuthenticationId;
LUID ModifiedId;
TOKEN_SOURCE TokenSource;
} TOKEN_CONTROL, *PTOKEN_CONTROL;
/* Security quality of service structure definition */
typedef struct _SECURITY_QUALITY_OF_SERVICE
{
ULONG Length;
SECURITY_IMPERSONATION_LEVEL ImpersonationLevel;
SECURITY_CONTEXT_TRACKING_MODE ContextTrackingMode;
BOOLEAN EffectiveOnly;
} SECURITY_QUALITY_OF_SERVICE, *PSECURITY_QUALITY_OF_SERVICE;
/* Security client context structure definition */
typedef struct _SECURITY_CLIENT_CONTEXT
{
SECURITY_QUALITY_OF_SERVICE SecurityQos;
PACCESS_TOKEN ClientToken;
BOOLEAN DirectlyAccessClientToken;
BOOLEAN DirectAccessEffectiveOnly;
BOOLEAN ServerIsRemote;
TOKEN_CONTROL ClientTokenControl;
} SECURITY_CLIENT_CONTEXT, *PSECURITY_CLIENT_CONTEXT;
/* Security subject context structure definition */
typedef struct _SECURITY_SUBJECT_CONTEXT
{
PACCESS_TOKEN ClientToken;
SECURITY_IMPERSONATION_LEVEL ImpersonationLevel;
PACCESS_TOKEN PrimaryToken;
PVOID ProcessAuditId;
} SECURITY_SUBJECT_CONTEXT, *PSECURITY_SUBJECT_CONTEXT;
/* Access state structure definition */
typedef struct _ACCESS_STATE
{
LUID OperationID;
BOOLEAN SecurityEvaluated;
BOOLEAN GenerateAudit;
BOOLEAN GenerateOnClose;
BOOLEAN PrivilegesAllocated;
ULONG Flags;
ACCESS_MASK RemainingDesiredAccess;
ACCESS_MASK PreviouslyGrantedAccess;
ACCESS_MASK OriginalDesiredAccess;
SECURITY_SUBJECT_CONTEXT SubjectSecurityContext;
PSECURITY_DESCRIPTOR SecurityDescriptor;
PVOID AuxData;
union
{
INITIAL_PRIVILEGE_SET InitialPrivilegeSet;
PRIVILEGE_SET PrivilegeSet;
} Privileges;
BOOLEAN AuditPrivileges;
UNICODE_STRING ObjectName;
UNICODE_STRING ObjectTypeName;
} ACCESS_STATE, *PACCESS_STATE;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_SETYPES_H */

92
sdk/xtdk/xtbase.h
View File

@@ -14,15 +14,6 @@
#include <xttypes.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Access mask */
typedef ULONG ACCESS_MASK, *PACCESS_MASK;
/* Device type */
typedef ULONG DEVICE_TYPE;
/* Kernel affinity */
typedef ULONG_PTR KAFFINITY, *PKAFFINITY;
@@ -38,29 +29,80 @@ typedef UCHAR KRUNLEVEL, *PKRUNLEVEL;
/* Spin locks synchronization mechanism */
typedef ULONG_PTR KSPIN_LOCK, *PKSPIN_LOCK;
/* Locale identifier */
typedef ULONG LCID;
/* Access token */
typedef PVOID PACCESS_TOKEN;
/* Page Frame Number count */
typedef ULONG PFN_COUNT;
/* Page Frame Number */
typedef ULONG_PTR PFN_NUMBER, *PPFN_NUMBER;
/* Physical address */
typedef LARGE_INTEGER PHYSICAL_ADDRESS, *PPHYSICAL_ADDRESS;
/* Security descriptor */
typedef PVOID PSECURITY_DESCRIPTOR;
/* 128-bit buffer containing a unique identifier value */
typedef struct _GUID
{
UINT Data1;
USHORT Data2;
USHORT Data3;
UCHAR Data4[8];
} GUID, *PGUID;
/* Security context tracking mode */
typedef BOOLEAN SECURITY_CONTEXT_TRACKING_MODE, *PSECURITY_CONTEXT_TRACKING_MODE;
/* Double linked list structure definition */
typedef struct _LIST_ENTRY
{
PLIST_ENTRY Flink;
PLIST_ENTRY Blink;
} LIST_ENTRY, *PLIST_ENTRY;
/* Security information */
typedef ULONG SECURITY_INFORMATION, *PSECURITY_INFORMATION;
/* 32-bit double linked list structure definition */
typedef struct _LIST_ENTRY32
{
ULONG Flink;
ULONG Blink;
} LIST_ENTRY32, *PLIST_ENTRY32;
/* 64-bit double linked list structure definition */
typedef struct _LIST_ENTRY64
{
ULONGLONG Flink;
ULONGLONG Blink;
} LIST_ENTRY64, *PLIST_ENTRY64;
/* Single linked list structure definition */
typedef struct _SINGLE_LIST_ENTRY
{
PSINGLE_LIST_ENTRY Next;
} SINGLE_LIST_ENTRY, *PSINGLE_LIST_ENTRY;
/* Header for a sequenced single linked list union definition */
typedef union _SINGLE_LIST_HEADER
{
ULONGLONG Alignment;
struct
{
SINGLE_LIST_ENTRY Next;
USHORT Depth;
USHORT Sequence;
};
} SINGLE_LIST_HEADER, *PSINGLE_LIST_HEADER;
/* 128-bit 16-byte aligned XMM register */
typedef struct _M128
{
ULONGLONG Low;
LONGLONG High;
} ALIGN(16) M128, *PM128;
/* Dispatcher object header structure definition */
typedef struct _DISPATCHER_HEADER
{
UCHAR Type;
union
{
UCHAR Absolute;
UCHAR NpxIrql;
};
UCHAR Inserted;
BOOLEAN DebugActive;
LONG SignalState;
LIST_ENTRY WaitListHead;
} DISPATCHER_HEADER, *PDISPATCHER_HEADER;
#endif /* __XTOS_ASSEMBLER_ */
#endif /* __XTDK_XTBASE_H */

22
sdk/xtdk/xtcompat.h
View File

@@ -10,20 +10,10 @@
#define __XTDK_XTCOMPAT_H
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
#ifdef __cplusplus
/* C++ definitions */
#define NULLPTR nullptr
#define VIRTUAL virtual
#define XTCLINK extern "C"
#define XTSYMBOL(Name) __asm__(Name)
/* C++ attributes */
#define MUSTCHECK [[nodiscard]]
#define NORETURN [[noreturn]]
#define UNUSED [[maybe_unused]]
#define NULLPTR nullptr
/* C++ boolean type */
typedef bool BOOLEAN, *PBOOLEAN;
@@ -34,15 +24,8 @@
typedef wchar_t wchar;
#else
/* C definitions */
#define NULLPTR ((void *)0)
#define VIRTUAL
#define XTCLINK
#define XTSYMBOL(Name)
/* C attributes */
#define MUSTCHECK __attribute__((warn_unused_result))
#define NORETURN __attribute__((noreturn))
#define UNUSED __attribute__((unused))
#define NULLPTR ((void *)0)
/* C boolean type */
typedef enum _BOOLEAN
@@ -55,5 +38,4 @@
typedef unsigned short wchar;
#endif
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTCOMPAT_H */

2
sdk/xtdk/xtdebug.h
View File

@@ -23,7 +23,7 @@
#define DebugPrint(Format, ...) DbgPrint(Format, __VA_ARGS__);
#else
#define DEBUG 0
#define DebugPrint(Format, ...) ((VOID)NULLPTR)
#define DebugPrint(Format, ...) ((VOID)NULL)
#endif
#endif /* __XTDK_XTDEBUG_H */

16
sdk/xtdk/xtdefs.h
View File

@@ -34,7 +34,6 @@
#define MAXCHAR 0x7F
#define MINSHORT 0x8000
#define MAXSHORT 0x7FFF
#define MAXUSHORT 0xFFFF
#define MINLONG 0x80000000
#define MAXLONG 0x7FFFFFFF
#define MAXULONG 0xFFFFFFFF
@@ -59,10 +58,6 @@
/* Macro for calculating size of an array */
#define ARRAY_SIZE(Array) (sizeof(Array) / sizeof(*Array))
/* Macros for converting Binary Coded Decimal (BCD) into decimal and vice versa */
#define BCD_TO_DECIMAL(Value) (((Value) & 0x0F) + (((Value) >> 4) * 10))
#define DECIMAL_TO_BCD(Value) ((((Value) / 10) << 4) | ((Value) % 10))
/* Macros for concatenating two strings */
#define CONCAT_STRING(Str1, Str2) Str1##Str2
#define CONCATENATE(Str1, Str2) CONCAT_STRING(Str1, Str2)
@@ -79,20 +74,12 @@
/* Macro for calculating size of a field in the structure */
#define FIELD_SIZE(Structure, Field) (sizeof(((Structure *)0)->Field))
/* Macros for calculating minimum and maximum of two values */
#define MIN(A, B) (((A) < (B)) ? (A) : (B))
#define MAX(A, B) (((A) > (B)) ? (A) : (B))
/* Macro that page-aligns a virtual address */
#define PAGE_ALIGN(VirtualAddress) ((PVOID)((ULONG_PTR)VirtualAddress & ~MM_PAGE_MASK))
/* Macro that returns offset of the virtual address */
#define PAGE_OFFSET(VirtualAddress) ((ULONG)((ULONG_PTR)VirtualAddress & MM_PAGE_MASK))
/* Macros for bitwise rotating */
#define ROTATE_LEFT(Value, Count) ((Value << Count) | (Value >> (32 - Count)))
#define ROTATE_RIGHT(Value, Count) ((Value >> Count) | (Value << (32 - Count)))
/* Macro for rounding down */
#define ROUND_DOWN(Value, Alignment) ((Value) & ~((Alignment) - 1))
@@ -116,7 +103,8 @@
#define UNIQUE(Prefix) CONCATENATE(CONCATENATE(__UNIQUE_ID_, Prefix), __COUNTER__)
/* Variadic ABI functions */
#define VA_ARG(Marker, Type) ((sizeof(Type) < sizeof(UINT_PTR)) ? \
typedef __builtin_va_list VA_LIST, *PVA_LIST;
#define VA_ARG(Marker, Type) ((sizeof (Type) < sizeof(UINT_PTR)) ? \
(Type)(__builtin_va_arg(Marker, UINT_PTR)) : \
(Type)(__builtin_va_arg(Marker, Type)))
#define VA_COPY(Dest, Start) __builtin_va_copy(Dest, Start)

4
sdk/xtdk/xtfont.h
View File

@@ -13,9 +13,6 @@
#include <xtdefs.h>
/* C/C++ specific code */
#ifndef D__XTOS_ASSEMBLER__
/* SSF2 font header */
typedef struct _SSFN_FONT_HEADER
{
@@ -3983,5 +3980,4 @@ UCHAR XtFbDefaultFont[] = {0x78, 0x74, 0x66, 0x6E, 0x3B, 0xE7, 0x00, 0x00, 0x03,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0x82, 0x32, 0x4E, 0x46, 0x53};
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTFONT_H */

6
sdk/xtdk/xtfw.h
View File

@@ -19,10 +19,6 @@
/* Version number of the current XTOS loader protocol */
#define BOOT_PROTOCOL_VERSION 1
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Memory allocation structures */
typedef enum _LOADER_MEMORY_TYPE
{
@@ -111,7 +107,6 @@ typedef struct _KERNEL_INITIALIZATION_BLOCK
ULONG BlockVersion;
ULONG ProtocolVersion;
PWCHAR KernelParameters;
PFN_NUMBER BootImageSize;
LIST_ENTRY LoadOrderListHead;
LIST_ENTRY MemoryDescriptorListHead;
LIST_ENTRY BootDriverListHead;
@@ -120,5 +115,4 @@ typedef struct _KERNEL_INITIALIZATION_BLOCK
FIRMWARE_INFORMATION_BLOCK FirmwareInformation;
} KERNEL_INITIALIZATION_BLOCK, *PKERNEL_INITIALIZATION_BLOCK;
#endif /* __XTOS_ASSEMBLER_ */
#endif /* __XTDK_XTFW_H */

4
sdk/xtdk/xtglyph.h
View File

@@ -12,9 +12,6 @@
#include <xttypes.h>
/* C/C++ specific code */
#ifndef D__XTOS_ASSEMBLER__
CHAR XTGLYPH_EXECTOS_LOGO[] =
{
0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x25, 0x23,
@@ -64,5 +61,4 @@ CHAR XTGLYPH_EXECTOS_LOGO[] =
0x28, 0x0d, 0x0a
};
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTGLYPH_H */

5
sdk/xtdk/xtimage.h
View File

@@ -202,10 +202,6 @@
#define PECOFF_IMAGE_SCN_MEM_READ 0x40000000
#define PECOFF_IMAGE_SCN_MEM_WRITE 0x80000000
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* PE/COFF image representation structure */
typedef struct _PECOFF_IMAGE_CONTEXT
{
@@ -642,5 +638,4 @@ typedef struct _PECOFF_IMAGE_RESOURCE_DATA_ENTRY
ULONG Reserved;
} PECOFF_IMAGE_RESOURCE_DATA_ENTRY, *PPECOFF_IMAGE_RESOURCE_DATA_ENTRY;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTIMAGE_H */

6
sdk/xtdk/xtkmapi.h
View File

@@ -28,34 +28,28 @@
#include <xtuefi.h>
/* Low level data types headers */
#include <cmtypes.h>
#include <extypes.h>
#include <hltypes.h>
#include <iotypes.h>
#include <kdtypes.h>
#include <ketypes.h>
#include <ldrtypes.h>
#include <lpctypes.h>
#include <mmtypes.h>
#include <obtypes.h>
#include <potypes.h>
#include <pstypes.h>
#include <rtltypes.h>
#include <setypes.h>
/* Architecture-specific low level data types headers */
#include ARCH_HEADER(artypes.h)
#include ARCH_HEADER(hltypes.h)
#include ARCH_HEADER(ketypes.h)
#include ARCH_HEADER(mmtypes.h)
#include ARCH_HEADER(rtltypes.h)
/* XT routines */
#include <exfuncs.h>
#include <hlfuncs.h>
#include <kdfuncs.h>
#include <kefuncs.h>
#include <mmfuncs.h>
#include <rtlfuncs.h>
/* Architecture specific XT routines */

27
sdk/xtdk/xtstatus.h
View File

@@ -48,20 +48,6 @@
/* XT status code definitions */
#define STATUS_SUCCESS ((XTSTATUS) 0x00000000L)
#define STATUS_WAIT_0 ((XTSTATUS) 0x00000000L)
#define STATUS_WAIT_1 ((XTSTATUS) 0x00000001L)
#define STATUS_WAIT_2 ((XTSTATUS) 0x00000002L)
#define STATUS_WAIT_3 ((XTSTATUS) 0x00000003L)
#define STATUS_WAIT_63 ((XTSTATUS) 0x0000003FL)
#define STATUS_ABANDONED ((XTSTATUS) 0x00000080L)
#define STATUS_ABANDONED_WAIT_0 ((XTSTATUS) 0x00000080L)
#define STATUS_ABANDONED_WAIT_63 ((XTSTATUS) 0x000000BFL)
#define STATUS_ALERTED ((XTSTATUS) 0x00000101L)
#define STATUS_TIMEOUT ((XTSTATUS) 0x00000102L)
#define STATUS_PENDING ((XTSTATUS) 0x00000103L)
#define STATUS_REPARSE ((XTSTATUS) 0x00000104L)
#define STATUS_DATATYPE_MISALIGNMENT ((XTSTATUS) 0x80000002L)
#define STATUS_WAKE_SYSTEM_DEBUGGER ((XTSTATUS) 0x80000007L)
#define STATUS_END_OF_MEDIA ((XTSTATUS) 0x8000001EL)
#define STATUS_RESOURCE_LOCKED ((XTSTATUS) 0xC0000000L)
#define STATUS_UNSUCCESSFUL ((XTSTATUS) 0xC0000001L)
@@ -73,24 +59,13 @@
#define STATUS_INVALID_PARAMETER ((XTSTATUS) 0xC000000DL)
#define STATUS_END_OF_FILE ((XTSTATUS) 0xC0000011L)
#define STATUS_NO_MEMORY ((XTSTATUS) 0xC0000017L)
#define STATUS_ACCESS_DENIED ((XTSTATUS) 0xC0000022L)
#define STATUS_BUFFER_TOO_SMALL ((XTSTATUS) 0xC0000023L)
#define STATUS_OBJECT_TYPE_MISMATCH ((XTSTATUS) 0xC0000024L)
#define STATUS_OBJECT_NAME_INVALID ((XTSTATUS) 0xC0000033L)
#define STATUS_OBJECT_NAME_COLLISION ((XTSTATUS) 0xC0000035L)
#define STATUS_PORT_DISCONNECTED ((XTSTATUS) 0xC0000037L)
#define STATUS_CRC_ERROR ((XTSTATUS) 0xC000003FL)
#define STATUS_QUOTA_EXCEEDED ((XTSTATUS) 0xC0000044L)
#define STATUS_PRIVILEGE_NOT_HELD ((XTSTATUS) 0xC0000061L)
#define STATUS_FLOAT_OVERFLOW ((XTSTATUS) 0xC0000091L)
#define STATUS_INTEGER_OVERFLOW ((XTSTATUS) 0xC0000095L)
#define STATUS_INSUFFICIENT_RESOURCES ((XTSTATUS) 0xC000009AL)
#define STATUS_DEVICE_NOT_READY ((XTSTATUS) 0xC00000A3L)
#define STATUS_NOT_SUPPORTED ((XTSTATUS) 0xC00000BBL)
#define STATUS_NAME_TOO_LONG ((XTSTATUS) 0xC0000106L)
#define STATUS_PAGEFILE_QUOTA_EXCEEDED ((XTSTATUS) 0xC000012CL)
#define STATUS_TIMEOUT ((XTSTATUS) 0x00000102L)
#define STATUS_IO_DEVICE_ERROR ((XTSTATUS) 0xC0000185L)
#define STATUS_MUTEX_LIMIT_EXCEEDED ((XTSTATUS) 0xC0000191L)
#define STATUS_NOT_FOUND ((XTSTATUS) 0xC0000225L)
#endif /* __XTDK_XTSTATUS_H */

172
sdk/xtdk/xtstruct.h
View File

@@ -12,17 +12,8 @@
#include <xtdefs.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Enumeration lists forward references */
typedef enum _ADJUST_REASON ADJUST_REASON, *PADJUST_REASON;
typedef enum _BUS_QUERY_ID_TYPE BUS_QUERY_ID_TYPE, *PBUS_QUERY_ID_TYPE;
typedef enum _DEVICE_POWER_STATE DEVICE_POWER_STATE, *PDEVICE_POWER_STATE;
typedef enum _DEVICE_RELATION_TYPE DEVICE_RELATION_TYPE, *PDEVICE_RELATION_TYPE;
typedef enum _DEVICE_TEXT_TYPE DEVICE_TEXT_TYPE, *PDEVICE_TEXT_TYPE;
typedef enum _DEVICE_USAGE_NOTIFICATION_TYPE DEVICE_USAGE_NOTIFICATION_TYPE, *PDEVICE_USAGE_NOTIFICATION_TYPE;
typedef enum _DIRECTORY_NOTIFY_INFORMATION_CLASS DIRECTORY_NOTIFY_INFORMATION_CLASS, *PDIRECTORY_NOTIFY_INFORMATION_CLASS;
typedef enum _EXCEPTION_DISPOSITION EXCEPTION_DISPOSITION, *PEXCEPTION_DISPOSITION;
typedef enum _EFI_ALLOCATE_TYPE EFI_ALLOCATE_TYPE, *PEFI_ALLOCATE_TYPE;
typedef enum _EFI_FRAMEWORK_CPU_DESIGNATION EFI_FRAMEWORK_CPU_DESIGNATION, *PEFI_FRAMEWORK_CPU_DESIGNATION;
@@ -47,83 +38,40 @@ typedef enum _EFI_TIMER_DELAY EFI_TIMER_DELAY, *PEFI_TIMER_DELAY;
typedef enum _EFI_UART_PARITY_TYPE EFI_UART_PARITY_TYPE, *PEFI_UART_PARITY_TYPE;
typedef enum _EFI_UART_STOP_BITS_TYPE EFI_UART_STOP_BITS_TYPE, *PEFI_UART_STOP_BITS_TYPE;
typedef enum _EFI_UNIVERSA_GRAPHICS_BLT_OPERATION EFI_UNIVERSA_GRAPHICS_BLT_OPERATION, *PEFI_UNIVERSA_GRAPHICS_BLT_OPERATION;
typedef enum _FILE_INFORMATION_CLASS FILE_INFORMATION_CLASS, *PFILE_INFORMATION_CLASS;
typedef enum _FS_INFORMATION_CLASS FS_INFORMATION_CLASS, *PFS_INFORMATION_CLASS;
typedef enum _HAL_APIC_MODE HAL_APIC_MODE, *PHAL_APIC_MODE;
typedef enum _INTERFACE_TYPE INTERFACE_TYPE, *PINTERFACE_TYPE;
typedef enum _IO_ALLOCATION_ACTION IO_ALLOCATION_ACTION, *PIO_ALLOCATION_ACTION;
typedef enum _IRQ_DEVICE_POLICY IRQ_DEVICE_POLICY, *PIRQ_DEVICE_POLICY;
typedef enum _IRQ_PRIORITY IRQ_PRIORITY, *PIRQ_PRIORITY;
typedef enum _KAPC_ENVIRONMENT KAPC_ENVIRONMENT, *PKAPC_ENVIRONMENT;
typedef enum _KCONTINUE_STATUS KCONTINUE_STATUS, *PKCONTINUE_STATUS;
typedef enum _KDPC_IMPORTANCE KDPC_IMPORTANCE, *PKDPC_IMPORTANCE;
typedef enum _KEVENT_TYPE KEVENT_TYPE, *PKEVENT_TYPE;
typedef enum _KOBJECTS KOBJECTS, *PKOBJECTS;
typedef enum _KPROCESS_STATE KPROCESS_STATE, *PKPROCESS_STATE;
typedef enum _KPROFILE_SOURCE KPROFILE_SOURCE, *PKPROFILE_SOURCE;
typedef enum _KTHREAD_STATE KTHREAD_STATE, *PKTHREAD_STATE;
typedef enum _KTIMER_TYPE KTIMER_TYPE, *PKTIMER_TYPE;
typedef enum _KUBSAN_DATA_TYPE KUBSAN_DATA_TYPE, *PKUBSAN_DATA_TYPE;
typedef enum _KWAIT_REASON KWAIT_REASON, *PKWAIT_REASON;
typedef enum _LOADER_MEMORY_TYPE LOADER_MEMORY_TYPE, *PLOADER_MEMORY_TYPE;
typedef enum _MMPAGELISTS MMPAGELISTS, *PMMPAGELISTS;
typedef enum _MMPFN_CACHE_ATTRIBUTE MMPFN_CACHE_ATTRIBUTE, *PMMPFN_CACHE_ATTRIBUTE;
typedef enum _MMPOOL_TYPE MMPOOL_TYPE, *PMMPOOL_TYPE;
typedef enum _MMSYSTEM_PTE_POOL_TYPE MMSYSTEM_PTE_POOL_TYPE, *PMMSYSTEM_PTE_POOL_TYPE;
typedef enum _MODE MODE, *PMODE;
typedef enum _NONPAGED_LOOKASIDE_NUMBER NONPAGED_LOOKASIDE_NUMBER, *PNONPAGED_LOOKASIDE_NUMBER;
typedef enum _OBJECT_HEADER_INFO OBJECT_HEADER_INFO, *POBJECT_HEADER_INFO;
typedef enum _OBJECT_INFORMATION_CLASS OBJECT_INFORMATION_CLASS, *POBJECT_INFORMATION_CLASS;
typedef enum _OBJECT_OPEN_REASON OBJECT_OPEN_REASON, *POBJECT_OPEN_REASON;
typedef enum _POWER_ACTION POWER_ACTION, *PPOWER_ACTION;
typedef enum _POWER_STATE_TYPE POWER_STATE_TYPE, *PPOWER_STATE_TYPE;
typedef enum _PS_QUOTA_TYPE PS_QUOTA_TYPE, *PPS_QUOTA_TYPE;
typedef enum _RTL_BALANCED_NODE_COLOR RTL_BALANCED_NODE_COLOR, *PRTL_BALANCED_NODE_COLOR;
typedef enum _RTL_VARIABLE_TYPE RTL_VARIABLE_TYPE, *PRTL_VARIABLE_TYPE;
typedef enum _SECURITY_IMPERSONATION_LEVEL SECURITY_IMPERSONATION_LEVEL, *PSECURITY_IMPERSONATION_LEVEL;
typedef enum _SECURITY_OPERATION_CODE SECURITY_OPERATION_CODE, *PSECURITY_OPERATION_CODE;
typedef enum _SYSTEM_FIRMWARE_TYPE SYSTEM_FIRMWARE_TYPE, *PSYSTEM_FIRMWARE_TYPE;
typedef enum _SYSTEM_POWER_STATE SYSTEM_POWER_STATE, *PSYSTEM_POWER_STATE;
typedef enum _SYSTEM_RESOURCE_TYPE SYSTEM_RESOURCE_TYPE, *PSYSTEM_RESOURCE_TYPE;
typedef enum _WAIT_TYPE WAIT_TYPE, *PWAIT_TYPE;
typedef enum _WORK_QUEUE_TYPE WORK_QUEUE_TYPE, *PWORK_QUEUE_TYPE;
/* Structures forward references */
typedef struct _ACCESS_STATE ACCESS_STATE, *PACCESS_STATE;
typedef struct _ACPI_CACHE_LIST ACPI_CACHE_LIST, *PACPI_CACHE_LIST;
typedef struct _ACPI_DESCRIPTION_HEADER ACPI_DESCRIPTION_HEADER, *PACPI_DESCRIPTION_HEADER;
typedef struct _ACPI_FADT ACPI_FADT, *PACPI_FADT;
typedef struct _ACPI_HPET ACPI_HPET, *PACPI_HPET;
typedef struct _ACPI_MADT ACPI_MADT, *PACPI_MADT;
typedef struct _ACPI_MADT_INTERRUPT_OVERRIDE ACPI_MADT_INTERRUPT_OVERRIDE, *PACPI_MADT_INTERRUPT_OVERRIDE;
typedef struct _ACPI_MADT_IOAPIC ACPI_MADT_IOAPIC, *PACPI_MADT_IOAPIC;
typedef struct _ACPI_MADT_LOCAL_APIC ACPI_MADT_LOCAL_APIC, *PACPI_MADT_LOCAL_APIC;
typedef struct _ACPI_MADT_LOCAL_X2APIC ACPI_MADT_LOCAL_X2APIC, *PACPI_MADT_LOCAL_X2APIC;
typedef struct _ACPI_MADT_TABLE_LOCAL_APIC ACPI_MADT_TABLE_LOCAL_APIC, *PACPI_MADT_TABLE_LOCAL_APIC;
typedef struct _ACPI_RSDP ACPI_RSDP, *PACPI_RSDP;
typedef struct _ACPI_RSDT ACPI_RSDT, *PACPI_RSDT;
typedef struct _ACPI_SUBTABLE_HEADER ACPI_SUBTABLE_HEADER, *PACPI_SUBTABLE_HEADER;
typedef struct _ACPI_SYSTEM_INFO ACPI_SYSTEM_INFO, *PACPI_SYSTEM_INFO;
typedef struct _ACPI_TIMER_INFO ACPI_TIMER_INFO, *PACPI_TIMER_INFO;
typedef struct _ACPI_XSDT ACPI_XSDT, *PACPI_XSDT;
typedef struct _ACTIVATION_CONTEXT_STACK ACTIVATION_CONTEXT_STACK, *PACTIVATION_CONTEXT_STACK;
typedef struct _ANSI_STRING ANSI_STRING, *PANSI_STRING;
typedef struct _ANSI_STRING32 ANSI_STRING32, *PANSI_STRING32;
typedef struct _ANSI_STRING64 ANSI_STRING64, *PANSI_STRING64;
typedef struct _CLIENT_ID CLIENT_ID, *PCLIENT_ID;
typedef struct _CM_FULL_RESOURCE_DESCRIPTOR CM_FULL_RESOURCE_DESCRIPTOR, *PCM_FULL_RESOURCE_DESCRIPTOR;
typedef struct _CM_PARTIAL_RESOURCE_DESCRIPTOR CM_PARTIAL_RESOURCE_DESCRIPTOR, *PCM_PARTIAL_RESOURCE_DESCRIPTOR;
typedef struct _CM_PARTIAL_RESOURCE_LIST CM_PARTIAL_RESOURCE_LIST, *PCM_PARTIAL_RESOURCE_LIST;
typedef struct _CM_RESOURCE_LIST CM_RESOURCE_LIST, *PCM_RESOURCE_LIST;
typedef struct _COMPRESSED_DATA_INFO COMPRESSED_DATA_INFO, *PCOMPRESSED_DATA_INFO;
typedef struct _CPPORT CPPORT, *PCPPORT;
typedef struct _CPTABLE_INFO CPTABLE_INFO, *PCPTABLE_INFO;
typedef const struct _CMMPAGEMAP_ROUTINES CMMPAGEMAP_ROUTINES, *PCMMPAGEMAP_ROUTINES;
typedef struct _CSTRING CSTRING, *PCSTRING;
typedef struct _DEVICE_CAPABILITIES DEVICE_CAPABILITIES, *PDEVICE_CAPABILITIES;
typedef struct _DEVICE_MAP DEVICE_MAP, *PDEVICE_MAP;
typedef struct _DEVICE_OBJECT DEVICE_OBJECT, *PDEVICE_OBJECT;
typedef struct _DEVOBJ_EXTENSION DEVOBJ_EXTENSION, *PDEVOBJ_EXTENSION;
typedef struct _DRIVER_EXTENSION DRIVER_EXTENSION, *PDRIVER_EXTENSION;
typedef struct _DRIVER_OBJECT DRIVER_OBJECT, *PDRIVER_OBJECT;
typedef struct _EFI_1394_DEVICE_PATH EFI_1394_DEVICE_PATH, *PEFI_1394_DEVICE_PATH;
typedef struct _EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR, *PEFI_ACPI_ADDRESS_SPACE_DESCRIPTOR;
typedef struct _EFI_ACPI_ADR_DEVICE_PATH EFI_ACPI_ADR_DEVICE_PATH, *PEFI_ACPI_ADR_DEVICE_PATH;
@@ -279,61 +227,31 @@ typedef struct _EFI_VENDOR_DEVICE_PATH EFI_VENDOR_DEVICE_PATH, *PEFI_VENDOR_DEVI
typedef struct _EFI_VLAN_DEVICE_PATH EFI_VLAN_DEVICE_PATH, *PEFI_VLAN_DEVICE_PATH;
typedef struct _EFI_WORD_REGS EFI_WORD_REGS, *PEFI_WORD_REGS;
typedef struct _EPROCESS EPROCESS, *PEPROCESS;
typedef struct _EPROCESS_QUOTA_BLOCK EPROCESS_QUOTA_BLOCK, *PEPROCESS_QUOTA_BLOCK;
typedef struct _EPROCESS_QUOTA_ENTRY EPROCESS_QUOTA_ENTRY, *PEPROCESS_QUOTA_ENTRY;
typedef struct _ERESOURCE ERESOURCE, *PERESOURCE;
typedef struct _ETHREAD ETHREAD, *PETHREAD;
typedef struct _EXCEPTION_POINTERS EXCEPTION_POINTERS, *PEXCEPTION_POINTERS;
typedef struct _EX_RUNDOWN_REFERENCE EX_RUNDOWN_REFERENCE, *PEX_RUNDOWN_REFERENCE;
typedef struct _EXCEPTION_RECORD EXCEPTION_RECORD, *PEXCEPTION_RECORD;
typedef struct _EXCEPTION_REGISTRATION_RECORD EXCEPTION_REGISTRATION_RECORD, *PEXCEPTION_REGISTRATION_RECORD;
typedef struct _FAST_IO_DISPATCH FAST_IO_DISPATCH, *PFAST_IO_DISPATCH;
typedef struct _FILE_BASIC_INFORMATION FILE_BASIC_INFORMATION, *PFILE_BASIC_INFORMATION;
typedef struct _FILE_GET_QUOTA_INFORMATION FILE_GET_QUOTA_INFORMATION, *PFILE_GET_QUOTA_INFORMATION;
typedef struct _FILE_NETWORK_OPEN_INFORMATION FILE_NETWORK_OPEN_INFORMATION, *PFILE_NETWORK_OPEN_INFORMATION;
typedef struct _FILE_OBJECT FILE_OBJECT, *PFILE_OBJECT;
typedef struct _FILE_STANDARD_INFORMATION FILE_STANDARD_INFORMATION, *PFILE_STANDARD_INFORMATION;
typedef struct _FIRMWARE_INFORMATION_BLOCK FIRMWARE_INFORMATION_BLOCK, *PFIRMWARE_INFORMATION_BLOCK;
typedef struct _FLOAT128 FLOAT128, *PFLOAT128;
typedef struct _GENERAL_LOOKASIDE GENERAL_LOOKASIDE, *PGENERAL_LOOKASIDE;
typedef struct _GENERIC_ADDRESS GENERIC_ADDRESS, *PGENERIC_ADDRESS;
typedef struct _GENERIC_MAPPING GENERIC_MAPPING, *PGENERIC_MAPPING;
typedef struct _GUID GUID, *PGUID;
typedef struct _HANDLE_TABLE_ENTRY HANDLE_TABLE_ENTRY, *PHANDLE_TABLE_ENTRY;
typedef struct _HANDLE_TABLE_ENTRY_INFO HANDLE_TABLE_ENTRY_INFO, *PHANDLE_TABLE_ENTRY_INFO;
typedef struct _HANDLE_TABLE HANDLE_TABLE, *PHANDLE_TABLE;
typedef struct _HL_FRAMEBUFFER_DATA HL_FRAMEBUFFER_DATA, *PHL_FRAMEBUFFER_DATA;
typedef struct _HL_SCROLL_REGION_DATA HL_SCROLL_REGION_DATA, *PHL_SCROLL_REGION_DATA;
typedef struct _INITIAL_PRIVILEGE_SET INITIAL_PRIVILEGE_SET, *PINITIAL_PRIVILEGE_SET;
typedef struct _INTERFACE INTERFACE, *PINTERFACE;
typedef struct _IO_COMPLETION_CONTEXT IO_COMPLETION_CONTEXT, *PIO_COMPLETION_CONTEXT;
typedef struct _IO_RESOURCE_DESCRIPTOR IO_RESOURCE_DESCRIPTOR, *PIO_RESOURCE_DESCRIPTOR;
typedef struct _IO_RESOURCE_LIST IO_RESOURCE_LIST, *PIO_RESOURCE_LIST;
typedef struct _IO_RESOURCE_REQUIREMENTS_LIST IO_RESOURCE_REQUIREMENTS_LIST, *PIO_RESOURCE_REQUIREMENTS_LIST;
typedef struct _IO_SECURITY_CONTEXT IO_SECURITY_CONTEXT, *PIO_SECURITY_CONTEXT;
typedef struct _IO_STACK_LOCATION IO_STACK_LOCATION, *PIO_STACK_LOCATION;
typedef struct _IO_STATUS_BLOCK IO_STATUS_BLOCK, *PIO_STATUS_BLOCK;
typedef struct _IO_TIMER IO_TIMER, *PIO_TIMER;
typedef struct _IRP IRP, *PIRP;
typedef struct _KAFFINITY_MAP KAFFINITY_MAP, *PKAFFINITY_MAP;
typedef struct _KAPC KAPC, *PKAPC;
typedef struct _KAPC_STATE KAPC_STATE, *PKAPC_STATE;
typedef struct _KD_DEBUG_MODE KD_DEBUG_MODE, *PKD_DEBUG_MODE;
typedef struct _KD_DISPATCH_TABLE KD_DISPATCH_TABLE, *PKD_DISPATCH_TABLE;
typedef struct _KDPC KDPC, *PKDPC;
typedef struct _KDPC_DATA KDPC_DATA, *PKDPC_DATA;
typedef struct _KDEVICE_QUEUE_ENTRY KDEVICE_QUEUE_ENTRY, *PKDEVICE_QUEUE_ENTRY;
typedef struct _KERNEL_INITIALIZATION_BLOCK KERNEL_INITIALIZATION_BLOCK, *PKERNEL_INITIALIZATION_BLOCK;
typedef struct _KEVENT KEVENT, *PKEVENT;
typedef struct _KGATE KGATE, *PKGATE;
typedef struct _KLOCK_QUEUE_HANDLE KLOCK_QUEUE_HANDLE, *PKLOCK_QUEUE_HANDLE;
typedef struct _KMUTEX KMUTEX, *PKMUTEX;
typedef struct _KPROCESS KPROCESS, *PKPROCESS;
typedef struct _KPUSH_LOCK_WAIT_BLOCK KPUSH_LOCK_WAIT_BLOCK, *PKPUSH_LOCK_WAIT_BLOCK;
typedef struct _KQUEUE KQUEUE, *PKQUEUE;
typedef struct _KSEMAPHORE KSEMAPHORE, *PKSEMAPHORE;
typedef struct _KSERVICE_DESCRIPTOR_TABLE KSERVICE_DESCRIPTOR_TABLE, *PKSERVICE_DESCRIPTOR_TABLE;
typedef struct _KSHARED_DATA KSHARED_DATA, *PKSHARED_DATA;
typedef struct _KSPIN_LOCK_QUEUE KSPIN_LOCK_QUEUE, *PKSPIN_LOCK_QUEUE;
typedef struct _KSYSTEM_TIME KSYSTEM_TIME, *PKSYSTEM_TIME;
typedef struct _KTHREAD KTHREAD, *PKTHREAD;
typedef struct _KTIMER KTIMER, *PKTIMER;
typedef struct _KUBSAN_FLOAT_CAST_OVERFLOW_DATA KUBSAN_FLOAT_CAST_OVERFLOW_DATA, *PKUBSAN_FLOAT_CAST_OVERFLOW_DATA;
@@ -348,59 +266,15 @@ typedef struct _KUBSAN_TYPE_MISMATCH_DATA KUBSAN_TYPE_MISMATCH_DATA, *PKUBSAN_TY
typedef struct _KUBSAN_TYPE_MISMATCH_DATA_V1 KUBSAN_TYPE_MISMATCH_DATA_V1, *PKUBSAN_TYPE_MISMATCH_DATA_V1;
typedef struct _KWAIT_BLOCK KWAIT_BLOCK, *PKWAIT_BLOCK;
typedef struct _LDR_DATA_TABLE_ENTRY LDR_DATA_TABLE_ENTRY, *PLDR_DATA_TABLE_ENTRY;
typedef struct _LDR_PEB_DATA LDR_PEB_DATA, *PLDR_PEB_DATA;
typedef struct _LIST_ENTRY LIST_ENTRY, *PLIST_ENTRY;
typedef struct _LIST_ENTRY32 LIST_ENTRY32, *PLIST_ENTRY32;
typedef struct _LIST_ENTRY64 LIST_ENTRY64, *PLIST_ENTRY64;
typedef struct _LOADER_GRAPHICS_INFORMATION_BLOCK LOADER_GRAPHICS_INFORMATION_BLOCK, *PLOADER_GRAPHICS_INFORMATION_BLOCK;
typedef struct _LOADER_INFORMATION_BLOCK LOADER_INFORMATION_BLOCK, *PLOADER_INFORMATION_BLOCK;
typedef struct _LOADER_MEMORY_DESCRIPTOR LOADER_MEMORY_DESCRIPTOR, *PLOADER_MEMORY_DESCRIPTOR;
typedef struct _LOOKASIDE_LIST LOOKASIDE_LIST, *PLOOKASIDE_LIST;
typedef struct _LOOKASIDE_LIST_EX LOOKASIDE_LIST_EX, *PLOOKASIDE_LIST_EX;
typedef struct _LPCP_NONPAGED_PORT_QUEUE LPCP_NONPAGED_PORT_QUEUE, *PLPCP_NONPAGED_PORT_QUEUE;
typedef struct _LPCP_PORT_OBJECT LPCP_PORT_OBJECT, *PLPCP_PORT_OBJECT;
typedef struct _LPCP_PORT_QUEUE LPCP_PORT_QUEUE, *PLPCP_PORT_QUEUE;
typedef struct _LUID LUID, *PLUID;
typedef struct _LUID_AND_ATTRIBUTES LUID_AND_ATTRIBUTES, *PLUID_AND_ATTRIBUTES;
typedef struct _M128 M128, *PM128;
typedef struct _MAILSLOT_CREATE_PARAMETERS MAILSLOT_CREATE_PARAMETERS, *PMAILSLOT_CREATE_PARAMETERS;
typedef struct _MDL MDL, *PMDL;
typedef struct _MMCOLOR_TABLES MMCOLOR_TABLES, *PMMCOLOR_TABLES;
typedef struct _MMFREE_POOL_ENTRY MMFREE_POOL_ENTRY, *PMMFREE_POOL_ENTRY;
typedef struct _MMMEMORY_LAYOUT MMMEMORY_LAYOUT, *PMMMEMORY_LAYOUT;
typedef struct _MMPFNENTRY MMPFNENTRY, *PMMPFNENTRY;
typedef struct _MMPFNLIST MMPFNLIST, *PMMPFNLIST;
typedef struct _MMSUPPORT MMSUPPORT, *PMMSUPPORT;
typedef struct _MMSUPPORT_FLAGS MMSUPPORT_FLAGS, *PMMSUPPORT_FLAGS;
typedef struct _MMWSLE_HASH MMWSLE_HASH, *PMMWSLE_HASH;
typedef struct _NAMED_PIPE_CREATE_PARAMETERS NAMED_PIPE_CREATE_PARAMETERS, *PNAMED_PIPE_CREATE_PARAMETERS;
typedef struct _NLSTABLE_INFO NLSTABLE_INFO, *PNLSTABLE_INFO;
typedef struct _NONPAGED_LOOKASIDE_LIST NONPAGED_LOOKASIDE_LIST, *PNONPAGED_LOOKASIDE_LIST;
typedef struct _OBJECT_ATTRIBUTES OBJECT_ATTRIBUTES, *POBJECT_ATTRIBUTES;
typedef struct _OBJECT_CREATE_INFORMATION OBJECT_CREATE_INFORMATION, *POBJECT_CREATE_INFORMATION;
typedef struct _OBJECT_CREATOR_INFO OBJECT_CREATOR_INFO, *POBJECT_CREATOR_INFO;
typedef struct _OBJECT_DIRECTORY OBJECT_DIRECTORY, *POBJECT_DIRECTORY;
typedef struct _OBJECT_DIRECTORY_ENTRY OBJECT_DIRECTORY_ENTRY, *POBJECT_DIRECTORY_ENTRY;
typedef struct _OBJECT_DUMP_CONTROL OBJECT_DUMP_CONTROL, *POBJECT_DUMP_CONTROL;
typedef struct _OBJECT_HANDLE_COUNT_DATABASE OBJECT_HANDLE_COUNT_DATABASE, *POBJECT_HANDLE_COUNT_DATABASE;
typedef struct _OBJECT_HANDLE_COUNT_ENTRY OBJECT_HANDLE_COUNT_ENTRY, *POBJECT_HANDLE_COUNT_ENTRY;
typedef struct _OBJECT_HANDLE_COUNT_INFORMATION OBJECT_HANDLE_COUNT_INFORMATION, *POBJECT_HANDLE_COUNT_INFORMATION;
typedef struct _OBJECT_HANDLE_INFO OBJECT_HANDLE_INFO, *POBJECT_HANDLE_INFO;
typedef struct _OBJECT_HANDLE_INFORMATION OBJECT_HANDLE_INFORMATION, *POBJECT_HANDLE_INFORMATION;
typedef struct _OBJECT_HEADER OBJECT_HEADER, *POBJECT_HEADER;
typedef struct _OBJECT_HEADER_CREATOR_INFO OBJECT_HEADER_CREATOR_INFO, *POBJECT_HEADER_CREATOR_INFO;
typedef struct _OBJECT_HEADER_NAME_INFO OBJECT_HEADER_NAME_INFO, *POBJECT_HEADER_NAME_INFO;
typedef struct _OBJECT_HEADER_QUOTA_INFO OBJECT_HEADER_QUOTA_INFO, *POBJECT_HEADER_QUOTA_INFO;
typedef struct _OBJECT_LOOKUP_CONTEXT OBJECT_LOOKUP_CONTEXT, *POBJECT_LOOKUP_CONTEXT;
typedef struct _OBJECT_NAME_INFO OBJECT_NAME_INFO, *POBJECT_NAME_INFO;
typedef struct _OBJECT_NAME_INFORMATION OBJECT_NAME_INFORMATION, *POBJECT_NAME_INFORMATION;
typedef struct _OBJECT_OPTIONAL_HEADER_LAYOUT OBJECT_OPTIONAL_HEADER_LAYOUT, *POBJECT_OPTIONAL_HEADER_LAYOUT;
typedef struct _OBJECT_PROCESS_INFO OBJECT_PROCESS_INFO, *POBJECT_PROCESS_INFO;
typedef struct _OBJECT_QUOTA_INFO OBJECT_QUOTA_INFO, *POBJECT_QUOTA_INFO;
typedef struct _OBJECT_TYPE OBJECT_TYPE, *POBJECT_TYPE;
typedef struct _OBJECT_TYPE_INITIALIZER OBJECT_TYPE_INITIALIZER, *POBJECT_TYPE_INITIALIZER;
typedef struct _OWNER_ENTRY OWNER_ENTRY, *POWNER_ENTRY;
typedef struct _PAGED_LOOKASIDE_LIST PAGED_LOOKASIDE_LIST, *PPAGED_LOOKASIDE_LIST;
typedef struct _PCAT_FIRMWARE_INFORMATION PCAT_FIRMWARE_INFORMATION, *PPCAT_FIRMWARE_INFORMATION;
typedef struct _PCI_BRIDGE_CONTROL_REGISTER PCI_BRIDGE_CONTROL_REGISTER, *PPCI_BRIDGE_CONTROL_REGISTER;
typedef struct _PCI_COMMON_CONFIG PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
@@ -409,8 +283,6 @@ typedef struct _PCI_DEVICE_HEADER_TYPE_REGION PCI_DEVICE_HEADER_TYPE_REGION, *PP
typedef struct _PCI_DEVICE_INDEPENDENT_REGION PCI_DEVICE_INDEPENDENT_REGION, *PPCI_DEVICE_INDEPENDENT_REGION;
typedef struct _PCI_TYPE0_DEVICE PCI_TYPE0_DEVICE, *PPCI_TYPE0_DEVICE;
typedef struct _PCI_TYPE1_DEVICE PCI_TYPE1_DEVICE, *PPCI_TYPE1_DEVICE;
typedef struct _PEB PEB, *PPEB;
typedef struct _PEB_FREE_BLOCK PEB_FREE_BLOCK, *PPEB_FREE_BLOCK;
typedef struct _PECOFF_IMAGE_BASE_RELOCATION PECOFF_IMAGE_BASE_RELOCATION, *PPECOFF_IMAGE_BASE_RELOCATION;
typedef struct _PECOFF_IMAGE_DATA PECOFF_IMAGE_DATA, *PPECOFF_IMAGE_DATA;
typedef struct _PECOFF_IMAGE_DATA_DIRECTORY PECOFF_IMAGE_DATA_DIRECTORY, *PPECOFF_IMAGE_DATA_DIRECTORY;
@@ -431,51 +303,22 @@ typedef struct _PECOFF_IMAGE_ROM_HEADER PECOFF_IMAGE_ROM_HEADER, *PPECOFF_IMAGE_
typedef struct _PECOFF_IMAGE_ROM_OPTIONAL_HEADER PECOFF_IMAGE_ROM_OPTIONAL_HEADER, *PPECOFF_IMAGE_ROM_OPTIONAL_HEADER;
typedef struct _PECOFF_IMAGE_SECTION_HEADER PECOFF_IMAGE_SECTION_HEADER, *PPECOFF_IMAGE_SECTION_HEADER;
typedef struct _PECOFF_IMAGE_VXD_HEADER PECOFF_IMAGE_VXD_HEADER, *PPECOFF_IMAGE_VXD_HEADER;
typedef struct _PHYSICAL_MEMORY_DESCRIPTOR PHYSICAL_MEMORY_DESCRIPTOR, *PPHYSICAL_MEMORY_DESCRIPTOR;
typedef struct _PHYSICAL_MEMORY_RUN PHYSICAL_MEMORY_RUN, *PPHYSICAL_MEMORY_RUN;
typedef struct _POOL_HEADER POOL_HEADER, *PPOOL_HEADER;
typedef struct _POOL_TRACKING_BIG_ALLOCATIONS POOL_TRACKING_BIG_ALLOCATIONS, *PPOOL_TRACKING_BIG_ALLOCATIONS;
typedef struct _POOL_TRACKING_TABLE POOL_TRACKING_TABLE, *PPOOL_TRACKING_TABLE;
typedef struct _POWER_SEQUENCE POWER_SEQUENCE, *PPOWER_SEQUENCE;
typedef struct _PRIVILEGE_SET PRIVILEGE_SET, *PPRIVILEGE_SET;
typedef struct _PROCESSOR_IDENTITY PROCESSOR_IDENTITY, *PPROCESSOR_IDENTITY;
typedef struct _PROCESSOR_POWER_STATE PROCESSOR_POWER_STATE, *PPROCESSOR_POWER_STATE;
typedef struct _QUAD QUAD, *PQUAD;
typedef struct _RTL_ACTIVATION_CONTEXT_STACK_FRAME RTL_ACTIVATION_CONTEXT_STACK_FRAME, *PRTL_ACTIVATION_CONTEXT_STACK_FRAME;
typedef struct _RTL_BALANCED_NODE RTL_BALANCED_NODE, *PRTL_BALANCED_NODE;
typedef struct _RTL_BITMAP RTL_BITMAP, *PRTL_BITMAP;
typedef struct _RTL_PRINT_CONTEXT RTL_PRINT_CONTEXT, *PRTL_PRINT_CONTEXT;
typedef struct _RTL_PRINT_FORMAT_PROPERTIES RTL_PRINT_FORMAT_PROPERTIES, *PRTL_PRINT_FORMAT_PROPERTIES;
typedef struct _RTL_RB_TREE RTL_RB_TREE, *PRTL_RB_TREE;
typedef struct _SCSI_REQUEST_BLOCK SCSI_REQUEST_BLOCK, *PSCSI_REQUEST_BLOCK;
typedef struct _SECTION_OBJECT_POINTERS SECTION_OBJECT_POINTERS, *PSECTION_OBJECT_POINTERS;
typedef struct _SECURITY_AUDIT_PROCESS_CREATION_INFO SECURITY_AUDIT_PROCESS_CREATION_INFO, *PSECURITY_AUDIT_PROCESS_CREATION_INFO;
typedef struct _SECURITY_CLIENT_CONTEXT SECURITY_CLIENT_CONTEXT, *PSECURITY_CLIENT_CONTEXT;
typedef struct _SECURITY_QUALITY_OF_SERVICE SECURITY_QUALITY_OF_SERVICE, *PSECURITY_QUALITY_OF_SERVICE;
typedef struct _SECURITY_SUBJECT_CONTEXT SECURITY_SUBJECT_CONTEXT, *PSECURITY_SUBJECT_CONTEXT;
typedef struct _SID SID, *PSID;
typedef struct _SID_IDENTIFIER_AUTHORITY SID_IDENTIFIER_AUTHORITY, *PSID_IDENTIFIER_AUTHORITY;
typedef struct _SINGLE_LIST_ENTRY SINGLE_LIST_ENTRY, *PSINGLE_LIST_ENTRY;
typedef struct _SMBIOS_TABLE_HEADER SMBIOS_TABLE_HEADER, *PSMBIOS_TABLE_HEADER;
typedef struct _SMBIOS3_TABLE_HEADER SMBIOS3_TABLE_HEADER, *PSMBIOS3_TABLE_HEADER;
typedef struct _STRING STRING, *PSTRING;
typedef struct _STRING32 STRING32, *PSTRING32;
typedef struct _STRING64 STRING64, *PSTRING64;
typedef struct _SYSTEM_POWER_STATE_CONTEXT SYSTEM_POWER_STATE_CONTEXT, *PSYSTEM_POWER_STATE_CONTEXT;
typedef struct _TEB TEB, *PTEB;
typedef struct _TEB_ACTIVE_FRAME TEB_ACTIVE_FRAME, *PTEB_ACTIVE_FRAME;
typedef struct _TEB_ACTIVE_FRAME_CONTEXT TEB_ACTIVE_FRAME_CONTEXT, *PTEB_ACTIVE_FRAME_CONTEXT;
typedef struct _THREAD_INFORMATION_BLOCK THREAD_INFORMATION_BLOCK, *PTHREAD_INFORMATION_BLOCK;
typedef struct _TIME_FIELDS TIME_FIELDS, *PTIME_FIELDS;
typedef struct _TIMER_ROUTINES TIMER_ROUTINES, *PTIMER_ROUTINES;
typedef struct _TOKEN_CONTROL TOKEN_CONTROL, *PTOKEN_CONTROL;
typedef struct _TOKEN_SOURCE TOKEN_SOURCE, *PTOKEN_SOURCE;
typedef struct _UEFI_FIRMWARE_INFORMATION UEFI_FIRMWARE_INFORMATION, *PUEFI_FIRMWARE_INFORMATION;
typedef struct _UNICODE_STRING UNICODE_STRING, *PUNICODE_STRING;
typedef struct _UNICODE_STRING32 UNICODE_STRING32, *PUNICODE_STRING32;
typedef struct _UNICODE_STRING64 UNICODE_STRING64, *PUNICODE_STRING64;
typedef struct _VPB VPB, *PVPB;
typedef struct _WORK_QUEUE_ITEM WORK_QUEUE_ITEM, *PWORK_QUEUE_ITEM;
typedef struct _XTBL_BOOT_PARAMETERS XTBL_BOOT_PARAMETERS, *PXTBL_BOOT_PARAMETERS;
typedef struct _XTBL_BOOT_PROTOCOL XTBL_BOOT_PROTOCOL, *PXTBL_BOOT_PROTOCOL;
typedef struct _XTBL_BOOTMENU_ITEM XTBL_BOOTMENU_ITEM, *PXTBL_BOOTMENU_ITEM;
@@ -504,13 +347,8 @@ typedef union _EFI_HASH_OUTPUT EFI_HASH_OUTPUT, *PEFI_HASH_OUTPUT;
typedef union _EFI_IA32_REGISTER_SET EFI_IA32_REGISTER_SET, *PEFI_IA32_REGISTER_SET;
typedef union _EFI_IP_ADDRESS EFI_IP_ADDRESS, *PEFI_IP_ADDRESS;
typedef union _EFI_PXE_BASE_CODE_PACKET EFI_PXE_BASE_CODE_PACKET, *PEFI_PXE_BASE_CODE_PACKET;
typedef union _EXHANDLE EXHANDLE, *PEXHANDLE;
typedef union _EX_RUNDOWN_REFERENCE EX_RUNDOWN_REFERENCE, *PEX_RUNDOWN_REFERENCE;
typedef union _KPUSH_LOCK KPUSH_LOCK, *PKPUSH_LOCK;
typedef union _LARGE_INTEGER LARGE_INTEGER, *PLARGE_INTEGER;
typedef union _OBJECT_HEADER_HANDLE_INFO OBJECT_HEADER_HANDLE_INFO, *POBJECT_HEADER_HANDLE_INFO;
typedef union _POWER_STATE POWER_STATE, *PPOWER_STATE;
typedef union _SINGLE_LIST_HEADER SINGLE_LIST_HEADER, *PSINGLE_LIST_HEADER;
typedef union _ULARGE_INTEGER ULARGE_INTEGER, *PULARGE_INTEGER;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTSTRUCT_H */

129
sdk/xtdk/xttypes.h
View File

@@ -11,12 +11,8 @@
#include <xttarget.h>
#include <xtcompat.h>
#include <xtstruct.h>
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Standard C types */
typedef unsigned char BYTE, *PBYTE, *LPBYTE;
typedef char CHAR, *PCHAR, *LPCHAR;
@@ -154,44 +150,6 @@ typedef LPCWSTR PCTSTR, LPCTSTR;
typedef LPUWSTR PUTSTR, LPUTSTR;
typedef LPCUWSTR PCUTSTR, LPCUTSTR;
/* Variadic ABI types */
typedef __builtin_va_list VA_LIST, *PVA_LIST;
/* ANSI string structure */
typedef struct _ANSI_STRING
{
USHORT Length;
USHORT MaximumLength;
PSTR Buffer;
} ANSI_STRING, *PANSI_STRING;
typedef const ANSI_STRING *PCANSI_STRING;
/* 32-bit ANSI string structure */
typedef struct _ANSI_STRING32
{
USHORT Length;
USHORT MaximumLength;
ULONG Buffer;
} ANSI_STRING32, *PANSI_STRING32;
typedef const ANSI_STRING32 *PCANSI_STRING32;
/* 64-bit ANSI string structure */
typedef struct _ANSI_STRING64
{
USHORT Length;
USHORT MaximumLength;
ULONGLONG Buffer;
} ANSI_STRING64, *PANSI_STRING64;
typedef const ANSI_STRING64 *PCANSI_STRING64;
/* Constant counted string structure */
typedef struct _CSTRING
{
USHORT Length;
USHORT MaximumLength;
PCCHAR Buffer;
} CSTRING, *PCSTRING;
/* 128-bit floats structure */
typedef struct _FLOAT128
{
@@ -227,32 +185,21 @@ typedef union _LARGE_INTEGER
LONGLONG QuadPart;
} LARGE_INTEGER, *PLARGE_INTEGER;
/* Double linked list structure definition */
typedef struct _LIST_ENTRY
/* 64-bit unsigned integer union */
typedef union _ULARGE_INTEGER
{
PLIST_ENTRY Flink;
PLIST_ENTRY Blink;
} LIST_ENTRY, *PLIST_ENTRY;
/* Locally Unique Identifier structure definition */
typedef struct _LUID
{
ULONG LowPart;
LONG HighPart;
} LUID, *PLUID;
/* 128-bit 16-byte aligned XMM register */
typedef struct _M128
{
ULONGLONG Low;
LONGLONG High;
} ALIGN(16) M128, *PM128;
/* Quadruple-word alignment structure definition */
typedef struct _QUAD
{
unsigned long long Alignment;
} QUAD, *PQUAD;
struct
{
ULONG LowPart;
ULONG HighPart;
};
struct
{
ULONG LowPart;
ULONG HighPart;
} u;
ULONGLONG QuadPart;
} ULARGE_INTEGER, *PULARGE_INTEGER;
/* Counted string structure */
typedef struct _STRING
@@ -278,21 +225,40 @@ typedef struct _STRING64
ULONGLONG Buffer;
} STRING64, *PSTRING64;
/* 64-bit unsigned integer union */
typedef union _ULARGE_INTEGER
/* Constant counted string structure */
typedef struct _CSTRING
{
struct
{
ULONG LowPart;
ULONG HighPart;
};
struct
{
ULONG LowPart;
ULONG HighPart;
} u;
ULONGLONG QuadPart;
} ULARGE_INTEGER, *PULARGE_INTEGER;
USHORT Length;
USHORT MaximumLength;
PCCHAR Buffer;
} CSTRING, *PCSTRING;
/* ANSI string structure */
typedef struct _ANSI_STRING
{
USHORT Length;
USHORT MaximumLength;
PSTR Buffer;
} ANSI_STRING, *PANSI_STRING;
typedef const ANSI_STRING *PCANSI_STRING;
/* 32-bit ANSI string structure */
typedef struct _ANSI_STRING32
{
USHORT Length;
USHORT MaximumLength;
ULONG Buffer;
} ANSI_STRING32, *PANSI_STRING32;
typedef const ANSI_STRING32 *PCANSI_STRING32;
/* 64-bit ANSI string structure */
typedef struct _ANSI_STRING64
{
USHORT Length;
USHORT MaximumLength;
ULONGLONG Buffer;
} ANSI_STRING64, *PANSI_STRING64;
typedef const ANSI_STRING64 *PCANSI_STRING64;
/* UNICODE string structure */
typedef struct _UNICODE_STRING
@@ -321,5 +287,4 @@ typedef struct _UNICODE_STRING64
} UNICODE_STRING64, *PUNICODE_STRING64;
typedef const UNICODE_STRING64 *PCUNICODE_STRING64;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTTYPES_H */

5
sdk/xtdk/xtuefi.h
View File

@@ -373,10 +373,6 @@
#define EFI_CONFIG_TABLE_SMBIOS_TABLE_GUID {0xEB9D2D31, 0x2D88, 0x11D3, {0x9A, 0x16, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}}
#define EFI_CONFIG_TABLE_SMBIOS3_TABLE_GUID {0xF2FD1544, 0x9794, 0x4A2C, {0x99, 0x2E, 0xE5, 0xBB, 0xCf, 0x20, 0xE3, 0x94}}
/* C/C++ specific code */
#ifndef __XTOS_ASSEMBLER__
/* Basic UEFI types */
typedef PVOID EFI_EVENT, *PEFI_EVENT;
typedef PVOID EFI_HANDLE, *PEFI_HANDLE;
@@ -2727,5 +2723,4 @@ typedef struct _EFI_PROCESSOR_INFORMATION
EFI_PROCESSOR_PHYSICAL_LOCATION Location;
} EFI_PROCESSOR_INFORMATION, *PEFI_PROCESSOR_INFORMATION;
#endif /* __XTOS_ASSEMBLER__ */
#endif /* __XTDK_XTUEFI_H */

77
xtoskrnl/CMakeLists.txt
View File

@@ -10,25 +10,17 @@ include_directories(
# Specify list of kernel source code files
list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/archsup.S
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/boot.S
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/cpufunc.cc
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/data.cc
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/procsup.cc
${XTOSKRNL_SOURCE_DIR}/ar/${ARCH}/traps.cc
${XTOSKRNL_SOURCE_DIR}/ex/data.cc
${XTOSKRNL_SOURCE_DIR}/ex/exports.cc
${XTOSKRNL_SOURCE_DIR}/ex/handle.cc
${XTOSKRNL_SOURCE_DIR}/ex/laslist.cc
${XTOSKRNL_SOURCE_DIR}/ex/resource.cc
${XTOSKRNL_SOURCE_DIR}/ex/rundown.cc
${XTOSKRNL_SOURCE_DIR}/ex/workitem.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/cpu.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/firmware.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/ioport.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/irq.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/pic.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/rtc.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/ioport.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/runlevel.cc
${XTOSKRNL_SOURCE_DIR}/hl/${ARCH}/timer.cc
${XTOSKRNL_SOURCE_DIR}/hl/acpi.cc
${XTOSKRNL_SOURCE_DIR}/hl/cport.cc
${XTOSKRNL_SOURCE_DIR}/hl/data.cc
@@ -36,114 +28,65 @@ list(APPEND XTOSKRNL_SOURCE
${XTOSKRNL_SOURCE_DIR}/hl/fbdev.cc
${XTOSKRNL_SOURCE_DIR}/hl/init.cc
${XTOSKRNL_SOURCE_DIR}/hl/ioreg.cc
${XTOSKRNL_SOURCE_DIR}/kd/${ARCH}/debug.cc
${XTOSKRNL_SOURCE_DIR}/kd/data.cc
${XTOSKRNL_SOURCE_DIR}/kd/dbgio.cc
${XTOSKRNL_SOURCE_DIR}/kd/debug.cc
${XTOSKRNL_SOURCE_DIR}/kd/exports.cc
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/dispatch.cc
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/irq.cc
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/krnlinit.cc
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/kthread.cc
${XTOSKRNL_SOURCE_DIR}/ke/${ARCH}/proc.cc
${XTOSKRNL_SOURCE_DIR}/ke/affinity.cc
${XTOSKRNL_SOURCE_DIR}/ke/apc.cc
${XTOSKRNL_SOURCE_DIR}/ke/bootinfo.cc
${XTOSKRNL_SOURCE_DIR}/ke/crash.cc
${XTOSKRNL_SOURCE_DIR}/ke/data.cc
${XTOSKRNL_SOURCE_DIR}/ke/dispatch.cc
${XTOSKRNL_SOURCE_DIR}/ke/dispobj.cc
${XTOSKRNL_SOURCE_DIR}/ke/dpc.cc
${XTOSKRNL_SOURCE_DIR}/ke/event.cc
${XTOSKRNL_SOURCE_DIR}/ke/exports.cc
${XTOSKRNL_SOURCE_DIR}/ke/ipi.cc
${XTOSKRNL_SOURCE_DIR}/ke/kprocess.cc
${XTOSKRNL_SOURCE_DIR}/ke/krnlinit.cc
${XTOSKRNL_SOURCE_DIR}/ke/kthread.cc
${XTOSKRNL_SOURCE_DIR}/ke/kubsan.cc
${XTOSKRNL_SOURCE_DIR}/ke/pushlock.cc
${XTOSKRNL_SOURCE_DIR}/ke/runlevel.cc
${XTOSKRNL_SOURCE_DIR}/ke/schedule.cc
${XTOSKRNL_SOURCE_DIR}/ke/semphore.cc
${XTOSKRNL_SOURCE_DIR}/ke/shdata.cc
${XTOSKRNL_SOURCE_DIR}/ke/spinlock.cc
${XTOSKRNL_SOURCE_DIR}/ke/sysres.cc
${XTOSKRNL_SOURCE_DIR}/ke/sysserv.cc
${XTOSKRNL_SOURCE_DIR}/ke/systime.cc
${XTOSKRNL_SOURCE_DIR}/ke/timer.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/mmgr.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/init.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pagemap.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/paging.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pfault.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pfn.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pool.cc
${XTOSKRNL_SOURCE_DIR}/mm/${ARCH}/pte.cc
${XTOSKRNL_SOURCE_DIR}/mm/alloc.cc
${XTOSKRNL_SOURCE_DIR}/mm/colors.cc
${XTOSKRNL_SOURCE_DIR}/mm/data.cc
${XTOSKRNL_SOURCE_DIR}/mm/exports.cc
${XTOSKRNL_SOURCE_DIR}/mm/hlpool.cc
${XTOSKRNL_SOURCE_DIR}/mm/init.cc
${XTOSKRNL_SOURCE_DIR}/mm/kpool.cc
${XTOSKRNL_SOURCE_DIR}/mm/mmgr.cc
${XTOSKRNL_SOURCE_DIR}/mm/paging.cc
${XTOSKRNL_SOURCE_DIR}/mm/pfn.cc
${XTOSKRNL_SOURCE_DIR}/mm/pool.cc
${XTOSKRNL_SOURCE_DIR}/mm/probe.cc
${XTOSKRNL_SOURCE_DIR}/mm/pte.cc
${XTOSKRNL_SOURCE_DIR}/mm/quota.cc
${XTOSKRNL_SOURCE_DIR}/ob/data.cc
${XTOSKRNL_SOURCE_DIR}/ob/devmap.cc
${XTOSKRNL_SOURCE_DIR}/ob/handle.cc
${XTOSKRNL_SOURCE_DIR}/ob/lifecycl.cc
${XTOSKRNL_SOURCE_DIR}/ob/obdir.cc
${XTOSKRNL_SOURCE_DIR}/ob/obmgr.cc
${XTOSKRNL_SOURCE_DIR}/ob/security.cc
${XTOSKRNL_SOURCE_DIR}/ob/typereg.cc
${XTOSKRNL_SOURCE_DIR}/po/idle.cc
${XTOSKRNL_SOURCE_DIR}/ps/data.cc
${XTOSKRNL_SOURCE_DIR}/ps/process.cc
${XTOSKRNL_SOURCE_DIR}/ps/psmgr.cc
${XTOSKRNL_SOURCE_DIR}/ps/quota.cc
${XTOSKRNL_SOURCE_DIR}/ps/thread.cc
${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/atomic.cc
${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/dispatch.cc
${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/exsup.cc
${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/intrin.cc
${XTOSKRNL_SOURCE_DIR}/rtl/${ARCH}/slist.cc
${XTOSKRNL_SOURCE_DIR}/rtl/atomic.cc
${XTOSKRNL_SOURCE_DIR}/rtl/bitmap.cc
${XTOSKRNL_SOURCE_DIR}/rtl/data.cc
${XTOSKRNL_SOURCE_DIR}/rtl/endian.cc
${XTOSKRNL_SOURCE_DIR}/rtl/exports.cc
${XTOSKRNL_SOURCE_DIR}/rtl/exsup.cc
${XTOSKRNL_SOURCE_DIR}/rtl/guid.cc
${XTOSKRNL_SOURCE_DIR}/rtl/lifo.cc
${XTOSKRNL_SOURCE_DIR}/rtl/llist.cc
${XTOSKRNL_SOURCE_DIR}/rtl/math.cc
${XTOSKRNL_SOURCE_DIR}/rtl/memory.cc
${XTOSKRNL_SOURCE_DIR}/rtl/nls.cc
${XTOSKRNL_SOURCE_DIR}/rtl/rbtree.cc
${XTOSKRNL_SOURCE_DIR}/rtl/sha1.cc
${XTOSKRNL_SOURCE_DIR}/rtl/string.cc
${XTOSKRNL_SOURCE_DIR}/rtl/time.cc
${XTOSKRNL_SOURCE_DIR}/rtl/unicode.cc
${XTOSKRNL_SOURCE_DIR}/rtl/widestr.cc
${XTOSKRNL_SOURCE_DIR}/se/access.cc
${XTOSKRNL_SOURCE_DIR}/se/audit.cc
${XTOSKRNL_SOURCE_DIR}/se/descript.cc
${XTOSKRNL_SOURCE_DIR}/se/privileg.cc)
${XTOSKRNL_SOURCE_DIR}/rtl/widestr.cc)
# Set module definition SPEC file
set_specfile(xtoskrnl.spec xtoskrnl.exe)
# Link static XTOS library
add_library(libxtos ${XTOSKRNL_SOURCE})
target_link_libraries(libxtos PRIVATE xtadk)
# Link kernel executable
add_executable(xtoskrnl ${CMAKE_CURRENT_BINARY_DIR}/xtoskrnl.def)
add_executable(xtoskrnl
${XTOSKRNL_SOURCE}
${CMAKE_CURRENT_BINARY_DIR}/xtoskrnl.def)
# Add linker libraries
target_link_libraries(xtoskrnl PRIVATE libxtos)
target_link_libraries(xtoskrnl)
# Set proper binary name and install target
set_target_properties(xtoskrnl PROPERTIES SUFFIX .exe)

37
xtoskrnl/README.md
View File

@@ -4,32 +4,6 @@ within the XTOS kernel space. It is responsible for various core services, such
management, and process scheduling. The kernel contains the scheduler (sometimes referred to as the Dispatcher), the
cache, object, and memory managers, the security manager, and other executive components described below.
## Kernel Parameters
Kernel parameters are XTOS boot-time options used to ensure proper initialization and handling of hardware peripherals.
These parameters can be configured either temporarily by editing the boot entry in the bootloader’s selection menu, or
permanently by modifying the XTLDR configuration file.
The following is a consolidated list of available kernel parameters:
* **CLOCK**: Specifies the primary hardware source used to drive the periodic system clock interrupts and the thread
scheduler tick. Valid values include `LAPIC` (Local APIC Timer), `HPET` (High Precision Event Timer), and `PIT`
(Legacy Programmable Interval Timer). If this parameter is omitted, the kernel will autonomously probe the hardware
and select the most optimal clock source for the current CPU topology, (defaulting to the Local APIC on modern systems.
* **MAXCPUS**: Specifies the maximum number of logical processors the kernel is allowed to initialize and schedule.
Setting `MAXCPUS=1` explicitly disables Symmetric Multiprocessing (SMP), restricting execution exclusively to the Boot
Strap Processor (BSP) and ignoring all Application Processors (APs).
* **NOX2APIC**: Explicitly disables x2APIC support. When specified, the kernel bypasses hardware feature detection for
x2APIC and forces the use of the classic, memory-mapped (MMIO) xAPIC mode. This parameter is particularly useful for
troubleshooting interrupt routing issues or ensuring compatibility with specific hypervisors and legacy emulators.
* **NOXPA**: Disables PAE or LA57 support, depending on the CPU architecture. This parameter is handled by the
bootloader, which configures paging and selects the appropriate Page Map Level (PML) before transferring control to
the kernel.
* **TIMER**: Designates the hardware counter used for high-resolution performance tracking (Query Performance Counter)
and microsecond execution stalls. Valid values include `TSC` (Invariant Time Stamp Counter), `HPET`, `ACPI` (or `PM`)
for the ACPI Power Management Timer, and `PIT`. If not specified, the kernel evaluates hardware capabilities and
defaults to the most precise and reliable counter available (e.g., Invariant TSC).
## Source Code
The source code of the kernel is organized into subsystem-specific directories. Each directory name also defines the
corresponding C++ namespace in which the subsystem's classes and routines reside. These subsystems include:
@@ -40,7 +14,6 @@ corresponding C++ namespace in which the subsystem's classes and routines reside
* Ke - Core Kernel Library
* Mm - Memory Manager
* Po - Plug&Play and Power Manager
* Ps - Process and Thread Manager
* Rtl - Runtime library
### AR: Architecture Library
@@ -77,12 +50,6 @@ This subsystem handles power management events, such as shutdown or standby. It
supporting device detection and installation at boot time. Furthermore, it is responsible for starting and stopping
devices on demand.
### PS: Process and Thread Manager
This subsystem is responsible for managing the lifecycle of processes and threads within the operating system. It
handles the creation, termination, and state tracking of these execution units. Furthermore, it provides the high-level
executive abstractions required to allocate system resources, manage process boundaries, and coordinate with the core
kernel for thread execution.
### RTL: Runtime Library
The Runtime Library provides a kernel-mode implementation of common C library functions. It includes many utility
routines, for use by other kernel components.
@@ -101,8 +68,8 @@ routine:
For all C++ code inside the kernel the naming model has evolved. Consider the **KE::KThread::InitializeThread()**
routine:
* **KE** - The namespace replaces the prefix and indicates the subsystem. Namespaces are written in uppercase and no
longer use the trailing p for private routines, because classes use C++ visibility to control access.
longer use the trailing p for private routines, because classes use C++ visibility to control access.
* **KThread** - Within each namespace, related functionality is grouped into classes, which encapsulate variables and
methods.
methods.
* **InitializeThread** - Method names follow the `<Operation><Object>` pattern.

458
xtoskrnl/ar/amd64/archsup.S
View File

@@ -4,40 +4,29 @@
* FILE: xtoskrnl/ar/amd64/archsup.S
* DESCRIPTION: Provides AMD64 architecture features not implementable in C
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <harraiken91@gmail.com>
*/
#include <xtkmapi.h>
#include <xtadk.h>
#include <ar/amd64/asmsup.h>
.altmacro
.text
/**
* Creates a trap or interrupt handler for the specified vector.
* Creates a trap handler for the specified vector.
*
* @param Vector
* Supplies a trap/interrupt vector number.
*
* @param Type
* Specifies whether the handler is designed to handle an interrupt or a trap.
* Supplies a trap vector number.
*
* @return This macro does not return any value.
*
* @since XT 1.0
*/
.macro ArCreateHandler Vector Type
.global Ar\Type\Vector
Ar\Type\Vector:
/* Check handler type */
.ifc \Type,Trap
/* Push fake error code for non-error vector traps */
.if \Vector != 8 && \Vector != 10 && \Vector != 11 && \Vector != 12 && \Vector != 13 && \Vector != 14 && \Vector != 17 && \Vector != 30
push $0
.endif
.else
/* Push fake error code for interrupts */
.macro ArCreateTrapHandler Vector
.global ArTrap\Vector
ArTrap\Vector:
/* Push fake error code for non-error vectors */
.if \Vector != 8 && \Vector != 10 && \Vector != 11 && \Vector != 12 && \Vector != 13 && \Vector != 14 && \Vector != 17 && \Vector != 30
push $0
.endif
@@ -62,122 +51,105 @@ Ar\Type\Vector:
push %rax
/* Reserve space for other registers and point RBP to the trap frame */
sub $(KTRAP_FRAME_SIZE - KTRAP_FRAME_REGISTERS_SIZE), %rsp
sub $(TRAP_FRAME_SIZE - TRAP_REGISTERS_SIZE), %rsp
lea (%rsp), %rbp
/* Store segment selectors */
mov %gs, KTRAP_FRAME_SegGs(%rbp)
mov %fs, KTRAP_FRAME_SegFs(%rbp)
mov %es, KTRAP_FRAME_SegEs(%rbp)
mov %ds, KTRAP_FRAME_SegDs(%rbp)
mov %gs, TrapSegGs(%rbp)
mov %fs, TrapSegFs(%rbp)
mov %es, TrapSegEs(%rbp)
mov %ds, TrapSegDs(%rbp)
/* Store debug registers */
mov %dr7, %rax
mov %rax, KTRAP_FRAME_Dr7(%rbp)
mov %rax, TrapDr7(%rbp)
mov %dr6, %rax
mov %rax, KTRAP_FRAME_Dr6(%rbp)
mov %rax, TrapDr6(%rbp)
mov %dr3, %rax
mov %rax, KTRAP_FRAME_Dr3(%rbp)
mov %rax, TrapDr3(%rbp)
mov %dr2, %rax
mov %rax, KTRAP_FRAME_Dr2(%rbp)
mov %rax, TrapDr2(%rbp)
mov %dr1, %rax
mov %rax, KTRAP_FRAME_Dr1(%rbp)
mov %rax, TrapDr1(%rbp)
mov %dr0, %rax
mov %rax, KTRAP_FRAME_Dr0(%rbp)
mov %rax, TrapDr0(%rbp)
/* Store CR2 and CR3 */
mov %cr3, %rax
mov %rax, KTRAP_FRAME_Cr3(%rbp)
mov %rax, TrapCr3(%rbp)
mov %cr2, %rax
mov %rax, KTRAP_FRAME_Cr2(%rbp)
mov %rax, TrapCr2(%rbp)
/* Store MxCsr register */
stmxcsr KTRAP_FRAME_MxCsr(%rbp)
stmxcsr TrapMxCsr(%rbp)
/* Store XMM registers */
movdqa %xmm15, KTRAP_FRAME_Xmm15(%rbp)
movdqa %xmm14, KTRAP_FRAME_Xmm14(%rbp)
movdqa %xmm13, KTRAP_FRAME_Xmm13(%rbp)
movdqa %xmm12, KTRAP_FRAME_Xmm12(%rbp)
movdqa %xmm11, KTRAP_FRAME_Xmm11(%rbp)
movdqa %xmm10, KTRAP_FRAME_Xmm10(%rbp)
movdqa %xmm9, KTRAP_FRAME_Xmm9(%rbp)
movdqa %xmm8, KTRAP_FRAME_Xmm8(%rbp)
movdqa %xmm7, KTRAP_FRAME_Xmm7(%rbp)
movdqa %xmm6, KTRAP_FRAME_Xmm6(%rbp)
movdqa %xmm5, KTRAP_FRAME_Xmm5(%rbp)
movdqa %xmm4, KTRAP_FRAME_Xmm4(%rbp)
movdqa %xmm3, KTRAP_FRAME_Xmm3(%rbp)
movdqa %xmm2, KTRAP_FRAME_Xmm2(%rbp)
movdqa %xmm1, KTRAP_FRAME_Xmm1(%rbp)
movdqa %xmm0, KTRAP_FRAME_Xmm0(%rbp)
movdqa %xmm15, TrapXmm15(%rbp)
movdqa %xmm14, TrapXmm14(%rbp)
movdqa %xmm13, TrapXmm13(%rbp)
movdqa %xmm12, TrapXmm12(%rbp)
movdqa %xmm11, TrapXmm11(%rbp)
movdqa %xmm10, TrapXmm10(%rbp)
movdqa %xmm9, TrapXmm9(%rbp)
movdqa %xmm8, TrapXmm8(%rbp)
movdqa %xmm7, TrapXmm7(%rbp)
movdqa %xmm6, TrapXmm6(%rbp)
movdqa %xmm5, TrapXmm5(%rbp)
movdqa %xmm4, TrapXmm4(%rbp)
movdqa %xmm3, TrapXmm3(%rbp)
movdqa %xmm2, TrapXmm2(%rbp)
movdqa %xmm1, TrapXmm1(%rbp)
movdqa %xmm0, TrapXmm0(%rbp)
/* Test previous mode and swap GS if needed */
movl $0, KTRAP_FRAME_PreviousMode(%rbp)
mov KTRAP_FRAME_SegCs(%rbp), %ax
and $3, %al
mov %al, KTRAP_FRAME_PreviousMode(%rbp)
/* Skip swapgs as the interrupt originated from kernel mode */
jz Dispatch\Type\Vector
movl $0, TrapPreviousMode(%rbp)
mov %cs, %ax
and $1, %al
mov %al, TrapPreviousMode(%rbp)
jz KernelMode$\Vector
swapgs
Dispatch\Type\Vector:
/* Set up trap frame pointer for the dispatcher and clear the direction flag */
KernelMode$\Vector:
/* Push Frame Pointer, clear direction flag and pass to trap dispatcher */
mov %rsp, %rcx
cld
/* Preserve the original stack pointer */
mov %rsp, %rbx
/* Force stack alignment */
and $-16, %rsp
/* Allocate 32 bytes of shadow space */
sub $32, %rsp
.ifc \Type,Trap
/* Pass to the trap dispatcher */
call ArDispatchTrap
.else
/* Pass to the interrupt dispatcher */
call ArDispatchInterrupt
.endif
/* Restore the original trap frame stack pointer */
mov %rbx, %rsp
call ArDispatchTrap
/* Test previous mode and swapgs if needed */
testb $1, KTRAP_FRAME_PreviousMode(%rbp)
jz RestoreState\Type\Vector
testb $1, TrapPreviousMode(%rbp)
jz KernelModeReturn$\Vector
cli
swapgs
RestoreState\Type\Vector:
KernelModeReturn$\Vector:
/* Restore XMM registers */
movdqa KTRAP_FRAME_Xmm0(%rbp), %xmm0
movdqa KTRAP_FRAME_Xmm1(%rbp), %xmm1
movdqa KTRAP_FRAME_Xmm2(%rbp), %xmm2
movdqa KTRAP_FRAME_Xmm3(%rbp), %xmm3
movdqa KTRAP_FRAME_Xmm4(%rbp), %xmm4
movdqa KTRAP_FRAME_Xmm5(%rbp), %xmm5
movdqa KTRAP_FRAME_Xmm6(%rbp), %xmm6
movdqa KTRAP_FRAME_Xmm7(%rbp), %xmm7
movdqa KTRAP_FRAME_Xmm8(%rbp), %xmm8
movdqa KTRAP_FRAME_Xmm9(%rbp), %xmm9
movdqa KTRAP_FRAME_Xmm10(%rbp), %xmm10
movdqa KTRAP_FRAME_Xmm11(%rbp), %xmm11
movdqa KTRAP_FRAME_Xmm12(%rbp), %xmm12
movdqa KTRAP_FRAME_Xmm13(%rbp), %xmm13
movdqa KTRAP_FRAME_Xmm14(%rbp), %xmm14
movdqa KTRAP_FRAME_Xmm15(%rbp), %xmm15
movdqa TrapXmm0(%rbp), %xmm0
movdqa TrapXmm1(%rbp), %xmm1
movdqa TrapXmm2(%rbp), %xmm2
movdqa TrapXmm3(%rbp), %xmm3
movdqa TrapXmm4(%rbp), %xmm4
movdqa TrapXmm5(%rbp), %xmm5
movdqa TrapXmm6(%rbp), %xmm6
movdqa TrapXmm7(%rbp), %xmm7
movdqa TrapXmm8(%rbp), %xmm8
movdqa TrapXmm9(%rbp), %xmm9
movdqa TrapXmm10(%rbp), %xmm10
movdqa TrapXmm11(%rbp), %xmm11
movdqa TrapXmm12(%rbp), %xmm12
movdqa TrapXmm13(%rbp), %xmm13
movdqa TrapXmm14(%rbp), %xmm14
movdqa TrapXmm15(%rbp), %xmm15
/* Load MxCsr register */
ldmxcsr KTRAP_FRAME_MxCsr(%rbp)
ldmxcsr TrapMxCsr(%rbp)
/* Restore segment selectors */
mov TrapSegDs(%rbp), %ds
mov TrapSegEs(%rbp), %es
mov TrapSegFs(%rbp), %fs
/* Free stack space */
add $(KTRAP_FRAME_SIZE - KTRAP_FRAME_REGISTERS_SIZE), %rsp
add $(TRAP_FRAME_SIZE - TRAP_REGISTERS_SIZE), %rsp
/* Pop General Purpose Registers */
pop %rax
@@ -201,291 +173,9 @@ RestoreState\Type\Vector:
iretq
.endm
/* Populate common interrupt and trap handlers */
/* Populate common trap handlers */
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
ArCreateHandler 0x\i\j Interrupt
ArCreateHandler 0x\i\j Trap
ArCreateTrapHandler 0x\i\j
.endr
.endr
/* Define array of pointers to the interrupt handlers */
.global ArInterruptEntry
ArInterruptEntry:
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.quad ArInterrupt0x\i\j
.endr
.endr
/* Define array of pointers to the trap handlers */
.global ArTrapEntry
ArTrapEntry:
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.quad ArTrap0x\i\j
.endr
.endr
/**
* Enables eXtended Physical Addressing (XPA).
*
* @param PageMap
* Supplies a pointer to the page map to be used.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global ArEnableExtendedPhysicalAddressing
ArEnableExtendedPhysicalAddressing:
/* Save the original CR4 register */
movq %cr4, %rax
/* Save the state of stack pointer and non-volatile registers */
movq %rsp, XpaRegisterSaveArea(%rip)
movq %rbp, XpaRegisterSaveArea+0x08(%rip)
movq %rax, XpaRegisterSaveArea+0x10(%rip)
movq %rbx, XpaRegisterSaveArea+0x18(%rip)
/* Save the original CR0 register */
movq %cr0, %rbp
/* Load temporary GDT required for mode transitions */
leaq XpaTemporaryGdtDesc(%rip), %rax
movq %rax, XpaTemporaryGdtBase(%rip)
lgdtq XpaTemporaryGdtSize(%rip)
/* Load addresses for entering compatibility mode and re-entering long mode */
leaq XpaEnterCompatMode(%rip), %rax
leaq XpaEnterLongMode(%rip), %rbx
/* Push the 32-bit code segment selector and the target address for a far jump */
pushq $KGDT_R0_CMCODE
pushq %rax
/* Perform a far return to switch to 32-bit compatibility mode */
lretq
XpaEnterCompatMode:
/* Enter 32-bit compatibility mode */
.code32
/* Store the PageMap pointer on the stack for future use */
pushl %ecx
/* Set the stack segment to the 32-bit data segment selector */
movl $KGDT_R0_DATA, %eax
movl %eax, %ss
/* Disable PGE and PCIDE to ensure all TLB entries will be flushed */
movl %cr4, %eax
andl $~(CR4_PGE | CR4_PCIDE), %eax
movl %eax, %cr4
/* Temporarily disable paging */
movl %ebp, %eax
andl $~CR0_PG, %eax
movl %eax, %cr0
/* Disable Long Mode as prerequisite for enabling 5-level paging */
movl $X86_MSR_EFER, %ecx
rdmsr
andl $~X86_MSR_EFER_LME, %eax
wrmsr
/* Transition to 5-level paging (PML5/LA57) */
movl %cr4, %eax
orl $CR4_LA57, %eax
movl %eax, %cr4
/* Restore the PageMap pointer from the stack and load it into CR3 */
popl %ecx
movl %ecx, %cr3
/* Re-enable Long Mode */
movl $X86_MSR_EFER, %ecx
rdmsr
orl $X86_MSR_EFER_LME, %eax
wrmsr
/* Restore CR0 with paging enabled and flush the instruction pipeline */
movl %ebp, %cr0
call XpaFlushInstructions
XpaFlushInstructions:
/* Push the 64-bit code segment selector and the target address for a far jump */
pushl $KGDT_R0_CODE
pushl %ebx
/* Perform a far return to switch to 64-bit long mode */
lretl
XpaEnterLongMode:
/* Enter 64-bit long mode */
.code64
/* Restore the stack pointer and non-volatile registers */
movq XpaRegisterSaveArea(%rip), %rsp
movq XpaRegisterSaveArea+8(%rip), %rbp
movq XpaRegisterSaveArea+0x10(%rip), %rax
movq XpaRegisterSaveArea+0x18(%rip), %rbx
/* Restore the original CR4 register with LA57 bit set */
orq $CR4_LA57, %rax
movq %rax, %cr4
/* Return to the caller */
retq
/* Data section for saving registers and temporary GDT */
XpaRegisterSaveArea: .quad 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000
XpaTemporaryGdtSize: .short ArEnableExtendedPhysicalAddressingEnd - XpaTemporaryGdtDesc - 1
XpaTemporaryGdtBase: .quad 0x0000000000000000
XpaTemporaryGdtDesc: .quad 0x0000000000000000, 0x00CF9A000000FFFF, 0x00AF9A000000FFFF, 0x00CF92000000FFFF
.global ArEnableExtendedPhysicalAddressingEnd
ArEnableExtendedPhysicalAddressingEnd:
/**
* Handles a spurious interrupt allowing it to end up.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global ArHandleSpuriousInterrupt
ArHandleSpuriousInterrupt:
iretq
/**
* Starts an application processor (AP).
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global ArStartApplicationProcessor
ArStartApplicationProcessor:
/* Enter 16-bit real mode */
.code16
/* Disable interrupts and clear direction flag */
cli
cld
/* Establish a flat addressing baseline */
movw %cs, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
/* Calculate absolute physical base address */
xorl %ebx, %ebx
movw %cs, %bx
shll $4, %ebx
/* Set up a temporary stack for the AP initialization */
movl %ebx, %esp
addl $0x1000, %esp
/* Load the temporary Global Descriptor Table */
leal (ApTemporaryGdtDesc - ArStartApplicationProcessor)(%ebx), %eax
movl %eax, (ApTemporaryGdtBase - ArStartApplicationProcessor)
lgdtl (ApTemporaryGdtSize - ArStartApplicationProcessor)
/* Enable Protected Mode */
movl %cr0, %eax
orl $0x01, %eax
movl %eax, %cr0
/* Far return to enter 32-bit protected mode */
leal (ApEnterProtectedMode - ArStartApplicationProcessor)(%ebx), %eax
pushl $KGDT_R0_CMCODE
pushl %eax
lretl
ApEnterProtectedMode:
/* Enter 32-bit protected mode */
.code32
/* Setup all data segment registers */
movw $KGDT_R0_DATA, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
xorw %ax, %ax
movw %ax, %fs
movw %ax, %gs
/* Locate PROCESSOR_START_BLOCK structure */
leal (ArStartApplicationProcessorEnd - ArStartApplicationProcessor)(%ebx), %edi
/* Load CR4 from BSP, but mask PCIDE and PGE */
movl PROCESSOR_START_BLOCK_Cr4(%edi), %eax
andl $~(CR4_PGE | CR4_PCIDE), %eax
movl %eax, %cr4
/* Load the Kernel Page Directory Base from BSP */
movl PROCESSOR_START_BLOCK_Cr3(%edi), %eax
movl %eax, %cr3
/* Enable Long Mode and No-Execute */
movl $X86_MSR_EFER, %ecx
rdmsr
orl $(X86_MSR_EFER_LME | X86_MSR_EFER_NXE), %eax
wrmsr
/* Enable Paging */
movl %cr0, %eax
orl $CR0_PG, %eax
movl %eax, %cr0
/* Far return to enter 64-bit long mode */
leal (ApEnterLongMode - ArStartApplicationProcessor)(%ebx), %eax
pushl $KGDT_R0_CODE
pushl %eax
lretl
ApEnterLongMode:
/* Enter 64-bit long mode */
.code64
/* Clear all segment registers */
xorw %ax, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
movw %ax, %fs
movw %ax, %gs
/* Zero-extend EDI into RDI to ensure safe 64-bit pointer usage */
movl %edi, %edi
/* Load dedicated Stack for AP */
movq PROCESSOR_START_BLOCK_InitialStack(%rdi), %rsp
/* Save the pointer to PROCESSOR_START_BLOCK */
movq %rdi, %rcx
/* Allocate 32 bytes of shadow space */
subq $32, %rsp
/* Fetch the EntryPoint address and call the routine */
movq PROCESSOR_START_BLOCK_EntryPoint(%rdi), %rax
call *%rax
/* Fire the breakpoint and halt if the entry point returns */
.ApNoReturnPoint:
int $0x03
hlt
jmp .ApNoReturnPoint
/* Data section for temporary GDT */
.align 8
ApTemporaryGdtSize: .short ArStartApplicationProcessorEnd - ApTemporaryGdtDesc - 1
ApTemporaryGdtBase: .quad 0x0000000000000000
ApTemporaryGdtDesc: .quad 0x0000000000000000, 0x00CF9A000000FFFF, 0x00AF9A000000FFFF, 0x00CF92000000FFFF
.global ArStartApplicationProcessorEnd
ArStartApplicationProcessorEnd:

147
xtoskrnl/ar/amd64/boot.S Normal file
View File

@@ -0,0 +1,147 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/amd64/boot.S
* DESCRIPTION: AMD64-specific boot code for setting up the low-level CPU environment
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <ar/amd64/asmsup.h>
.altmacro
.text
/**
* Enables eXtended Physical Addressing (XPA).
*
* @param PageMap
* Supplies a pointer to the page map to be used.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global ArEnableExtendedPhysicalAddressing
ArEnableExtendedPhysicalAddressing:
/* Save the original CR4 register */
movq %cr4, %rax
/* Save the state of stack pointer and non-volatile registers */
movq %rsp, XpaRegisterSaveArea(%rip)
movq %rbp, XpaRegisterSaveArea+0x08(%rip)
movq %rax, XpaRegisterSaveArea+0x10(%rip)
movq %rbx, XpaRegisterSaveArea+0x18(%rip)
/* Save the original CR0 register */
movq %cr0, %rbp
/* Load temporary GDT required for mode transitions */
leaq XpaTemporaryGdtDesc(%rip), %rax
movq %rax, XpaTemporaryGdtBase(%rip)
lgdtq XpaTemporaryGdtSize(%rip)
/* Load addresses for entering compatibility mode and re-entering long mode */
leaq XpaEnterCompatMode(%rip), %rax
leaq XpaEnterLongMode(%rip), %rbx
/* Push the 32-bit code segment selector and the target address for a far jump */
pushq $GDT_R0_CMCODE
pushq %rax
/* Perform a far return to switch to 32-bit compatibility mode */
lretq
XpaEnterCompatMode:
/* Enter 32-bit compatibility mode */
.code32
/* Store the PageMap pointer on the stack for future use */
pushl %ecx
/* Set the stack segment to the 32-bit data segment selector */
movl $GDT_R0_DATA, %eax
movl %eax, %ss
/* Disable PGE and PCIDE to ensure all TLB entries will be flushed */
movl %cr4, %eax
andl $~(CR4_PGE | CR4_PCIDE), %eax
movl %eax, %cr4
/* Temporarily disable paging */
movl %ebp, %eax
andl $~CR0_PG, %eax
movl %eax, %cr0
/* Disable Long Mode as prerequisite for enabling 5-level paging */
movl $X86_MSR_EFER, %ecx
rdmsr
andl $~X86_MSR_EFER_LME, %eax
wrmsr
/* Transition to 5-level paging (PML5/LA57) */
movl %cr4, %eax
orl $CR4_LA57, %eax
movl %eax, %cr4
/* Restore the PageMap pointer from the stack and load it into CR3 */
popl %ecx
movl %ecx, %cr3
/* Re-enable Long Mode */
movl $X86_MSR_EFER, %ecx
rdmsr
orl $X86_MSR_EFER_LME, %eax
wrmsr
/* Restore CR0 with paging enabled and flush the instruction pipeline */
movl %ebp, %cr0
call XpaFlushInstructions
XpaFlushInstructions:
/* Push the 64-bit code segment selector and the target address for a far jump */
pushl $GDT_R0_CODE
pushl %ebx
/* Perform a far return to switch to 64-bit long mode */
lretl
XpaEnterLongMode:
/* Enter 64-bit long mode */
.code64
/* Restore the stack pointer and non-volatile registers */
movq XpaRegisterSaveArea(%rip), %rsp
movq XpaRegisterSaveArea+8(%rip), %rbp
movq XpaRegisterSaveArea+0x10(%rip), %rax
movq XpaRegisterSaveArea+0x18(%rip), %rbx
/* Restore the original CR4 register with LA57 bit set */
orq $CR4_LA57, %rax
movq %rax, %cr4
/* Return to the caller */
retq
/* Data section for saving registers and temporary GDT */
XpaRegisterSaveArea: .quad 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000
XpaTemporaryGdtSize: .short ArEnableExtendedPhysicalAddressingEnd - XpaTemporaryGdtDesc - 1
XpaTemporaryGdtBase: .quad 0x0000000000000000
XpaTemporaryGdtDesc: .quad 0x0000000000000000, 0x00CF9A000000FFFF, 0x00AF9A000000FFFF, 0x00CF92000000FFFF
.global ArEnableExtendedPhysicalAddressingEnd
ArEnableExtendedPhysicalAddressingEnd:
/**
* Starts an application processor (AP). This is just a stub.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global ArStartApplicationProcessor
ArStartApplicationProcessor:
.global ArStartApplicationProcessorEnd
ArStartApplicationProcessorEnd:

159
xtoskrnl/ar/amd64/cpufunc.cc
View File

@@ -18,7 +18,7 @@
*/
XTCDECL
VOID
AR::CpuFunctions::ClearInterruptFlag(VOID)
AR::CpuFunc::ClearInterruptFlag(VOID)
{
__asm__ volatile("cli");
}
@@ -29,13 +29,13 @@ AR::CpuFunctions::ClearInterruptFlag(VOID)
* @param Registers
* Supplies a pointer to the structure containing all the necessary registers and leafs for CPUID.
*
* @return This routine returns TRUE if CPUID function could be executed, FALSE otherwise.
* @return TRUE if CPUID function could be executed, FALSE otherwise.
*
* @since XT 1.0
*/
XTCDECL
BOOLEAN
AR::CpuFunctions::CpuId(IN OUT PCPUID_REGISTERS Registers)
AR::CpuFunc::CpuId(IN OUT PCPUID_REGISTERS Registers)
{
UINT32 MaxLeaf;
@@ -76,7 +76,7 @@ AR::CpuFunctions::CpuId(IN OUT PCPUID_REGISTERS Registers)
*/
XTCDECL
VOID
AR::CpuFunctions::FlushTlb(VOID)
AR::CpuFunc::FlushTlb(VOID)
{
/* Flush the TLB by resetting the CR3 */
WriteControlRegister(3, ReadControlRegister(3));
@@ -91,7 +91,7 @@ AR::CpuFunctions::FlushTlb(VOID)
*/
XTCDECL
ULONG
AR::CpuFunctions::GetCpuFlags(VOID)
AR::CpuFunc::GetCpuFlags(VOID)
{
ULONG_PTR Flags;
@@ -116,7 +116,7 @@ AR::CpuFunctions::GetCpuFlags(VOID)
XTASSEMBLY
XTCDECL
ULONG_PTR
AR::CpuFunctions::GetStackPointer(VOID)
AR::CpuFunc::GetStackPointer(VOID)
{
/* Get current stack pointer */
__asm__ volatile("movq %%rsp, %%rax\n"
@@ -135,7 +135,7 @@ AR::CpuFunctions::GetStackPointer(VOID)
*/
XTCDECL
VOID
AR::CpuFunctions::Halt(VOID)
AR::CpuFunc::Halt(VOID)
{
__asm__ volatile("hlt");
}
@@ -149,7 +149,7 @@ AR::CpuFunctions::Halt(VOID)
*/
XTCDECL
BOOLEAN
AR::CpuFunctions::InterruptsEnabled(VOID)
AR::CpuFunc::InterruptsEnabled(VOID)
{
ULONG_PTR Flags;
@@ -172,7 +172,7 @@ AR::CpuFunctions::InterruptsEnabled(VOID)
*/
XTCDECL
VOID
AR::CpuFunctions::InvalidateTlbEntry(IN PVOID Address)
AR::CpuFunc::InvalidateTlbEntry(IN PVOID Address)
{
__asm__ volatile("invlpg (%0)"
:
@@ -192,7 +192,7 @@ AR::CpuFunctions::InvalidateTlbEntry(IN PVOID Address)
*/
XTCDECL
VOID
AR::CpuFunctions::LoadGlobalDescriptorTable(IN PVOID Source)
AR::CpuFunc::LoadGlobalDescriptorTable(IN PVOID Source)
{
__asm__ volatile("lgdt %0"
:
@@ -212,7 +212,7 @@ AR::CpuFunctions::LoadGlobalDescriptorTable(IN PVOID Source)
*/
XTCDECL
VOID
AR::CpuFunctions::LoadInterruptDescriptorTable(IN PVOID Source)
AR::CpuFunc::LoadInterruptDescriptorTable(IN PVOID Source)
{
__asm__ volatile("lidt %0"
:
@@ -232,7 +232,7 @@ AR::CpuFunctions::LoadInterruptDescriptorTable(IN PVOID Source)
*/
XTCDECL
VOID
AR::CpuFunctions::LoadLocalDescriptorTable(IN USHORT Source)
AR::CpuFunc::LoadLocalDescriptorTable(IN USHORT Source)
{
__asm__ volatile("lldtw %0"
:
@@ -251,7 +251,7 @@ AR::CpuFunctions::LoadLocalDescriptorTable(IN USHORT Source)
*/
XTCDECL
VOID
AR::CpuFunctions::LoadMxcsrRegister(IN ULONG Source)
AR::CpuFunc::LoadMxcsrRegister(IN ULONG Source)
{
__asm__ volatile("ldmxcsr %0"
:
@@ -273,7 +273,7 @@ AR::CpuFunctions::LoadMxcsrRegister(IN ULONG Source)
*/
XTCDECL
VOID
AR::CpuFunctions::LoadSegment(IN USHORT Segment,
AR::CpuFunc::LoadSegment(IN USHORT Segment,
IN ULONG Source)
{
switch(Segment)
@@ -335,7 +335,7 @@ AR::CpuFunctions::LoadSegment(IN USHORT Segment,
*/
XTCDECL
VOID
AR::CpuFunctions::LoadTaskRegister(USHORT Source)
AR::CpuFunc::LoadTaskRegister(USHORT Source)
{
__asm__ volatile("ltr %0"
:
@@ -351,7 +351,7 @@ AR::CpuFunctions::LoadTaskRegister(USHORT Source)
*/
XTCDECL
VOID
AR::CpuFunctions::MemoryBarrier(VOID)
AR::CpuFunc::MemoryBarrier(VOID)
{
LONG Barrier;
__asm__ volatile("lock; orl $0, %0;"
@@ -365,13 +365,13 @@ AR::CpuFunctions::MemoryBarrier(VOID)
* @param ControlRegister
* Supplies a number of a control register which controls the general behavior of a CPU.
*
* @return This routine returns the value stored in the control register.
* @return The value stored in the control register.
*
* @since XT 1.0
*/
XTCDECL
ULONG_PTR
AR::CpuFunctions::ReadControlRegister(IN USHORT ControlRegister)
AR::CpuFunc::ReadControlRegister(IN USHORT ControlRegister)
{
ULONG_PTR Value;
@@ -429,13 +429,13 @@ AR::CpuFunctions::ReadControlRegister(IN USHORT ControlRegister)
* @param DebugRegister
* Supplies a number of a debug register to read from.
*
* @return This routine returns the value stored in the specified debug register.
* @return The value stored in the specified debug register.
*
* @since XT 1.0
*/
XTCDECL
ULONG_PTR
AR::CpuFunctions::ReadDebugRegister(IN USHORT DebugRegister)
AR::CpuFunc::ReadDebugRegister(IN USHORT DebugRegister)
{
ULONG_PTR Value;
@@ -498,13 +498,13 @@ AR::CpuFunctions::ReadDebugRegister(IN USHORT DebugRegister)
* @param Offset
* Specifies the offset from the beginning of GS segment.
*
* @return This routine returns the value read from the specified memory location relative to GS segment.
* @return Returns the value read from the specified memory location relative to GS segment.
*
* @since XT 1.0
*/
XTCDECL
ULONGLONG
AR::CpuFunctions::ReadGSQuadWord(ULONG Offset)
AR::CpuFunc::ReadGSQuadWord(ULONG Offset)
{
ULONGLONG Value;
@@ -527,7 +527,7 @@ AR::CpuFunctions::ReadGSQuadWord(ULONG Offset)
*/
XTCDECL
ULONGLONG
AR::CpuFunctions::ReadModelSpecificRegister(IN ULONG Register)
AR::CpuFunc::ReadModelSpecificRegister(IN ULONG Register)
{
ULONG Low, High;
@@ -548,7 +548,7 @@ AR::CpuFunctions::ReadModelSpecificRegister(IN ULONG Register)
*/
XTCDECL
UINT
AR::CpuFunctions::ReadMxCsrRegister(VOID)
AR::CpuFunc::ReadMxCsrRegister(VOID)
{
return __builtin_ia32_stmxcsr();
}
@@ -562,7 +562,7 @@ AR::CpuFunctions::ReadMxCsrRegister(VOID)
*/
XTCDECL
ULONGLONG
AR::CpuFunctions::ReadTimeStampCounter(VOID)
AR::CpuFunc::ReadTimeStampCounter(VOID)
{
ULONGLONG Low, High;
@@ -573,33 +573,6 @@ AR::CpuFunctions::ReadTimeStampCounter(VOID)
return ((ULONGLONG)High << 32) | Low;
}
/**
* Reads the current value of the CPU's time-stamp counter and processor ID.
*
* @param TscAux
* Supplies a pointer to a variable that receives the auxiliary TSC information (IA32_TSC_AUX).
*
* @return This routine returns the current instruction cycle count since the processor was last reset.
*
* @since XT 1.0
*/
XTCDECL
ULONGLONG
AR::CpuFunctions::ReadTimeStampCounterProcessor(OUT PULONG TscAux)
{
ULONG Low, High;
/* Execute the RDTSCP instruction */
__asm__ volatile("rdtscp"
: "=a" (Low),
"=d" (High),
"=c" (*TscAux)
);
/* Combine the two 32-bit registers into a single 64-bit unsigned integer and return the value */
return ((ULONGLONG)High << 32) | Low;
}
/**
* Orders memory accesses as seen by other processors, without fence.
*
@@ -609,7 +582,7 @@ AR::CpuFunctions::ReadTimeStampCounterProcessor(OUT PULONG TscAux)
*/
XTCDECL
VOID
AR::CpuFunctions::ReadWriteBarrier(VOID)
AR::CpuFunc::ReadWriteBarrier(VOID)
{
__asm__ volatile(""
:
@@ -617,56 +590,6 @@ AR::CpuFunctions::ReadWriteBarrier(VOID)
: "memory");
}
/**
* Performs a Bit Scan Forward instruction to locate the most significant set bit.
*
* @param Index
* Receives the zero-based index of the highest set bit when one is found.
*
* @param Mask
* Supplies the bitmap to scan.
*
* @return This routine returns TRUE when a set bit was found, otherwise FALSE.
*
* @since XT 1.0
*/
XTCDECL
BOOLEAN
AR::CpuFunctions::ScanForwardBit(OUT PULONG Index,
IN ULONG Mask)
{
/* Defer to the BSF instruction */
__asm__("bsfl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
/* Report whether the input had any bit set */
return Mask ? TRUE : FALSE;
}
/**
* Performs a Bit Scan Reverse instruction to locate the most significant set bit.
*
* @param Index
* Receives the zero-based index of the highest set bit when one is found.
*
* @param Mask
* Supplies the bitmap to scan.
*
* @return This routine returns TRUE when a set bit was found, otherwise FALSE.
*
* @since XT 1.0
*/
XTCDECL
BOOLEAN
AR::CpuFunctions::ScanReverseBit(OUT PULONG Index,
IN ULONG Mask)
{
/* Defer to the BSR instruction */
__asm__("bsrl %[Mask], %[Index]" : [Index] "=r" (*Index) : [Mask] "mr" (Mask));
/* Report whether the input had any bit set */
return Mask ? TRUE : FALSE;
}
/**
* Instructs the processor to set the interrupt flag.
*
@@ -676,7 +599,7 @@ AR::CpuFunctions::ScanReverseBit(OUT PULONG Index,
*/
XTCDECL
VOID
AR::CpuFunctions::SetInterruptFlag(VOID)
AR::CpuFunc::SetInterruptFlag(VOID)
{
__asm__ volatile("sti");
}
@@ -693,7 +616,7 @@ AR::CpuFunctions::SetInterruptFlag(VOID)
*/
XTCDECL
VOID
AR::CpuFunctions::StoreGlobalDescriptorTable(OUT PVOID Destination)
AR::CpuFunc::StoreGlobalDescriptorTable(OUT PVOID Destination)
{
__asm__ volatile("sgdt %0"
: "=m" (*(PSHORT)Destination)
@@ -713,7 +636,7 @@ AR::CpuFunctions::StoreGlobalDescriptorTable(OUT PVOID Destination)
*/
XTCDECL
VOID
AR::CpuFunctions::StoreInterruptDescriptorTable(OUT PVOID Destination)
AR::CpuFunc::StoreInterruptDescriptorTable(OUT PVOID Destination)
{
__asm__ volatile("sidt %0"
: "=m" (*(PSHORT)Destination)
@@ -733,7 +656,7 @@ AR::CpuFunctions::StoreInterruptDescriptorTable(OUT PVOID Destination)
*/
XTCDECL
VOID
AR::CpuFunctions::StoreLocalDescriptorTable(OUT PVOID Destination)
AR::CpuFunc::StoreLocalDescriptorTable(OUT PVOID Destination)
{
__asm__ volatile("sldt %0"
: "=m" (*(PSHORT)Destination)
@@ -756,8 +679,8 @@ AR::CpuFunctions::StoreLocalDescriptorTable(OUT PVOID Destination)
*/
XTCDECL
VOID
AR::CpuFunctions::StoreSegment(IN USHORT Segment,
OUT PVOID Destination)
AR::CpuFunc::StoreSegment(IN USHORT Segment,
OUT PVOID Destination)
{
switch(Segment)
{
@@ -803,7 +726,7 @@ AR::CpuFunctions::StoreSegment(IN USHORT Segment,
*/
XTCDECL
VOID
AR::CpuFunctions::StoreTaskRegister(OUT PVOID Destination)
AR::CpuFunc::StoreTaskRegister(OUT PVOID Destination)
{
__asm__ volatile("str %0"
: "=m" (*(PULONG)Destination)
@@ -826,8 +749,8 @@ AR::CpuFunctions::StoreTaskRegister(OUT PVOID Destination)
*/
XTCDECL
VOID
AR::CpuFunctions::WriteControlRegister(IN USHORT ControlRegister,
IN UINT_PTR Value)
AR::CpuFunc::WriteControlRegister(IN USHORT ControlRegister,
IN UINT_PTR Value)
{
/* Write a value into specified control register */
switch(ControlRegister)
@@ -885,8 +808,8 @@ AR::CpuFunctions::WriteControlRegister(IN USHORT ControlRegister,
*/
XTCDECL
VOID
AR::CpuFunctions::WriteDebugRegister(IN USHORT DebugRegister,
IN UINT_PTR Value)
AR::CpuFunc::WriteDebugRegister(IN USHORT DebugRegister,
IN UINT_PTR Value)
{
/* Write a value into specified debug register */
switch(DebugRegister)
@@ -962,7 +885,7 @@ AR::CpuFunctions::WriteDebugRegister(IN USHORT DebugRegister,
*/
XTCDECL
VOID
AR::CpuFunctions::WriteEflagsRegister(IN UINT_PTR Value)
AR::CpuFunc::WriteEflagsRegister(IN UINT_PTR Value)
{
__asm__ volatile("push %0\n"
"popf"
@@ -985,8 +908,8 @@ AR::CpuFunctions::WriteEflagsRegister(IN UINT_PTR Value)
*/
XTCDECL
VOID
AR::CpuFunctions::WriteModelSpecificRegister(IN ULONG Register,
IN ULONGLONG Value)
AR::CpuFunc::WriteModelSpecificRegister(IN ULONG Register,
IN ULONGLONG Value)
{
ULONG Low = Value & 0xFFFFFFFF;
ULONG High = Value >> 32;
@@ -1007,7 +930,7 @@ AR::CpuFunctions::WriteModelSpecificRegister(IN ULONG Register,
*/
XTCDECL
VOID
AR::CpuFunctions::YieldProcessor(VOID)
AR::CpuFunc::YieldProcessor(VOID)
{
__asm__ volatile("pause"
:

18
xtoskrnl/ar/amd64/data.cc
View File

@@ -10,25 +10,19 @@
/* Initial kernel boot stack */
UCHAR AR::ProcessorSupport::BootStack[KERNEL_STACK_SIZE] = {};
UCHAR AR::ProcSup::BootStack[KERNEL_STACK_SIZE] = {};
/* Initial kernel fault stack */
UCHAR AR::ProcessorSupport::FaultStack[KERNEL_STACK_SIZE] = {};
UCHAR AR::ProcSup::FaultStack[KERNEL_STACK_SIZE] = {};
/* Initial GDT */
KGDTENTRY AR::ProcessorSupport::InitialGdt[GDT_ENTRIES] = {};
KGDTENTRY AR::ProcSup::InitialGdt[GDT_ENTRIES] = {};
/* Initial IDT */
KIDTENTRY AR::ProcessorSupport::InitialIdt[IDT_ENTRIES] = {};
KIDTENTRY AR::ProcSup::InitialIdt[IDT_ENTRIES] = {};
/* Initial Processor Block */
KPROCESSOR_BLOCK AR::ProcessorSupport::InitialProcessorBlock;
KPROCESSOR_BLOCK AR::ProcSup::InitialProcessorBlock;
/* Initial TSS */
KTSS AR::ProcessorSupport::InitialTss;
/* Initial kernel NMI stack */
UCHAR AR::ProcessorSupport::NmiStack[KERNEL_STACK_SIZE] = {};
/* Unhandled interrupt routine */
PINTERRUPT_HANDLER AR::Traps::UnhandledInterruptRoutine = NULLPTR;
KTSS AR::ProcSup::InitialTss;

508
xtoskrnl/ar/amd64/procsup.cc
View File

@@ -18,35 +18,30 @@
*/
XTAPI
PVOID
AR::ProcessorSupport::GetBootStack(VOID)
AR::ProcSup::GetBootStack(VOID)
{
/* Return base address of kernel boot stack */
return (PVOID)((ULONG_PTR)BootStack + KERNEL_STACK_SIZE);
return (PVOID)BootStack;
}
XTAPI
VOID
AR::ProcessorSupport::GetTrampolineInformation(IN TRAMPOLINE_TYPE TrampolineType,
OUT PVOID *TrampolineCode,
OUT PULONG TrampolineSize)
AR::ProcSup::GetTrampolineInformation(IN TRAMPOLINE_TYPE TrampolineType,
OUT PVOID *TrampolineCode,
OUT PULONG_PTR TrampolineSize)
{
/* Get trampoline information */
switch(TrampolineType)
{
case TrampolineApStartup:
/* Get AP startup trampoline information */
*TrampolineCode = (PVOID)ArStartApplicationProcessor;
*TrampolineSize = (ULONG_PTR)ArStartApplicationProcessorEnd -
(ULONG_PTR)ArStartApplicationProcessor;
break;
case TrampolineEnableXpa:
/* Get Enable XPA trampoline information */
*TrampolineCode = (PVOID)ArEnableExtendedPhysicalAddressing;
*TrampolineSize = (ULONG_PTR)ArEnableExtendedPhysicalAddressingEnd -
(ULONG_PTR)ArEnableExtendedPhysicalAddressing;
break;
default:
/* Unknown trampoline type */
*TrampolineCode = NULLPTR;
*TrampolineSize = 0;
break;
@@ -63,19 +58,22 @@ AR::ProcessorSupport::GetTrampolineInformation(IN TRAMPOLINE_TYPE TrampolineType
*/
XTAPI
VOID
AR::ProcessorSupport::IdentifyProcessor(VOID)
AR::ProcSup::IdentifyProcessor(VOID)
{
PKPROCESSOR_CONTROL_BLOCK Prcb;
CPUID_REGISTERS CpuRegisters;
CPUID_SIGNATURE CpuSignature;
/* Not fully implemented yet */
UNIMPLEMENTED;
/* Get current processor control block */
Prcb = KE::Processor::GetCurrentProcessorControlBlock();
/* Get CPU vendor by issueing CPUID instruction */
RtlZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_VENDOR_STRING;
AR::CpuFunctions::CpuId(&CpuRegisters);
CpuFunc::CpuId(&CpuRegisters);
/* Store CPU vendor in processor control block */
Prcb->CpuId.Vendor = (CPU_VENDOR)CpuRegisters.Ebx;
@@ -87,7 +85,7 @@ AR::ProcessorSupport::IdentifyProcessor(VOID)
/* Get CPU standard features */
RtlZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_STANDARD1_FEATURES;
AR::CpuFunctions::CpuId(&CpuRegisters);
CpuFunc::CpuId(&CpuRegisters);
/* Store CPU signature in processor control block */
CpuSignature = *(PCPUID_SIGNATURE)&CpuRegisters.Eax;
@@ -99,23 +97,23 @@ AR::ProcessorSupport::IdentifyProcessor(VOID)
if(Prcb->CpuId.Vendor == CPU_VENDOR_AMD)
{
/* AMD CPU */
if(CpuSignature.Family == 0xF)
if(Prcb->CpuId.Family >= 0xF)
{
Prcb->CpuId.Family += CpuSignature.ExtendedFamily;
Prcb->CpuId.Model += (CpuSignature.ExtendedModel << 4);
Prcb->CpuId.Family = Prcb->CpuId.Family + CpuSignature.ExtendedFamily;
Prcb->CpuId.Model = Prcb->CpuId.Model + (CpuSignature.ExtendedModel << 4);
}
}
else if(Prcb->CpuId.Vendor == CPU_VENDOR_INTEL)
{
/* Intel CPU */
if(CpuSignature.Family == 0xF)
if(Prcb->CpuId.Family == 0xF)
{
Prcb->CpuId.Family += CpuSignature.ExtendedFamily;
Prcb->CpuId.Family = Prcb->CpuId.Family + CpuSignature.ExtendedFamily;
}
if((CpuSignature.Family == 0x6) || (CpuSignature.Family == 0xF))
if((Prcb->CpuId.Family == 0x6) || (Prcb->CpuId.Family == 0xF))
{
Prcb->CpuId.Model += (CpuSignature.ExtendedModel << 4);
Prcb->CpuId.Model = Prcb->CpuId.Model + (CpuSignature.ExtendedModel << 4);
}
}
else
@@ -124,12 +122,11 @@ AR::ProcessorSupport::IdentifyProcessor(VOID)
Prcb->CpuId.Vendor = CPU_VENDOR_UNKNOWN;
}
/* Identify processor features */
IdentifyProcessorFeatures();
/* TODO: Store a list of CPU features in processor control block */
}
/**
* Identifies processor features and stores them in Processor Control Block (PRCB).
* Initializes AMD64 processor specific structures.
*
* @return This routine does not return any value.
*
@@ -137,133 +134,70 @@ AR::ProcessorSupport::IdentifyProcessor(VOID)
*/
XTAPI
VOID
AR::ProcessorSupport::IdentifyProcessorFeatures(VOID)
AR::ProcSup::InitializeProcessor(IN PVOID ProcessorStructures)
{
ULONG MaxExtendedLeaf, MaxStandardLeaf;
PKPROCESSOR_CONTROL_BLOCK Prcb;
CPUID_REGISTERS CpuRegisters;
KDESCRIPTOR GdtDescriptor, IdtDescriptor;
PVOID KernelBootStack, KernelFaultStack;
PKPROCESSOR_BLOCK ProcessorBlock;
PKGDTENTRY Gdt;
PKIDTENTRY Idt;
PKTSS Tss;
/* Get current processor control block */
Prcb = KE::Processor::GetCurrentProcessorControlBlock();
/* Get maximum CPUID standard leaf */
RTL::Memory::ZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_VENDOR_STRING;
AR::CpuFunctions::CpuId(&CpuRegisters);
MaxStandardLeaf = CpuRegisters.Eax;
/* Get maximum CPUID extended leaf */
RTL::Memory::ZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_EXTENDED_MAX;
AR::CpuFunctions::CpuId(&CpuRegisters);
MaxExtendedLeaf = CpuRegisters.Eax;
/* Check if CPU supports standard features leaf */
if(MaxStandardLeaf >= CPUID_GET_STANDARD1_FEATURES)
/* Check if processor structures buffer provided */
if(ProcessorStructures)
{
/* Get CPU standard features */
RTL::Memory::ZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_STANDARD1_FEATURES;
AR::CpuFunctions::CpuId(&CpuRegisters);
/* Assign CPU structures from provided buffer */
InitializeProcessorStructures(ProcessorStructures, &Gdt, &Tss, &ProcessorBlock,
&KernelBootStack, &KernelFaultStack);
/* Store CPU standard features in processor control block */
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_SSE3) Prcb->CpuId.FeatureBits |= KCF_SSE3;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_VMX) Prcb->CpuId.FeatureBits |= KCF_VMX;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_SSSE3) Prcb->CpuId.FeatureBits |= KCF_SSSE3;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_SSE4_1) Prcb->CpuId.FeatureBits |= KCF_SSE41;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_SSE4_2) Prcb->CpuId.FeatureBits |= KCF_SSE42;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_X2APIC) Prcb->CpuId.FeatureBits |= KCF_X2APIC;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_POPCNT) Prcb->CpuId.FeatureBits |= KCF_POPCNT;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_TSC_DEADLINE) Prcb->CpuId.FeatureBits |= KCF_TSC_DEADLINE;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_AES) Prcb->CpuId.FeatureBits |= KCF_AES;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_XSAVE) Prcb->CpuId.FeatureBits |= KCF_XSAVE;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_AVX) Prcb->CpuId.FeatureBits |= KCF_AVX;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_RDRAND) Prcb->CpuId.FeatureBits |= KCF_RDRAND;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_VME) Prcb->CpuId.FeatureBits |= KCF_VME;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_PSE) Prcb->CpuId.FeatureBits |= KCF_LARGE_PAGE;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_TSC) Prcb->CpuId.FeatureBits |= KCF_RDTSC;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_PAE) Prcb->CpuId.FeatureBits |= KCF_PAE;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_MCE) Prcb->CpuId.FeatureBits |= KCF_MCE;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_CX8) Prcb->CpuId.FeatureBits |= KCF_CMPXCHG8B;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_APIC) Prcb->CpuId.FeatureBits |= KCF_APIC;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_SEP) Prcb->CpuId.FeatureBits |= KCF_FAST_SYSCALL;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_MTRR) Prcb->CpuId.FeatureBits |= KCF_MTRR;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_PGE) Prcb->CpuId.FeatureBits |= KCF_GLOBAL_PAGE;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_MCA) Prcb->CpuId.FeatureBits |= KCF_MCA;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_CMOV) Prcb->CpuId.FeatureBits |= KCF_CMOV;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_PAT) Prcb->CpuId.FeatureBits |= KCF_PAT;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_PSE36) Prcb->CpuId.FeatureBits |= KCF_PSE36;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_CLFLUSH) Prcb->CpuId.FeatureBits |= KCF_CLFLUSH;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_FXSR) Prcb->CpuId.FeatureBits |= KCF_FXSR;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_ACPI) Prcb->CpuId.FeatureBits |= KCF_ACPI;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_MMX) Prcb->CpuId.FeatureBits |= KCF_MMX;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_SSE) Prcb->CpuId.FeatureBits |= KCF_SSE;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_SSE2) Prcb->CpuId.FeatureBits |= KCF_SSE2;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_HTT) Prcb->CpuId.FeatureBits |= KCF_SMT;
/* Use global IDT */
Idt = InitialIdt;
}
else
{
/* Use initial structures */
Gdt = InitialGdt;
Idt = InitialIdt;
Tss = &InitialTss;
KernelBootStack = &BootStack;
KernelFaultStack = &FaultStack;
ProcessorBlock = &InitialProcessorBlock;
}
/* Check if CPU supports standard7 features leaf */
if(MaxStandardLeaf >= CPUID_GET_STANDARD7_FEATURES)
{
/* Get CPU standard features */
RTL::Memory::ZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_STANDARD7_FEATURES;
AR::CpuFunctions::CpuId(&CpuRegisters);
/* Initialize processor block */
InitializeProcessorBlock(ProcessorBlock, Gdt, Idt, Tss, KernelFaultStack);
/* Store CPU standard7 features in processor control block */
if(CpuRegisters.Ebx & CPUID_FEATURES_EBX_FSGSBASE) Prcb->CpuId.FeatureBits |= KCF_FSGSBASE;
if(CpuRegisters.Ebx & CPUID_FEATURES_EBX_AVX2) Prcb->CpuId.FeatureBits |= KCF_AVX2;
if(CpuRegisters.Ebx & CPUID_FEATURES_EBX_SMEP) Prcb->CpuId.FeatureBits |= KCF_SMEP;
if(CpuRegisters.Ebx & CPUID_FEATURES_EBX_RDSEED) Prcb->CpuId.FeatureBits |= KCF_RDSEED;
if(CpuRegisters.Ebx & CPUID_FEATURES_EBX_SMAP) Prcb->CpuId.FeatureBits |= KCF_SMAP;
if(CpuRegisters.Ebx & CPUID_FEATURES_EBX_SHA) Prcb->CpuId.FeatureBits |= KCF_SHA;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_LA57) Prcb->CpuId.FeatureBits |= KCF_LA57;
}
/* Initialize GDT, IDT and TSS */
InitializeGdt(ProcessorBlock);
InitializeIdt(ProcessorBlock);
InitializeTss(ProcessorBlock, KernelBootStack, KernelFaultStack);
/* Check if CPU supports power management leaf */
if(MaxStandardLeaf >= CPUID_GET_POWER_MANAGEMENT)
{
/* Get CPU power management features */
RTL::Memory::ZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_POWER_MANAGEMENT;
AR::CpuFunctions::CpuId(&CpuRegisters);
/* Set GDT and IDT descriptors */
GdtDescriptor.Base = Gdt;
GdtDescriptor.Limit = (GDT_ENTRIES * sizeof(KGDTENTRY)) - 1;
IdtDescriptor.Base = Idt;
IdtDescriptor.Limit = (IDT_ENTRIES * sizeof(KIDTENTRY)) - 1;
/* Store CPU power management features in processor control block */
if(CpuRegisters.Eax & CPUID_FEATURES_EAX_ARAT) Prcb->CpuId.FeatureBits |= KCF_ARAT;
}
/* Load GDT, IDT and TSS */
CpuFunc::LoadGlobalDescriptorTable(&GdtDescriptor.Limit);
CpuFunc::LoadInterruptDescriptorTable(&IdtDescriptor.Limit);
CpuFunc::LoadTaskRegister((UINT)KGDT_SYS_TSS);
/* Check if CPU supports extended features leaf */
if(MaxExtendedLeaf >= CPUID_GET_EXTENDED_FEATURES)
{
/* Get CPU extended features */
RTL::Memory::ZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_EXTENDED_FEATURES;
AR::CpuFunctions::CpuId(&CpuRegisters);
/* Enter passive IRQ level */
HL::RunLevel::SetRunLevel(PASSIVE_LEVEL);
/* Store CPU extended features in processor control block */
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_SVM) Prcb->CpuId.ExtendedFeatureBits |= KCF_SVM;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_SSE4A) Prcb->CpuId.ExtendedFeatureBits |= KCF_SSE4A;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_FMA4) Prcb->CpuId.ExtendedFeatureBits |= KCF_FMA4;
if(CpuRegisters.Ecx & CPUID_FEATURES_ECX_TOPOLOGY_EXTENSIONS) Prcb->CpuId.ExtendedFeatureBits |= KCF_TOPOEXT;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_SYSCALL_SYSRET) Prcb->CpuId.ExtendedFeatureBits |= KCF_SYSCALL;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_NX) Prcb->CpuId.ExtendedFeatureBits |= KCF_NX_BIT;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_RDTSCP) Prcb->CpuId.ExtendedFeatureBits |= KCF_RDTSCP;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_LONG_MODE) Prcb->CpuId.ExtendedFeatureBits |= KCF_64BIT;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_3DNOW_EXT) Prcb->CpuId.ExtendedFeatureBits |= KCF_3DNOW_EXT;
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_3DNOW) Prcb->CpuId.ExtendedFeatureBits |= KCF_3DNOW;
}
/* Initialize segment registers */
InitializeSegments();
/* Check if CPU supports advanced power management leaf */
if(MaxExtendedLeaf >= CPUID_GET_ADVANCED_POWER_MANAGEMENT)
{
/* Get CPU advanced power management features */
RTL::Memory::ZeroMemory(&CpuRegisters, sizeof(CPUID_REGISTERS));
CpuRegisters.Leaf = CPUID_GET_ADVANCED_POWER_MANAGEMENT;
AR::CpuFunctions::CpuId(&CpuRegisters);
/* Set GS base */
CpuFunc::WriteModelSpecificRegister(X86_MSR_GSBASE, (ULONGLONG)ProcessorBlock);
CpuFunc::WriteModelSpecificRegister(X86_MSR_KERNEL_GSBASE, (ULONGLONG)ProcessorBlock);
/* Store CPU advanced power management features in processor control block */
if(CpuRegisters.Edx & CPUID_FEATURES_EDX_TSCI) Prcb->CpuId.ExtendedFeatureBits |= KCF_INVARIANT_TSC;
}
/* Initialize processor registers */
InitializeProcessorRegisters();
/* Identify processor */
IdentifyProcessor();
}
/**
@@ -278,7 +212,7 @@ AR::ProcessorSupport::IdentifyProcessorFeatures(VOID)
*/
XTAPI
VOID
AR::ProcessorSupport::InitializeGdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
AR::ProcSup::InitializeGdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
{
/* Initialize GDT entries */
SetGdtEntry(ProcessorBlock->GdtBase, KGDT_NULL, 0x0, 0x0, KGDT_TYPE_NONE, KGDT_DPL_SYSTEM, 1);
@@ -307,7 +241,7 @@ AR::ProcessorSupport::InitializeGdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
*/
XTAPI
VOID
AR::ProcessorSupport::InitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
AR::ProcSup::InitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
{
UINT Vector;
@@ -315,106 +249,34 @@ AR::ProcessorSupport::InitializeIdt(IN PKPROCESSOR_BLOCK ProcessorBlock)
for(Vector = 0; Vector < IDT_ENTRIES; Vector++)
{
/* Set the IDT to handle unexpected interrupts */
SetIdtGate(ProcessorBlock->IdtBase, Vector, (PVOID)ArInterruptEntry[Vector], KGDT_R0_CODE,
KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, Vector, (PVOID)ArTrap0xFF, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
}
/* Setup IDT handlers for known interrupts and traps */
SetIdtGate(ProcessorBlock->IdtBase, 0x00, (PVOID)ArTrapEntry[0x00], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x01, (PVOID)ArTrapEntry[0x01], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x02, (PVOID)ArTrapEntry[0x02], KGDT_R0_CODE, KIDT_IST_NMI, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x03, (PVOID)ArTrapEntry[0x03], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x04, (PVOID)ArTrapEntry[0x04], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x05, (PVOID)ArTrapEntry[0x05], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x06, (PVOID)ArTrapEntry[0x06], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x07, (PVOID)ArTrapEntry[0x07], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x08, (PVOID)ArTrapEntry[0x08], KGDT_R0_CODE, KIDT_IST_PANIC, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x09, (PVOID)ArTrapEntry[0x09], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x0A, (PVOID)ArTrapEntry[0x0A], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x0B, (PVOID)ArTrapEntry[0x0B], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x0C, (PVOID)ArTrapEntry[0x0C], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x0D, (PVOID)ArTrapEntry[0x0D], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x0E, (PVOID)ArTrapEntry[0x0E], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x10, (PVOID)ArTrapEntry[0x10], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x11, (PVOID)ArTrapEntry[0x11], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x12, (PVOID)ArTrapEntry[0x12], KGDT_R0_CODE, KIDT_IST_MCA, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x13, (PVOID)ArTrapEntry[0x13], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x1F, (PVOID)ArTrapEntry[0x1F], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x2C, (PVOID)ArTrapEntry[0x2C], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3, AMD64_INTERRUPT_GATE);
SetIdtGate(ProcessorBlock->IdtBase, 0x2D, (PVOID)ArTrapEntry[0x2D], KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3, AMD64_INTERRUPT_GATE);
}
/**
* Initializes AMD64 processor specific structures.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
AR::ProcessorSupport::InitializeProcessor(IN PVOID ProcessorStructures)
{
PVOID KernelBootStack, KernelFaultStack, KernelNmiStack;
KDESCRIPTOR GdtDescriptor, IdtDescriptor;
PKPROCESSOR_BLOCK ProcessorBlock;
PKGDTENTRY Gdt;
PKIDTENTRY Idt;
PKTSS Tss;
/* Check if processor structures buffer provided */
if(ProcessorStructures)
{
/* Assign CPU structures from provided buffer */
InitializeProcessorStructures(ProcessorStructures, &Gdt, &Tss, &ProcessorBlock,
&KernelBootStack, &KernelFaultStack, &KernelNmiStack);
/* Use global IDT */
Idt = InitialIdt;
}
else
{
/* Use initial structures */
Gdt = InitialGdt;
Idt = InitialIdt;
Tss = &InitialTss;
KernelBootStack = (PVOID)((ULONG_PTR)&BootStack + KERNEL_STACK_SIZE);
KernelFaultStack = (PVOID)((ULONG_PTR)&FaultStack + KERNEL_STACK_SIZE);
KernelNmiStack = (PVOID)((ULONG_PTR)&NmiStack + KERNEL_STACK_SIZE);
ProcessorBlock = &InitialProcessorBlock;
}
/* Initialize processor block */
InitializeProcessorBlock(ProcessorBlock, Gdt, Idt, Tss, KernelFaultStack);
/* Initialize GDT, IDT and TSS */
InitializeGdt(ProcessorBlock);
InitializeIdt(ProcessorBlock);
InitializeTss(ProcessorBlock, KernelBootStack, KernelFaultStack, KernelNmiStack);
/* Set GDT and IDT descriptors */
GdtDescriptor.Base = Gdt;
GdtDescriptor.Limit = (GDT_ENTRIES * sizeof(KGDTENTRY)) - 1;
IdtDescriptor.Base = Idt;
IdtDescriptor.Limit = (IDT_ENTRIES * sizeof(KIDTENTRY)) - 1;
/* Load GDT, IDT and TSS */
AR::CpuFunctions::LoadGlobalDescriptorTable(&GdtDescriptor.Limit);
AR::CpuFunctions::LoadInterruptDescriptorTable(&IdtDescriptor.Limit);
AR::CpuFunctions::LoadTaskRegister((UINT)KGDT_SYS_TSS);
/* Initialize segment registers */
InitializeSegments();
/* Set GS base */
AR::CpuFunctions::WriteModelSpecificRegister(X86_MSR_GSBASE, (ULONGLONG)ProcessorBlock);
AR::CpuFunctions::WriteModelSpecificRegister(X86_MSR_KERNEL_GSBASE, (ULONGLONG)ProcessorBlock);
/* Initialize processor registers */
InitializeProcessorRegisters();
/* Identify processor */
IdentifyProcessor();
SetIdtGate(ProcessorBlock->IdtBase, 0x00, (PVOID)ArTrap0x00, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x01, (PVOID)ArTrap0x01, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x02, (PVOID)ArTrap0x02, KGDT_R0_CODE, KIDT_IST_PANIC, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x03, (PVOID)ArTrap0x03, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x04, (PVOID)ArTrap0x04, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x05, (PVOID)ArTrap0x05, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x06, (PVOID)ArTrap0x06, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x07, (PVOID)ArTrap0x07, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x08, (PVOID)ArTrap0x08, KGDT_R0_CODE, KIDT_IST_PANIC, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x09, (PVOID)ArTrap0x09, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0A, (PVOID)ArTrap0x0A, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0B, (PVOID)ArTrap0x0B, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0C, (PVOID)ArTrap0x0C, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0D, (PVOID)ArTrap0x0D, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x0E, (PVOID)ArTrap0x0E, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x10, (PVOID)ArTrap0x10, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x11, (PVOID)ArTrap0x11, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x12, (PVOID)ArTrap0x12, KGDT_R0_CODE, KIDT_IST_MCA, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x13, (PVOID)ArTrap0x13, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x1F, (PVOID)ArTrap0x1F, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0x2C, (PVOID)ArTrap0x2C, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2D, (PVOID)ArTrap0x2D, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING3);
SetIdtGate(ProcessorBlock->IdtBase, 0x2F, (PVOID)ArTrap0x2F, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
SetIdtGate(ProcessorBlock->IdtBase, 0xE1, (PVOID)ArTrap0xE1, KGDT_R0_CODE, KIDT_IST_RESERVED, KIDT_ACCESS_RING0);
}
/**
@@ -438,11 +300,11 @@ AR::ProcessorSupport::InitializeProcessor(IN PVOID ProcessorStructures)
*/
XTAPI
VOID
AR::ProcessorSupport::InitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
IN PKGDTENTRY Gdt,
IN PKIDTENTRY Idt,
IN PKTSS Tss,
IN PVOID DpcStack)
AR::ProcSup::InitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBlock,
IN PKGDTENTRY Gdt,
IN PKIDTENTRY Idt,
IN PKTSS Tss,
IN PVOID DpcStack)
{
/* Set processor block and processor control block */
ProcessorBlock->Self = ProcessorBlock;
@@ -475,9 +337,8 @@ AR::ProcessorSupport::InitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBl
/* Set initial MXCSR register value */
ProcessorBlock->Prcb.MxCsr = INITIAL_MXCSR;
/* Set initial runlevel and mark processor as started */
/* Set initial runlevel */
ProcessorBlock->RunLevel = PASSIVE_LEVEL;
ProcessorBlock->Started = TRUE;
}
/**
@@ -489,51 +350,50 @@ AR::ProcessorSupport::InitializeProcessorBlock(OUT PKPROCESSOR_BLOCK ProcessorBl
*/
XTAPI
VOID
AR::ProcessorSupport::InitializeProcessorRegisters(VOID)
AR::ProcSup::InitializeProcessorRegisters(VOID)
{
ULONGLONG PatAttributes;
/* Enable FXSAVE restore */
AR::CpuFunctions::WriteControlRegister(4, AR::CpuFunctions::ReadControlRegister(4) | CR4_FXSR);
CpuFunc::WriteControlRegister(4, CpuFunc::ReadControlRegister(4) | CR4_FXSR);
/* Enable XMMI exceptions */
AR::CpuFunctions::WriteControlRegister(4, AR::CpuFunctions::ReadControlRegister(4) | CR4_XMMEXCPT);
CpuFunc::WriteControlRegister(4, CpuFunc::ReadControlRegister(4) | CR4_XMMEXCPT);
/* Set debugger extension */
AR::CpuFunctions::WriteControlRegister(4, AR::CpuFunctions::ReadControlRegister(4) | CR4_DE);
CpuFunc::WriteControlRegister(4, CpuFunc::ReadControlRegister(4) | CR4_DE);
/* Enable large pages */
AR::CpuFunctions::WriteControlRegister(4, AR::CpuFunctions::ReadControlRegister(4) | CR4_PSE);
CpuFunc::WriteControlRegister(4, CpuFunc::ReadControlRegister(4) | CR4_PSE);
/* Enable write-protection */
AR::CpuFunctions::WriteControlRegister(0, AR::CpuFunctions::ReadControlRegister(0) | CR0_WP);
CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) | CR0_WP);
/* Set alignment mask */
AR::CpuFunctions::WriteControlRegister(0, AR::CpuFunctions::ReadControlRegister(0) | CR0_AM);
CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) | CR0_AM);
/* Disable FPU monitoring */
AR::CpuFunctions::WriteControlRegister(0, AR::CpuFunctions::ReadControlRegister(0) & ~CR0_MP);
CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) & ~CR0_MP);
/* Disable x87 FPU exceptions */
AR::CpuFunctions::WriteControlRegister(0, AR::CpuFunctions::ReadControlRegister(0) & ~CR0_NE);
CpuFunc::WriteControlRegister(0, CpuFunc::ReadControlRegister(0) & ~CR0_NE);
/* Flush the TLB */
AR::CpuFunctions::FlushTlb();
CpuFunc::FlushTlb();
/* Initialize system call MSRs */
AR::Traps::InitializeSystemCallMsrs();
Traps::InitializeSystemCallMsrs();
/* Enable No-Execute (NXE) in EFER MSR */
AR::CpuFunctions::WriteModelSpecificRegister(X86_MSR_EFER,
CpuFunctions::ReadModelSpecificRegister(X86_MSR_EFER) | X86_MSR_EFER_NXE);
CpuFunc::WriteModelSpecificRegister(X86_MSR_EFER, CpuFunc::ReadModelSpecificRegister(X86_MSR_EFER) | X86_MSR_EFER_NXE);
/* Initialize Page Attribute Table */
PatAttributes = (PAT_TYPE_WB << 0) | (PAT_TYPE_USWC << 8) | (PAT_TYPE_WEAK_UC << 16) | (PAT_TYPE_STRONG_UC << 24) |
(PAT_TYPE_WB << 32) | (PAT_TYPE_USWC << 40) | (PAT_TYPE_WEAK_UC << 48) | (PAT_TYPE_STRONG_UC << 56);
AR::CpuFunctions::WriteModelSpecificRegister(X86_MSR_PAT, PatAttributes);
CpuFunc::WriteModelSpecificRegister(X86_MSR_PAT, PatAttributes);
/* Initialize MXCSR register */
AR::CpuFunctions::LoadMxcsrRegister(INITIAL_MXCSR);
CpuFunc::LoadMxcsrRegister(INITIAL_MXCSR);
}
/**
@@ -563,13 +423,12 @@ AR::ProcessorSupport::InitializeProcessorRegisters(VOID)
*/
XTAPI
VOID
AR::ProcessorSupport::InitializeProcessorStructures(IN PVOID ProcessorStructures,
OUT PKGDTENTRY *Gdt,
OUT PKTSS *Tss,
OUT PKPROCESSOR_BLOCK *ProcessorBlock,
OUT PVOID *KernelBootStack,
OUT PVOID *KernelFaultStack,
OUT PVOID *KernelNmiStack)
AR::ProcSup::InitializeProcessorStructures(IN PVOID ProcessorStructures,
OUT PKGDTENTRY *Gdt,
OUT PKTSS *Tss,
OUT PKPROCESSOR_BLOCK *ProcessorBlock,
OUT PVOID *KernelBootStack,
OUT PVOID *KernelFaultStack)
{
UINT_PTR Address;
@@ -577,49 +436,22 @@ AR::ProcessorSupport::InitializeProcessorStructures(IN PVOID ProcessorStructures
Address = ROUND_UP((UINT_PTR)ProcessorStructures, MM_PAGE_SIZE) + KERNEL_STACK_SIZE;
/* Assign a space for kernel boot stack and advance */
if(KernelBootStack != NULLPTR)
{
/* Return kernel boot stack address */
*KernelBootStack = (PVOID)Address;
}
*KernelBootStack = (PVOID)Address;
Address += KERNEL_STACK_SIZE;
/* Assign a space for kernel fault stack and advance */
if(KernelFaultStack != NULLPTR)
{
/* Return kernel fault stack address */
*KernelFaultStack = (PVOID)Address;
}
Address += KERNEL_STACK_SIZE;
/* Assign a space for kernel NMI stack, no advance needed as stack grows down */
if(KernelNmiStack != NULLPTR)
{
/* Return kernel NMI stack address */
*KernelNmiStack = (PVOID)Address;
}
/* Assign a space for kernel fault stack, no advance needed as stack grows down */
*KernelFaultStack = (PVOID)Address;
/* Assign a space for GDT and advance */
if(Gdt != NULLPTR)
{
/* Return GDT base address */
*Gdt = (PKGDTENTRY)(PVOID)Address;
}
Address += (GDT_ENTRIES * sizeof(KGDTENTRY));
/* Assign a space for TSS and advance */
if(Tss != NULLPTR)
{
*Tss = (PKTSS)(PVOID)Address;
}
Address += sizeof(KTSS);
*Gdt = (PKGDTENTRY)(PVOID)Address;
Address += sizeof(InitialGdt);
/* Assign a space for Processor Block and advance */
if(ProcessorBlock != NULLPTR)
{
/* Return processor block address */
*ProcessorBlock = (PKPROCESSOR_BLOCK)(PVOID)Address;
}
*ProcessorBlock = (PKPROCESSOR_BLOCK)(PVOID)Address;
Address += sizeof(InitialProcessorBlock);
/* Assign a space for TSS */
*Tss = (PKTSS)(PVOID)Address;
}
/**
@@ -631,15 +463,15 @@ AR::ProcessorSupport::InitializeProcessorStructures(IN PVOID ProcessorStructures
*/
XTAPI
VOID
AR::ProcessorSupport::InitializeSegments(VOID)
AR::ProcSup::InitializeSegments(VOID)
{
/* Initialize segments */
AR::CpuFunctions::LoadSegment(SEGMENT_CS, KGDT_R0_CODE);
AR::CpuFunctions::LoadSegment(SEGMENT_DS, KGDT_R3_DATA | RPL_MASK);
AR::CpuFunctions::LoadSegment(SEGMENT_ES, KGDT_R3_DATA | RPL_MASK);
AR::CpuFunctions::LoadSegment(SEGMENT_FS, KGDT_R3_CMTEB | RPL_MASK);
AR::CpuFunctions::LoadSegment(SEGMENT_GS, KGDT_R3_DATA | RPL_MASK);
AR::CpuFunctions::LoadSegment(SEGMENT_SS, KGDT_R0_DATA);
CpuFunc::LoadSegment(SEGMENT_CS, KGDT_R0_CODE);
CpuFunc::LoadSegment(SEGMENT_DS, KGDT_R3_DATA | RPL_MASK);
CpuFunc::LoadSegment(SEGMENT_ES, KGDT_R3_DATA | RPL_MASK);
CpuFunc::LoadSegment(SEGMENT_FS, KGDT_R3_CMTEB | RPL_MASK);
CpuFunc::LoadSegment(SEGMENT_GS, KGDT_R3_DATA | RPL_MASK);
CpuFunc::LoadSegment(SEGMENT_SS, KGDT_R0_DATA);
}
/**
@@ -657,10 +489,9 @@ AR::ProcessorSupport::InitializeSegments(VOID)
*/
XTAPI
VOID
AR::ProcessorSupport::InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelBootStack,
IN PVOID KernelFaultStack,
IN PVOID KernelNmiStack)
AR::ProcSup::InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
IN PVOID KernelBootStack,
IN PVOID KernelFaultStack)
{
/* Fill TSS with zeroes */
RtlZeroMemory(ProcessorBlock->TssBase, sizeof(KTSS));
@@ -670,7 +501,6 @@ AR::ProcessorSupport::InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
ProcessorBlock->TssBase->Rsp0 = (ULONG_PTR)KernelBootStack;
ProcessorBlock->TssBase->Ist[KIDT_IST_PANIC] = (ULONG_PTR)KernelFaultStack;
ProcessorBlock->TssBase->Ist[KIDT_IST_MCA] = (ULONG_PTR)KernelFaultStack;
ProcessorBlock->TssBase->Ist[KIDT_IST_NMI] = (ULONG_PTR)KernelNmiStack;
}
/**
@@ -703,13 +533,13 @@ AR::ProcessorSupport::InitializeTss(IN PKPROCESSOR_BLOCK ProcessorBlock,
*/
XTAPI
VOID
AR::ProcessorSupport::SetGdtEntry(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base,
IN ULONG Limit,
IN UCHAR Type,
IN UCHAR Dpl,
IN UCHAR SegmentMode)
AR::ProcSup::SetGdtEntry(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base,
IN ULONG Limit,
IN UCHAR Type,
IN UCHAR Dpl,
IN UCHAR SegmentMode)
{
PKGDTENTRY GdtEntry;
UCHAR Granularity;
@@ -769,9 +599,9 @@ AR::ProcessorSupport::SetGdtEntry(IN PKGDTENTRY Gdt,
*/
XTAPI
VOID
AR::ProcessorSupport::SetGdtEntryBase(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base)
AR::ProcSup::SetGdtEntryBase(IN PKGDTENTRY Gdt,
IN USHORT Selector,
IN ULONG_PTR Base)
{
PKGDTENTRY GdtEntry;
@@ -806,36 +636,26 @@ AR::ProcessorSupport::SetGdtEntryBase(IN PKGDTENTRY Gdt,
* @param Access
* Supplies the gate access rights.
*
* @param Type
* Supplies the gate type.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
VOID
AR::ProcessorSupport::SetIdtGate(IN PKIDTENTRY Idt,
IN USHORT Vector,
IN PVOID Handler,
IN USHORT Selector,
IN USHORT Ist,
IN USHORT Dpl,
IN USHORT Type)
AR::ProcSup::SetIdtGate(IN PKIDTENTRY Idt,
IN USHORT Vector,
IN PVOID Handler,
IN USHORT Selector,
IN USHORT Ist,
IN USHORT Access)
{
/* Set the handler's address */
/* Setup the gate */
Idt[Vector].OffsetLow = ((ULONG_PTR)Handler & 0xFFFF);
Idt[Vector].OffsetMiddle = (((ULONG_PTR)Handler >> 16) & 0xFFFF);
Idt[Vector].OffsetHigh = (ULONG_PTR)Handler >> 32;
/* Set the code segment selector */
Idt[Vector].Selector = Selector;
/* Initialize the gate's attributes and flags */
Idt[Vector].Access = 0;
Idt[Vector].Dpl = Dpl;
Idt[Vector].Dpl = Access;
Idt[Vector].IstIndex = Ist;
Idt[Vector].Present = 1;
Idt[Vector].Reserved1 = 0;
Idt[Vector].Type = Type;
Idt[Vector].Selector = Selector;
Idt[Vector].Type = 0xE;
}

105
xtoskrnl/ar/amd64/traps.cc
View File

@@ -9,44 +9,6 @@
#include <xtos.hh>
/**
* Dispatches the interrupt provided by common interrupt handler.
*
* @param TrapFrame
* Supplies a kernel trap frame pushed by common interrupt handler on the stack.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
AR::Traps::DispatchInterrupt(IN PKTRAP_FRAME TrapFrame)
{
PINTERRUPT_HANDLER Handler;
/* Read the handler pointer from the CPU's interrupt dispatch table */
Handler = (PINTERRUPT_HANDLER)AR::CpuFunctions::ReadGSQuadWord(FIELD_OFFSET(KPROCESSOR_BLOCK, InterruptDispatchTable) +
(TrapFrame->Vector * sizeof(PINTERRUPT_HANDLER)));
/* Check if the interrupt has a handler registered */
if(Handler != NULLPTR)
{
/* Call the handler */
Handler(TrapFrame);
}
else if(UnhandledInterruptRoutine != NULLPTR)
{
/* Call the unhandled interrupt routine */
UnhandledInterruptRoutine(TrapFrame);
}
else
{
/* Dispatcher not initialized, print a debug message */
DebugPrint(L"ERROR: Caught unhandled interrupt: 0x%.2llX\n", TrapFrame->Vector);
}
}
/**
* Dispatches the trap provided by common trap handler.
*
@@ -171,6 +133,14 @@ AR::Traps::DispatchTrap(IN PKTRAP_FRAME TrapFrame)
/* Debug-Service-Request raised */
HandleTrap2D(TrapFrame);
break;
case 0x2F:
/* Software Interrupt at DISPATCH level */
HandleTrap2F(TrapFrame);
break;
case 0xE1:
/* InterProcessor Interrupt (IPI) */
HandleTrapE1(TrapFrame);
break;
default:
/* Unknown/Unexpected trap */
HandleTrapFF(TrapFrame);
@@ -257,6 +227,7 @@ VOID
AR::Traps::HandleTrap02(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Handled Non-Maskable-Interrupt (0x02)!\n");
KE::Crash::Panic(0x02);
}
/**
@@ -600,6 +571,40 @@ AR::Traps::HandleTrap2D(IN PKTRAP_FRAME TrapFrame)
KE::Crash::Panic(0x2D);
}
/**
* Handles the trap 0x2F when a software interrupt gets generated at DISPATCH_LEVEL.
*
* @param TrapFrame
* Supplies a kernel trap frame pushed by common trap handler on the stack.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
AR::Traps::HandleTrap2F(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Unhandled software interrupt at DISPATCH level (0x2F)!\n");
}
/**
* Handles the trap 0xE1 when InterProcessor Interrupt (IPI) occurs.
*
* @param TrapFrame
* Supplies a kernel trap frame pushed by common trap handler on the stack.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTCDECL
VOID
AR::Traps::HandleTrapE1(IN PKTRAP_FRAME TrapFrame)
{
DebugPrint(L"Unhandled IPI interrupt (0xE1)!\n");
}
/**
* Handles the trap 0xFF when Unexpected Interrupt occurs.
*
@@ -630,29 +635,29 @@ VOID
AR::Traps::InitializeSystemCallMsrs(VOID)
{
/* Initialize system calls MSR */
CpuFunctions::WriteModelSpecificRegister(X86_MSR_STAR, (((ULONG64)KGDT_R3_CMCODE | RPL_MASK) << 48) | ((ULONG64)KGDT_R0_CODE << 32));
CpuFunctions::WriteModelSpecificRegister(X86_MSR_CSTAR, (ULONG64)&HandleSystemCall32);
CpuFunctions::WriteModelSpecificRegister(X86_MSR_LSTAR, (ULONG64)&HandleSystemCall64);
CpuFunctions::WriteModelSpecificRegister(X86_MSR_FMASK, X86_EFLAGS_IF_MASK | X86_EFLAGS_TF_MASK);
CpuFunc::WriteModelSpecificRegister(X86_MSR_STAR, (((ULONG64)KGDT_R3_CMCODE | RPL_MASK) << 48) | ((ULONG64)KGDT_R0_CODE << 32));
CpuFunc::WriteModelSpecificRegister(X86_MSR_CSTAR, (ULONG64)&HandleSystemCall32);
CpuFunc::WriteModelSpecificRegister(X86_MSR_LSTAR, (ULONG64)&HandleSystemCall64);
CpuFunc::WriteModelSpecificRegister(X86_MSR_FMASK, X86_EFLAGS_IF_MASK | X86_EFLAGS_TF_MASK);
/* Enable system call extensions (SCE) in EFER MSR */
CpuFunctions::WriteModelSpecificRegister(X86_MSR_EFER, CpuFunctions::ReadModelSpecificRegister(X86_MSR_EFER) | X86_MSR_EFER_SCE);
CpuFunc::WriteModelSpecificRegister(X86_MSR_EFER, CpuFunc::ReadModelSpecificRegister(X86_MSR_EFER) | X86_MSR_EFER_SCE);
}
/**
* Sets the unhandled interrupt routine used for vectors that have no handler registered.
* C-linkage wrapper for dispatching the trap provided by common trap handler.
*
* @param Handler
* Supplies the pointer to the interrupt handler routine.
* @param TrapFrame
* Supplies a kernel trap frame pushed by common trap handler on the stack.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
XTAPI
XTCLINK
XTCDECL
VOID
AR::Traps::SetUnhandledInterruptRoutine(PINTERRUPT_HANDLER Handler)
ArDispatchTrap(IN PKTRAP_FRAME TrapFrame)
{
/* Set the unhandled interrupt routine */
UnhandledInterruptRoutine = Handler;
AR::Traps::DispatchTrap(TrapFrame);
}

407
xtoskrnl/ar/i686/archsup.S
View File

@@ -4,334 +4,123 @@
* FILE: xtoskrnl/ar/i686/archsup.S
* DESCRIPTION: Provides i686 architecture features not implementable in C.
* DEVELOPERS: Rafal Kupiec <belliash@codingworkshop.eu.org>
* Aiken Harris <harraiken91@gmail.com>
*/
#include <xtkmapi.h>
#include <xtadk.h>
#include <ar/i686/asmsup.h>
.altmacro
.text
/**
* Creates a task, trap or interrupt handler for the specified vector.
* This macro creates a trap handler for the specified vector.
*
* @param Vector
* Supplies a vector number.
*
* @param Type
* Specifies whether the handler is designed to handle an interrupt, a task or a trap.
* Supplies a trap vector number.
*
* @return This macro does not return any value.
*
* @since XT 1.0
*/
.macro ArCreateHandler Vector Type
.global _Ar\Type\Vector
_Ar\Type\Vector:
/* Check handler type */
.ifc \Type,Task
_Ar\Type\Vector\()Start:
/* Clear the Task Switch flag */
clts
/* Allocate the trap frame and inject the hardware vector for the dispatcher */
sub $KTRAP_FRAME_SIZE, %esp
movl $\Vector, KTRAP_FRAME_Vector(%esp)
/* Pass the trap frame pointer as an argument and clear the direction flag */
push %esp
cld
/* Pass control to the trap dispatcher */
call _ArDispatchTrap
/* Discard the argument and deallocate the trap frame */
add $4, %esp
add $KTRAP_FRAME_SIZE, %esp
/* Hardware task return */
iretl
/* Spin back to the entry point to rearm the task gate */
jmp _Ar\Type\Vector\()Start
.else
/* Check handler type */
.ifc \Type,Trap
/* Push fake error code for non-error vector traps */
.if \Vector != 8 && \Vector != 10 && \Vector != 11 && \Vector != 12 && \Vector != 13 && \Vector != 14 && \Vector != 17 && \Vector != 30
push $0
.endif
.else
/* Push fake error code for interrupts */
push $0
.endif
/* Push vector number */
push $\Vector
/* Push General Purpose Registers */
push %ebp
push %edi
push %esi
push %edx
push %ecx
push %ebx
push %eax
/* Reserve space for other registers and point RBP to the trap frame */
sub $(KTRAP_FRAME_SIZE - KTRAP_FRAME_REGISTERS_SIZE), %esp
lea (%esp), %ebp
/* Store segment selectors */
mov %gs, KTRAP_FRAME_SegGs(%ebp)
mov %fs, KTRAP_FRAME_SegFs(%ebp)
mov %es, KTRAP_FRAME_SegEs(%ebp)
mov %ds, KTRAP_FRAME_SegDs(%ebp)
/* Store debug registers */
mov %dr7, %eax
mov %eax, KTRAP_FRAME_Dr7(%ebp)
mov %dr6, %eax
mov %eax, KTRAP_FRAME_Dr6(%ebp)
mov %dr3, %eax
mov %eax, KTRAP_FRAME_Dr3(%ebp)
mov %dr2, %eax
mov %eax, KTRAP_FRAME_Dr2(%ebp)
mov %dr1, %eax
mov %eax, KTRAP_FRAME_Dr1(%ebp)
mov %dr0, %eax
mov %eax, KTRAP_FRAME_Dr0(%ebp)
/* Store CR2 and CR3 */
mov %cr3, %eax
mov %eax, KTRAP_FRAME_Cr3(%ebp)
mov %cr2, %eax
mov %eax, KTRAP_FRAME_Cr2(%ebp)
/* Test previous mode */
movl $0, KTRAP_FRAME_PreviousMode(%ebp)
mov KTRAP_FRAME_SegCs(%ebp), %ax
and $3, %al
mov %al, KTRAP_FRAME_PreviousMode(%ebp)
jz Dispatch\Type\Vector
/* Load Kernel PB selector into FS */
mov $KGDT_R0_PB, %ax
mov %ax, %fs
/* Set sane data segment selectors */
mov $(KGDT_R3_DATA | RPL_MASK), %ax
mov %ax, %ds
mov %ax, %es
Dispatch\Type\Vector:
/* Push Frame Pointer and clear direction flag */
push %esp
cld
.ifc \Type,Trap
/* Pass to the trap dispatcher */
call _ArDispatchTrap
.else
/* Pass to the interrupt dispatcher */
call _ArDispatchInterrupt
.endif
/* Clean up the stack */
add $4, %esp
/* Test previous mode and disable interrupts before user mode return */
testb $1, KTRAP_FRAME_PreviousMode(%ebp)
jz RestoreState\Type\Vector
cli
RestoreState\Type\Vector:
/* Restore segment selectors */
mov KTRAP_FRAME_SegDs(%ebp), %ds
mov KTRAP_FRAME_SegEs(%ebp), %es
mov KTRAP_FRAME_SegFs(%ebp), %fs
mov KTRAP_FRAME_SegGs(%ebp), %gs
/* Free stack space */
add $(KTRAP_FRAME_SIZE - KTRAP_FRAME_REGISTERS_SIZE), %esp
/* Pop General Purpose Registers */
pop %eax
pop %ebx
pop %ecx
pop %edx
pop %esi
pop %edi
pop %ebp
/* Skip error code and vector number, then return */
add $(2 * 4), %esp
iretl
.macro ArCreateTrapHandler Vector
.global _ArTrap\Vector
_ArTrap\Vector:
/* Push fake error code for non-error vectors */
.if \Vector != 8 && \Vector != 10 && \Vector != 11 && \Vector != 12 && \Vector != 13 && \Vector != 14 && \Vector != 17 && \Vector != 30
push $0
.endif
/* Push vector number */
push $\Vector
/* Push General Purpose Registers */
push %ebp
push %edi
push %esi
push %edx
push %ecx
push %ebx
push %eax
/* Reserve space for other registers and point RBP to the trap frame */
sub $(TRAP_FRAME_SIZE - TRAP_REGISTERS_SIZE), %esp
lea (%esp), %ebp
/* Store segment selectors */
mov %gs, TrapSegGs(%ebp)
mov %fs, TrapSegFs(%ebp)
mov %es, TrapSegEs(%ebp)
mov %ds, TrapSegDs(%ebp)
/* Store debug registers */
mov %dr7, %eax
mov %eax, TrapDr7(%ebp)
mov %dr6, %eax
mov %eax, TrapDr6(%ebp)
mov %dr3, %eax
mov %eax, TrapDr3(%ebp)
mov %dr2, %eax
mov %eax, TrapDr2(%ebp)
mov %dr1, %eax
mov %eax, TrapDr1(%ebp)
mov %dr0, %eax
mov %eax, TrapDr0(%ebp)
/* Store CR2 and CR3 */
mov %cr3, %eax
mov %eax, TrapCr3(%ebp)
mov %cr2, %eax
mov %eax, TrapCr2(%ebp)
/* Test previous mode and swap GS if needed */
movl $0, TrapPreviousMode(%ebp)
mov %cs, %ax
and $1, %al
mov %al, TrapPreviousMode(%ebp)
jz KernelMode$\Vector
swapgs
KernelMode$\Vector:
/* Push Frame Pointer, clear direction flag and pass to trap dispatcher */
push %esp
cld
call _ArDispatchTrap
/* Clean up the stack */
add $4, %esp
/* Test previous mode and swapgs if needed */
testb $1, TrapPreviousMode(%ebp)
jz KernelModeReturn$\Vector
cli
swapgs
KernelModeReturn$\Vector:
/* Restore segment selectors */
mov TrapSegDs(%ebp), %ds
mov TrapSegEs(%ebp), %es
mov TrapSegFs(%ebp), %fs
/* Free stack space */
add $(TRAP_FRAME_SIZE - TRAP_REGISTERS_SIZE), %esp
/* Pop General Purpose Registers */
pop %eax
pop %ebx
pop %ecx
pop %edx
pop %esi
pop %edi
pop %ebp
/* Skip error code and vector number, then return */
add $(2 * 4), %esp
iretl
.endm
/* Populate common interrupt, task and trap handlers */
/* Populate common trap handlers */
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
ArCreateHandler 0x\i\j Interrupt
.if 0x\i\j == 0x02 || 0x\i\j == 0x08
ArCreateHandler 0x\i\j Task
.else
ArCreateHandler 0x\i\j Trap
.endif
ArCreateTrapHandler 0x\i\j
.endr
.endr
/* Define array of pointers to the interrupt handlers */
.global _ArInterruptEntry
_ArInterruptEntry:
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.long _ArInterrupt0x\i\j
.endr
.endr
/* Define array of pointers to the trap handlers */
.global _ArTrapEntry
_ArTrapEntry:
.irp i,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.irp j,0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F
.if 0x\i\j == 0x02 || 0x\i\j == 0x08
.long _ArTask0x\i\j
.else
.long _ArTrap0x\i\j
.endif
.endr
.endr
/**
* Enables eXtended Physical Addressing (XPA). On i386, this is just a stub.
*
* @param PageMap
* Supplies a pointer to the page map to be used.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global ArEnableExtendedPhysicalAddressing
ArEnableExtendedPhysicalAddressing:
.global ArEnableExtendedPhysicalAddressingEnd
ArEnableExtendedPhysicalAddressingEnd:
/**
* Handles a spurious interrupt allowing it to end up.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global _ArHandleSpuriousInterrupt
_ArHandleSpuriousInterrupt:
iret
/**
* Starts an application processor (AP).
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global _ArStartApplicationProcessor
_ArStartApplicationProcessor:
/* Enter 16-bit real mode */
.code16
/* Disable interrupts and clear direction flag */
cli
cld
/* Establish a flat addressing baseline */
movw %cs, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
/* Calculate absolute physical base address */
xorl %ebx, %ebx
movw %cs, %bx
shll $4, %ebx
/* Set up a temporary stack for the AP initialization */
movl %ebx, %esp
addl $0x1000, %esp
/* Load the temporary Global Descriptor Table */
leal (ApTemporaryGdtDesc - _ArStartApplicationProcessor)(%ebx), %eax
movl %eax, (ApTemporaryGdtBase - _ArStartApplicationProcessor)
lgdtl (ApTemporaryGdtSize - _ArStartApplicationProcessor)
/* Enable Protected Mode */
movl %cr0, %eax
orl $0x01, %eax
movl %eax, %cr0
/* Far return to enter 32-bit protected mode */
leal (ApEnterProtectedMode - _ArStartApplicationProcessor)(%ebx), %eax
pushl $KGDT_R0_CODE
pushl %eax
lretl
ApEnterProtectedMode:
/* Enter 32-bit protected mode */
.code32
/* Setup all data segment registers */
movw $KGDT_R0_DATA, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
xorw %ax, %ax
movw %ax, %fs
movw %ax, %gs
/* Locate PROCESSOR_START_BLOCK structure */
leal (_ArStartApplicationProcessorEnd - _ArStartApplicationProcessor)(%ebx), %edi
/* Load CR4 from BSP, but mask PCIDE and PGE */
movl PROCESSOR_START_BLOCK_Cr4(%edi), %eax
andl $~(CR4_PGE | CR4_PCIDE), %eax
movl %eax, %cr4
/* Load the Kernel Page Directory Base from BSP */
movl PROCESSOR_START_BLOCK_Cr3(%edi), %eax
movl %eax, %cr3
/* Enable Paging */
movl %cr0, %eax
orl $CR0_PG, %eax
movl %eax, %cr0
/* Load dedicated Stack for AP */
movl PROCESSOR_START_BLOCK_InitialStack(%edi), %esp
/* Save the pointer to PROCESSOR_START_BLOCK */
movl %edi, %ecx
pushl %edi
/* Call the EntryPoint routine */
movl PROCESSOR_START_BLOCK_EntryPoint(%edi), %eax
call *%eax
/* Fire the breakpoint and halt if the entry point returns */
.ApNoReturnPoint:
int $0x03
hlt
jmp .ApNoReturnPoint
/* Data section for temporary GDT */
.align 8
ApTemporaryGdtSize: .short _ArStartApplicationProcessorEnd - ApTemporaryGdtDesc - 1
ApTemporaryGdtBase: .long 0x00000000
ApTemporaryGdtDesc: .quad 0x0000000000000000, 0x00CF9A000000FFFF, 0x00CF92000000FFFF
.global _ArStartApplicationProcessorEnd
_ArStartApplicationProcessorEnd:

26
xtoskrnl/ar/i686/boot.S Normal file
View File

@@ -0,0 +1,26 @@
/**
* PROJECT: ExectOS
* COPYRIGHT: See COPYING.md in the top level directory
* FILE: xtoskrnl/ar/i686/boot.S
* DESCRIPTION: i686-specific boot code for setting up the low-level CPU environment
* DEVELOPERS: Aiken Harris <harraiken91@gmail.com>
*/
#include <ar/amd64/asmsup.h>
.altmacro
.text
/**
* Starts an application processor (AP). This is just a stub.
*
* @return This routine does not return any value.
*
* @since XT 1.0
*/
.global _ArStartApplicationProcessor
_ArStartApplicationProcessor:
.global _ArStartApplicationProcessorEnd
_ArStartApplicationProcessorEnd:

Some files were not shown because too many files have changed in this diff Show More