Commit Graph

60 Commits

Author SHA1 Message Date
363e100493 Saving processor features in the processor control block
Fixed correct AMD Family 25 model detection
Fixed procedure for saving processor vendor name (previously corrupted)
Added a debugging print of the processor identification
2024-05-06 17:55:37 +02:00
cf0d23b6fe Correct a typo causing page fault during int handling after switching to new kernel stack
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2024-05-06 16:47:12 +02:00
22693a48d3 Rework trap handling assembly code
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2024-04-23 15:07:08 +02:00
9f2279f28f Use common way of setting initial runlevel across architectures
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2024-04-19 23:56:33 +02:00
3aa0413756 Use common routine to set runlevel
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2024-04-19 23:52:21 +02:00
28c89986fb Tweaks to AMD64 architecture support
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2024-04-19 23:37:39 +02:00
92ee74b494 Rework trap handling to access registers
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2024-04-19 16:52:37 +02:00
cf408519ad Initialize AMD64 segments properly
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2024-04-17 20:02:27 +02:00
8aa33874ff Initialize CS segment on i686 architecture
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2024-04-17 18:27:57 +02:00
7011d456e9 Fix loading CS segment for AMD64 architecture
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2024-04-17 16:48:18 +02:00
b31aa82872 Fix loading CS segment for i686 architecture
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2024-04-17 16:46:03 +02:00
4b2d8ded72 No parameters are expected, explicitly
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2024-02-20 16:55:12 +01:00
e409675f98 Always use RtlSetMemory() to fill a buffer with a specified pattern
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2024-02-20 16:16:32 +01:00
7727888087 Implement ArFlushTlb() routine
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2024-02-04 23:43:38 +01:00
9ce841e957 Implement memory barriers
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2024-02-04 22:10:37 +01:00
d17b06a180 Register interrupt handlers once the APIC initialization is done
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2023-11-28 14:20:23 +01:00
ba6e68e1b5 Fix a bug that caused overwritting a value read from CR8 with a default value
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2023-11-26 00:33:46 +01:00
55cc62f5a0 Rename KIRQL to KRUNLEVEL type
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2023-11-25 00:32:55 +01:00
71d0608643 Implement ArGetStackPointer() routine
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2023-11-19 00:09:16 +01:00
35aa26e0e9 Add missing documentation comment block
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2023-11-15 15:50:33 +01:00
ccd0514416 Implement more CPU-related routines
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2023-11-15 14:52:18 +01:00
c5a9253ea8 Implement ArLoadLocalDescriptorTable() routine
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2023-03-02 23:04:36 +01:00
dfae0b4727 Implement ArSetGdtEntryBase() routine
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2023-03-02 22:51:57 +01:00
e41de62dab Implement ArYieldProcessor() routine
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2023-02-27 17:28:20 +01:00
d427ca20fb Always include xtos.h in kernel sources
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2023-02-20 00:21:52 +01:00
d72002187d Partially implement ArpIdentifyProcessor()
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2023-02-10 17:23:47 +01:00
e645cf664c Set process and thread information in processor control block
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2023-02-09 17:30:24 +01:00
47f399e987 Set current process and thread in processor control block
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2023-02-09 00:02:45 +01:00
a32e18b237 Implement ArReadFSDualWord() routine
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2023-02-07 23:19:22 +01:00
75c519a70c Use more generic name for this macro use pointer used behind it will point to kernel debugger after it gets initialized
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2023-02-07 19:37:44 +01:00
67768ae7a3 Mark ArpIdentifyProcessor() as unimplemented
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2023-02-06 16:15:24 +01:00
385f0e6de0 Not all AMD64 CPUs support large pages and global pages, unfortunately
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2023-02-05 22:14:47 +01:00
76f22fbdc4 Initialize segments and processor registers for i686 architecture
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2023-02-05 15:45:22 +01:00
911903d0eb Add missing routine description
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2023-02-05 10:08:49 +01:00
d6aac59199 Let kernel initialize stack on it's own without relying on boot loader
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2023-02-05 09:55:59 +01:00
0b743a5f26 Add stub routine for identifying processor
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2023-02-05 00:42:30 +01:00
c6cadbd655 Initialize MXCSR register
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2023-02-05 00:30:12 +01:00
5eaf7d63a3 Initialize Page Attribute Table
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2023-02-05 00:14:34 +01:00
55cdae7c83 Initialize AMD64 processor registers
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2023-02-04 23:40:03 +01:00
f181215341 Initialize segment registers
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2023-02-04 00:17:07 +01:00
f37722b6e6 Distinguish ProcessorBlock and ProcessorControlBlock
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2023-02-03 19:28:03 +01:00
b90f37dad4 Fill in Interrupt Descriptor Table (IDT)
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2023-02-03 18:40:10 +01:00
648ad1636a Cleanup TSS initialization code
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2023-02-03 18:27:50 +01:00
269214ed34 Another improvements to GDT
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2023-02-03 18:00:37 +01:00
a49d0804ce Add trap handlers for both i686 and amd64
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2023-02-02 23:31:32 +01:00
404f2f85c6 Cleanup the Interrupt Stack Table
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2023-02-01 23:47:57 +01:00
7fc1f04cd0 TSS entry is already put into GDT table, just initialize it
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2023-02-01 23:37:12 +01:00
cbd21ced39 Use a size of the structure, not a pointer
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2023-02-01 22:38:36 +01:00
dc1a94b982 This is 'Processor Block'
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2023-02-01 22:02:07 +01:00
3522539d4b Initialize Interrupt Descriptor Table (IDT)
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2023-02-01 21:56:17 +01:00