518 Commits

This Branch

This Branch

All Branches

Author	SHA1	Message	Date
PerikiyoXD	73c768ba0e	Merge branch 'master' into prcb-cpu-features	2023-11-26 18:53:01 +01:00
Rafal Kupiec	e886baa0d8	Fix reading from and writting to APIC registers	2023-11-26 16:57:40 +01:00
Rafal Kupiec	5b48525b1d	Increase commit hash to 10 characters to match Gitea	2023-11-26 16:26:22 +01:00
Rafal Kupiec	0e6844e2fa	Fix page fault on accessing initial thread frame	2023-11-26 14:14:54 +01:00
Rafal Kupiec	96a19d23b3	Fix i686 build by setting APIC transformation tables static	2023-11-26 00:38:20 +01:00
Rafal Kupiec	ba6e68e1b5	Fix a bug that caused overwritting a value read from CR8 with a default value	2023-11-26 00:33:46 +01:00
Rafal Kupiec	bed49fa0ac	Fix function prototypes using fastcall and stdcall calling convensions	2023-11-25 23:25:44 +01:00
Rafal Kupiec	e245754d95	Add running level management support	2023-11-25 23:14:15 +01:00
Rafal Kupiec	4701351bd7	Add missing SYNC_LEVEL definition	2023-11-25 22:14:45 +01:00
Rafal Kupiec	5204d8bc2f	Correct (A)PIC related source file description	2023-11-25 19:23:18 +01:00
Rafal Kupiec	14a966043e	Add missing Interrupt request level definitions	2023-11-25 18:50:59 +01:00
Rafal Kupiec	0e6bf984a5	Add APIC vector definitions	2023-11-25 18:33:01 +01:00
Rafal Kupiec	55cc62f5a0	Rename KIRQL to KRUNLEVEL type	2023-11-25 00:32:55 +01:00
Rafal Kupiec	236927fba0	Move APIC related routines	2023-11-24 22:45:29 +01:00
PerikiyoXD	a270c08dcf	feat: Add CPU vendor and features identification ... Add functionality to identify the CPU vendor and features using the CPUID instruction. The CPU vendor information is stored in the Processor Control Block (PRCB), including the vendor name and a corresponding enumeration. CPU features are also retrieved and stored in the PRCB. Previously, the CPU vendor was not properly stored in the PRCB, caused by a missing type cast. Using Rtl functions to copy the CPU vendor name to the PRCB. Details: - Introduced functions `ArpSetCpuVendor` and `ArpSetCpuFeatures` to set CPU vendor and features, respectively. - Modified `ArpIdentifyProcessor` to call the new functions for vendor and features identification. - Added `CPU_FEATURES` structure to `KPROCESSOR_CONTROL_BLOCK` structure to store CPU features. Tests: - Tested x86_64 on QEMU. Verified that the CPU vendor and features are correctly identified and stored in the PRCB.	2023-11-23 23:26:39 +01:00
Pedro Valadés	3c4ebe12e1	POSIX compliant stream redirection ... Reviewed-on: #1 Reviewed-by: Rafal Kupiec <belliash@noreply.codingworkshop.git> Co-authored-by: Pedro Valadés <perikiyoxd@gmail.com> Co-committed-by: Pedro Valadés <perikiyoxd@gmail.com>	2023-11-23 23:26:26 +01:00
PerikiyoXD	a01ccff6dc	POSIX compliant stream redirection ... Reviewed-on: #1 Reviewed-by: Rafal Kupiec <belliash@noreply.codingworkshop.git> Co-authored-by: PerikiyoXD <perikiyoxd@gmail.com> Co-committed-by: PerikiyoXD <perikiyoxd@gmail.com>	2023-11-23 17:02:30 +01:00
belliash	c526e63b7a	Add EFI Framework MP services protocol related structures	2023-11-23 15:38:32 +01:00
belliash	1cb21a81dd	Rename HlInitializeDisplay() to HlInitializeFrameBuffer()	2023-11-22 20:36:05 +01:00
belliash	f28c870192	Implement KeHaltSystem() routine	2023-11-22 19:24:14 +01:00
belliash	d7e6d319cf	Update XTOS ideas	2023-11-22 19:22:51 +01:00
belliash	d8403d01f5	Verify kernel and boot loader compatibility	2023-11-22 17:22:57 +01:00
belliash	c66ea77a8b	Enable ASM, C and CXX compilers	2023-11-20 23:52:49 +01:00
belliash	c4143c63f9	Enable LLVM MASM Assembly	2023-11-20 23:30:44 +01:00
belliash	d2fb0a6830	Update ideas file	2023-11-20 16:44:21 +01:00
belliash	1eecad21db	Implement HlReadApicRegister() and HlWriteApicRegister() routines for basic APIC support	2023-11-20 15:26:03 +01:00
belliash	a3c28cee73	Initial XTLDR APIC support, finds and maps base APIC address for kernel	2023-11-20 15:18:22 +01:00
belliash	3d0a48df26	Give qemu direct access to the terminal	2023-11-19 20:41:21 +01:00
belliash	575b842d05	Add APIC Registers address map (APIC_REGISTER enumeration list)	2023-11-19 00:57:27 +01:00
belliash	0c3268acd1	Export registers read/write related routines	2023-11-19 00:46:51 +01:00
belliash	42b7c3698c	Add missing I/O register routines forward references	2023-11-19 00:41:21 +01:00
belliash	12f946c92d	Fixes to I/O registers related routines	2023-11-19 00:39:52 +01:00
belliash	71d0608643	Implement ArGetStackPointer() routine	2023-11-19 00:09:16 +01:00
belliash	83c692bfcb	Fix publishing artifacts	2023-11-18 13:55:26 +01:00
belliash	b2f0584cb9	Archive libraries and symbols	2023-11-18 13:49:52 +01:00
belliash	cb2ce9be83	Set libraries target directory	2023-11-18 13:34:52 +01:00
belliash	64ffe0d7d7	Add EFI task priority levels	2023-11-17 00:11:30 +01:00
belliash	71e7adadbd	Correct typo	2023-11-17 00:10:54 +01:00
belliash	d083d00ab1	Add EFI MP services protocol structures	2023-11-16 23:06:01 +01:00
belliash	a2af4841da	Move all globals into separate file	2023-11-16 17:39:12 +01:00
belliash	1a932468a2	Add some DPC related stubs	2023-11-16 14:53:54 +01:00
belliash	ec4a0fcb70	Add missing KepRetireDpcList() routine forward reference	2023-11-15 23:19:20 +01:00
belliash	5b6f3b0244	Mark user mode threads as not yet supported	2023-11-15 20:41:28 +01:00
belliash	35aa26e0e9	Add missing documentation comment block	2023-11-15 15:50:33 +01:00
belliash	5d27473bb0	Fix i686 build	2023-11-15 15:34:04 +01:00
belliash	d35dd4fce3	Save processor state during kernel initialization	2023-11-15 15:00:38 +01:00
belliash	ccd0514416	Implement more CPU-related routines	2023-11-15 14:52:18 +01:00
belliash	f0c20074c6	Prefer xbuild over ninja	2023-11-14 15:35:07 +01:00
belliash	e664b953a0	Take advantage of the 'xbuild' command (requires XTChain 2.8.5)	2023-11-14 15:01:51 +01:00
belliash	fc85e0674b	Let KeGetCurrentProcessorControlBlock() use CurrentPrcb field and correct comments	2023-11-13 15:36:50 +01:00