198 Commits

Author	SHA1	Message	Date
PerikiyoXD	73c768ba0e	Merge branch 'master' into prcb-cpu-features	2023-11-26 18:53:01 +01:00
Rafal Kupiec	e886baa0d8	Fix reading from and writting to APIC registers	2023-11-26 16:57:40 +01:00
Rafal Kupiec	0e6844e2fa	Fix page fault on accessing initial thread frame	2023-11-26 14:14:54 +01:00
Rafal Kupiec	96a19d23b3	Fix i686 build by setting APIC transformation tables static	2023-11-26 00:38:20 +01:00
Rafal Kupiec	ba6e68e1b5	Fix a bug that caused overwritting a value read from CR8 with a default value	2023-11-26 00:33:46 +01:00
Rafal Kupiec	bed49fa0ac	Fix function prototypes using fastcall and stdcall calling convensions	2023-11-25 23:25:44 +01:00
Rafal Kupiec	e245754d95	Add running level management support	2023-11-25 23:14:15 +01:00
Rafal Kupiec	5204d8bc2f	Correct (A)PIC related source file description	2023-11-25 19:23:18 +01:00
Rafal Kupiec	55cc62f5a0	Rename KIRQL to KRUNLEVEL type	2023-11-25 00:32:55 +01:00
Rafal Kupiec	236927fba0	Move APIC related routines	2023-11-24 22:45:29 +01:00
PerikiyoXD	a270c08dcf	feat: Add CPU vendor and features identification ... Add functionality to identify the CPU vendor and features using the CPUID instruction. The CPU vendor information is stored in the Processor Control Block (PRCB), including the vendor name and a corresponding enumeration. CPU features are also retrieved and stored in the PRCB. Previously, the CPU vendor was not properly stored in the PRCB, caused by a missing type cast. Using Rtl functions to copy the CPU vendor name to the PRCB. Details: - Introduced functions `ArpSetCpuVendor` and `ArpSetCpuFeatures` to set CPU vendor and features, respectively. - Modified `ArpIdentifyProcessor` to call the new functions for vendor and features identification. - Added `CPU_FEATURES` structure to `KPROCESSOR_CONTROL_BLOCK` structure to store CPU features. Tests: - Tested x86_64 on QEMU. Verified that the CPU vendor and features are correctly identified and stored in the PRCB.	2023-11-23 23:26:39 +01:00
belliash	1cb21a81dd	Rename HlInitializeDisplay() to HlInitializeFrameBuffer()	2023-11-22 20:36:05 +01:00
belliash	f28c870192	Implement KeHaltSystem() routine	2023-11-22 19:24:14 +01:00
belliash	d8403d01f5	Verify kernel and boot loader compatibility	2023-11-22 17:22:57 +01:00
belliash	1eecad21db	Implement HlReadApicRegister() and HlWriteApicRegister() routines for basic APIC support	2023-11-20 15:26:03 +01:00
belliash	0c3268acd1	Export registers read/write related routines	2023-11-19 00:46:51 +01:00
belliash	12f946c92d	Fixes to I/O registers related routines	2023-11-19 00:39:52 +01:00
belliash	71d0608643	Implement ArGetStackPointer() routine	2023-11-19 00:09:16 +01:00
belliash	1a932468a2	Add some DPC related stubs	2023-11-16 14:53:54 +01:00
belliash	ec4a0fcb70	Add missing KepRetireDpcList() routine forward reference	2023-11-15 23:19:20 +01:00
belliash	5b6f3b0244	Mark user mode threads as not yet supported	2023-11-15 20:41:28 +01:00
belliash	35aa26e0e9	Add missing documentation comment block	2023-11-15 15:50:33 +01:00
belliash	5d27473bb0	Fix i686 build	2023-11-15 15:34:04 +01:00
belliash	d35dd4fce3	Save processor state during kernel initialization	2023-11-15 15:00:38 +01:00
belliash	ccd0514416	Implement more CPU-related routines	2023-11-15 14:52:18 +01:00
belliash	fc85e0674b	Let KeGetCurrentProcessorControlBlock() use CurrentPrcb field and correct comments	2023-11-13 15:36:50 +01:00
belliash	1d9a79736a	Allow to postpone thread startup	2023-11-11 16:30:53 +01:00
belliash	641b34b119	Fixes in i686 version of KepInitializeThreadContext()	2023-11-08 16:06:01 +01:00
belliash	362eefc2b3	Fixes in AMD64 version of KepInitializeThreadContext() to get rid of PageFault exception	2023-11-07 15:34:49 +01:00
belliash	91ce0f9947	Compensate missing return address, which is a 4-byte on i686 and an 8-byte on amd64	2023-11-05 20:07:13 +01:00
belliash	ba833422b0	Implement ExCompleteRundownProtection() and ExReInitializeRundownProtection() routines and add stub for ExWaitForRundownProtectionRelease()	2023-11-05 09:50:04 +01:00
belliash	02f35dbd8c	Try to allocate new stack for a thread if needed	2023-11-03 16:04:10 +01:00
belliash	a6c3924b56	Initialize Idle thread for i686 architecture	2023-11-03 15:29:01 +01:00
belliash	63f8dbc59b	Initialize CPU power structures, idle process and idle thread	2023-11-02 23:07:11 +01:00
belliash	2621cb6d8a	Turn atomic routines architecture independent	2023-10-29 21:43:05 +01:00
belliash	783a4a2aa0	Finish PoInitializeProcessorControlBlock() routine implementation	2023-10-29 20:14:10 +01:00
belliash	aa17be6eb3	Implement KeSetTargetProcessorDpc() routine	2023-10-29 19:59:21 +01:00
belliash	be7981f614	Implement KeInitializeThreadedDpc() and export it together with KeInitializeDpc()	2023-10-29 19:45:45 +01:00
belliash	a359c9b2e8	Keep only atomic routines	2023-10-29 18:22:11 +01:00
belliash	3f2baa5b50	Rename RtlInterlockedDecrementLongPtr() to follow routines naming convention	2023-10-29 12:21:19 +01:00
belliash	cf7c467637	Implement RtlInterlockedExchangePointer() routine	2023-10-29 11:48:31 +01:00
belliash	6d63750fc2	Rename KepArchInitialize() routine to KepInitializeMachine()	2023-10-29 10:38:23 +01:00
belliash	f05a262da2	Cleanup XTDK and XTOSKRNL headers	2023-10-29 09:58:47 +01:00
belliash	841a6b304b	Cleanup KE subsystem headers	2023-10-29 09:14:46 +01:00
belliash	798e4c1d22	Cleanup MM subsystem headers	2023-10-29 00:52:05 +02:00
belliash	600c86949b	Cleanup RTL subsystem headers	2023-10-29 00:14:01 +02:00
belliash	4ea54859f2	Add missing HL routine definitions	2023-10-28 23:36:21 +02:00
belliash	ad15c55a39	Cleanup AR subsystem headers	2023-10-28 23:35:34 +02:00
belliash	598b34acf7	AR subsystem is architecture dependant, thus there should be no generic routines	2023-10-28 23:08:08 +02:00
belliash	d55946c3cf	Cleanup HL subsystem headers	2023-10-28 22:56:04 +02:00